CN113156186A - Pulse current sampling circuit based on CT sampling - Google Patents
Pulse current sampling circuit based on CT sampling Download PDFInfo
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- CN113156186A CN113156186A CN202110443530.3A CN202110443530A CN113156186A CN 113156186 A CN113156186 A CN 113156186A CN 202110443530 A CN202110443530 A CN 202110443530A CN 113156186 A CN113156186 A CN 113156186A
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Abstract
The invention discloses a pulse current sampling circuit based on CT sampling, which comprises a CT sampling circuit and a signal conditioning circuit, wherein the signal conditioning circuit is connected with the CT sampling circuit; the CT sampling circuit comprises a current transformer CT, a first resistor R1, a second resistor R2, a diode Q1 and a sixth capacitor C6; the signal conditioning circuit comprises a first operational amplifier U1, a second operational amplifier C2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4. The invention improves the sampling accuracy of the narrow pulse current with lower device cost, reduces the common mode interference voltage of the sampling signal, optimizes the sampling bandwidth of the sampling conditioning loop and has good application value.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to a pulse current sampling circuit based on CT sampling.
Background
In a power electronic system, a Current Transformer (CT) is a device that converts a large primary-side Current into a small secondary-side Current according to an electromagnetic induction principle to measure, and is more and more favored by people due to the characteristics of low cost, high precision and fast response.
At present, because CT needs magnetic reset, CT is more suitable for sampling pulse signals. In some special application occasions or special working states, a power electronic circuit system has hundred-nanosecond narrow pulse voltage or current, and a common sampling conditioning circuit has the problems of slow response and low accuracy for sampling precision of the hundred-nanosecond narrow pulse current, so that the loop control performance of a power circuit is influenced, and in addition, the common-mode interference voltage of a current sampling signal also influences the normal work of an operational amplifier in the sampling conditioning circuit in a high electromagnetic interference environment.
Therefore, it is desirable to provide a new sampling conditioning circuit to solve the above technical problems.
Disclosure of Invention
The invention provides a pulse current sampling circuit based on CT sampling, which aims to overcome the defects in the prior art.
In order to achieve the above purpose, the present invention provides the following technical solutions:
a pulse current sampling circuit based on CT sampling comprises a CT sampling circuit and a signal conditioning circuit; wherein the content of the first and second substances,
the CT sampling circuit comprises a current transformer CT, a first resistor R1, a second resistor R2, a diode Q1 and a sixth capacitor C6; the signal conditioning circuit comprises a first operational amplifier U1, a second operational amplifier C2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4;
the primary side of the current transformer CT is connected in series in a sampled circuit, the homonymous end of the secondary side of the current transformer CT is connected with the non-inverting input end of the first operational amplifier U1, and the heteronymous end of the secondary side of the current transformer CT is connected with the inverting input end of the first operational amplifier U1 and is connected with a power ground;
two ends of the first resistor R1 are respectively connected with the homonymous end and the synonym end of the secondary side of the current transformer CT; one ends of the second resistor R2 and the sixth capacitor C6 are respectively connected with the homonymous end of the secondary side of the current transformer CT through the diode Q1, and the other ends of the second resistor R2 and the sixth capacitor C6 are respectively connected with the synonym end of the secondary side of the current transformer CT; the anode of the diode Q1 is connected with the homonymous terminal of the secondary side of the current transformer CT, and the cathode of the diode Q1 is connected with the non-inverting input terminal of the first operational amplifier U1; the fourth resistor R4 is connected in series between the synonym terminal of the secondary side of the current transformer CT and the inverting input terminal of the first operational amplifier U1;
the third resistor R3 is connected in parallel with the first capacitor C1 and then connected in series between the non-inverting input terminal of the first operational amplifier U1 and a first reference voltage; the fifth resistor R5 is connected in parallel with the second capacitor C2, and then one end of the fifth resistor R5 is connected with the inverting input end of the first operational amplifier U1, and the other end of the fifth resistor R5 is connected with the output end of the first operational amplifier U1; the sixth resistor R6 is connected in series between the output terminal of the first operational amplifier U1 and the inverting input terminal of the second operational amplifier U2;
the seventh resistor R7 and the third capacitor C3 are connected in parallel and then connected in series between the non-inverting input terminal of the second operational amplifier U2 and a second reference voltage; the eighth resistor R8 is connected in parallel with the fourth capacitor C4, and then one end of the eighth resistor R8 is connected with the inverting input end of the second operational amplifier U2, and the other end of the eighth resistor R8 is connected with the output end of the second operational amplifier U2; the ninth resistor R9 is connected in series at the output of the second operational amplifier U2.
Further, the pulse current sampling circuit based on CT sampling also comprises an analog-to-digital converter (ADC) sampling front end;
the sampling front end of the analog-to-digital converter ADC comprises a tenth resistor R10, a fifth capacitor C5 and a sampling switch SW 1;
one end of the tenth resistor R10 is connected to the ninth resistor R9, and the other end is connected to one end of the fifth capacitor C5;
the other end of the fifth capacitor C5 is grounded.
The sampling switch SW1 is connected between the ninth resistor R9 and the tenth resistor R10.
Further, in the pulse current sampling circuit based on CT sampling, the cutoff frequency of an RC filter circuit formed by the second capacitor C2 and the fifth resistor R5 is 1/2 pi R5C 2.
Further, in the pulse current sampling circuit based on CT sampling, the diode Q1 is a fast recovery diode.
Further, in the pulse current sampling circuit based on CT sampling, a conversion relationship between a primary side and a secondary side of the current transformer CT is:
UR2＝ip×R2/N；
wherein, UR2The voltage of the second resistor R2, ip is the current of the sampled circuit, and N is the current transformation ratio of the current transformer CT.
Further, in the pulse current sampling circuit based on CT sampling, the sixth capacitor is a nano-scale capacitor.
Further, in the pulse current sampling circuit based on CT sampling, the first resistor is a reset resistor.
The pulse current sampling circuit based on CT sampling provided by the embodiment of the invention improves the sampling accuracy of narrow pulse current with lower device cost, reduces the common mode interference voltage of a sampling signal, optimizes the sampling bandwidth of a sampling conditioning loop, and has good application value.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
Fig. 1 is a schematic circuit diagram of a pulse current sampling circuit based on CT sampling according to an embodiment of the present invention;
fig. 2 is a schematic circuit diagram of a PFC circuit according to a first embodiment of the present invention.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the embodiments described below are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. When a component is referred to as being "disposed on" another component, it can be directly on the other component or intervening components may also be present.
Furthermore, the terms "long", "short", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of describing the present invention, but do not indicate or imply that the referred devices or elements must have the specific orientations, be configured to operate in the specific orientations, and thus are not to be construed as limitations of the present invention.
The technical scheme of the invention is further explained by the specific implementation mode in combination with the attached drawings.
Example one
In view of the above-mentioned drawbacks of the conventional sampling and conditioning circuit, the applicant of the present invention is based on practical experience and professional knowledge that are abundant over many years in the design and manufacture of such products, and actively performs research and innovation in cooperation with the application of theory, so as to hopefully create a technology capable of solving the drawbacks of the prior art, and thus the sampling and conditioning circuit has higher practicability. After continuous research and design and repeated trial production and improvement, the invention with practical value is finally created.
Referring to fig. 1, an embodiment of the invention provides a pulse current sampling circuit based on CT sampling, including a CT sampling circuit and a signal conditioning circuit; wherein the content of the first and second substances,
the CT sampling circuit comprises a current transformer CT, a first resistor R1, a second resistor R2, a diode Q1 and a sixth capacitor C6; the signal conditioning circuit comprises a first operational amplifier U1, a second operational amplifier C2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4;
the primary side of the current transformer CT is connected in series in a sampled circuit, the homonymous end of the secondary side of the current transformer CT is connected with the non-inverting input end of the first operational amplifier U1, and the heteronymous end of the secondary side of the current transformer CT is connected with the inverting input end of the first operational amplifier U1 and is connected with a power ground;
two ends of the first resistor R1 are respectively connected with the homonymous end and the synonym end of the secondary side of the current transformer CT; one ends of the second resistor R2 and the sixth capacitor C6 are respectively connected with the homonymous end of the secondary side of the current transformer CT through the diode Q1, and the other ends of the second resistor R2 and the sixth capacitor C6 are respectively connected with the synonym end of the secondary side of the current transformer CT; the anode of the diode Q1 is connected with the homonymous terminal of the secondary side of the current transformer CT, and the cathode of the diode Q1 is connected with the non-inverting input terminal of the first operational amplifier U1; the fourth resistor R4 is connected in series between the synonym terminal of the secondary side of the current transformer CT and the inverting input terminal of the first operational amplifier U1;
the third resistor R3 is connected in parallel with the first capacitor C1 and then connected in series between the non-inverting input terminal of the first operational amplifier U1 and a first reference voltage; the fifth resistor R5 is connected in parallel with the second capacitor C2, and then one end of the fifth resistor R5 is connected with the inverting input end of the first operational amplifier U1, and the other end of the fifth resistor R5 is connected with the output end of the first operational amplifier U1; the sixth resistor R6 is connected in series between the output terminal of the first operational amplifier U1 and the inverting input terminal of the second operational amplifier U2;
the seventh resistor R7 and the third capacitor C3 are connected in parallel and then connected in series between the non-inverting input terminal of the second operational amplifier U2 and a second reference voltage; the eighth resistor R8 is connected in parallel with the fourth capacitor C4, and then one end of the eighth resistor R8 is connected with the inverting input end of the second operational amplifier U2, and the other end of the eighth resistor R8 is connected with the output end of the second operational amplifier U2; the ninth resistor R9 is connected in series at the output of the second operational amplifier U2.
In this embodiment, the pulse current sampling circuit based on CT sampling further includes an ADC sampling front end;
the sampling front end of the analog-to-digital converter ADC comprises a tenth resistor R10, a fifth capacitor C5 and a sampling switch SW 1;
one end of the tenth resistor R10 is connected to the ninth resistor R9, and the other end is connected to one end of the fifth capacitor C5;
the other end of the fifth capacitor C5 is grounded.
The sampling switch SW1 is connected between the ninth resistor R9 and the tenth resistor R10.
As shown in fig. 1, the current transformer CT serves as a sampling front end for collecting a pulse current flowing through a power switch device in a sampled circuit. The secondary side of the current transformer CT is a magnetic reset circuit and a current-voltage conversion circuit, the first resistor R1 is a reset resistor and is used for consuming the excitation current of the current transformer CT during the period that the primary side of the current transformer CT has no current, and the diode Q1 is used for ensuring that the magnetic reset current only passes through the first resistor R1 and does not pass through other devices during the magnetic reset period. The second resistor R2 converts the current of the secondary side corresponding to the time period when the current ip exists on the primary side of the current transformer CT into a voltage signal, and the conversion relationship between the primary side and the secondary side of the current transformer CT is as follows:
UR2＝ip×R2/N；
wherein, UR2The voltage of the second resistor R2, ip is the current of the sampled circuit, and N is the current transformation ratio of the current transformer CT.
The operational amplifier U1 is used for amplifying the output signal of the current transformer CT in proportion and adding the amplified signal into R5/R4 times of a first reference voltage Vref1, the second capacitor C2 is a filter capacitor, the cut-off frequency of an RC filter circuit formed by the second capacitor C2 and the fifth resistor R5 is 1/2 pi R5C2, the operational amplifier U2 is used for inverting the output voltage of the operational amplifier U1 and adding the inverted voltage into R8/R6 times of a second reference voltage Vref2, and the output voltage of the second operational amplifier U2 is input through a ninth resistor R9 to reach the front end of ADC sampling. The fifth capacitor C5 inside the analog-to-digital converter ADC is charged by a voltage, and the analog-to-digital converter ADC converts the voltage of the fifth capacitor C5 into a digital signal.
It should be noted that, because the diode has a junction capacitance, in the case of detecting a fast narrow pulse signal, in this embodiment, the diode Q1 needs to be a fast recovery diode with a low junction capacitance, so as to reduce the voltage rise time of the diode conducting device and improve the response speed of the sampling circuit;
in a circuit with rapidly changing voltage and current, high common-mode interference voltage exists, if the secondary side of the current transformer CT is sampled in a differential sampling mode, the high common-mode voltage exists, and once the common-mode voltage exceeds the maximum common-mode voltage which can be borne by a post-stage operational amplifier, serious distortion of signals can be caused, so that loop control of a power supply system is influenced. In the circuit designed by the embodiment, the synonym end of the secondary side of the current transformer CT is connected with the power ground, and meanwhile, the synonym end is connected with the power ground through a nano-scale capacitor at the homonym end. The design enables the common-mode interference signal to be converted into a differential-mode signal and return through the power supply, noise does not pass through the operational amplifier, and meanwhile, the influence on the rising rate of the pulse signal is reduced;
the rise time of the narrow pulse is very fast, the conditioning filter circuit and the operational amplifier are required to have matched cut-off frequency and bandwidth, if the bandwidth is too large, the signal has an overshoot phenomenon and high-frequency noise, and if the bandwidth is too small, the sampled signal is distorted. In this embodiment, the time constant corresponding to the cut-off frequency of the designed filter is required to be at least less than one third of the pulse width time, and it is also required to ensure that the slew rate of the operational amplifier meets the output requirement of the signal, that is, the output voltage of the operational amplifier can reach the actual voltage within the required minimum time.
The common ADC sampling generally realizes voltage sampling by charging a capacitor in the ADC, because the capacitor charging time is related to the charging current, and the charging current is limited by the resistor at the front end of the capacitor, the cutoff frequency of an RC filter circuit consisting of the resistor at the front end of the sampling, the internal resistor and the sampling capacitor is required to be calculated when narrow pulses are collected, the design method requires that the rise time corresponding to the 3-time cutoff frequency of the RC circuit at the front end of the ADC is less than the minimum required pulse width time, and the matched resistor at the front end of the ADC is obtained according to the cutoff frequency and the sampling capacitor and the resistor in the ADC;
through the content, when the current transformer CT collects narrow pulse current signals, higher signal response speed can be kept in each series circuit link of the signal post stage, finally, an MCU (microcontroller) can obtain accurate narrow pulse signals, and the circuit can be guaranteed to have higher anti-interference capacity and good signal quality through the design method of the characteristic 2. The circuit design method is mainly used for sampling signals of the power electronic power circuit.
Referring to fig. 2 for the case of sampling a hundred-nanosecond narrow pulse current mentioned in this embodiment, fig. 2 is a classic PFC (Power Factor Correction) circuit, an input of the circuit is an alternating current, the input is rectified into a direct current voltage through uncontrolled rectification by diodes D1, D2, D3, and D4, a rear stage of the rectified voltage is a PFC circuit, and the DSP control board controls a current and an output voltage of the L1 by controlling the Power switching tube Q11, so that the Power supply has a high Power Factor. The input voltage Uo and the output voltage Urec of the PFC circuit satisfy the following relationship:
uo ═ Urec/(1-D), D is the duty cycle of Q11;
the working principle of the circuit of fig. 2 is that: when the Q11 is turned on, the rectified voltage is applied to the inductor L1, the inductor current gradually increases, the diode D4 is turned off in the reverse direction, the capacitor C12 discharges the load R11, and the capacitor voltage decreases. When Q11 is turned off, diode D4 turns on, inductor current switches to diode D4, current flows through capacitor C12 and load R11, and the capacitor voltage gradually increases.
When the embodiment is applied to the circuit shown in fig. 2, the problem that a narrow pulse width signal appears in Q1 under the condition of high input voltage is mainly solved, when the output voltage is unchanged and the input voltage gradually rises, the duty ratio D of Q11 can be known to gradually decrease according to the relation that the input voltage Uo and the output voltage Urec of the PFC circuit meet, for example, when the input alternating-current line voltage is 435V, the output voltage is 440V, and the switching frequency is 50kHz, the theoretical calculation pulse width of Q11 is only 274 ns. In this case, the pulse current sampling circuit based on CT sampling provided in the present embodiment is suitable for use.
In this embodiment, the current of the Q11 branch of the power switch tube is sampled by the pulse current sampling circuit based on CT sampling designed in this embodiment, and the control system requires that the peak value of the pulse width sampling signal sampled for 274ns is not distorted, and then at least requires that the voltage signal collected by the ADC sampling capacitor rises to the maximum value within 274 ns. This requires that the filter time constant of the RC circuit at the front stage is less than one third of the rise time, i.e. 91ns, the corresponding cut-off frequency is 1.749MHz, and similarly, the bandwidth of the front-stage operational amplifier under the corresponding gain is required to be greater than 1.749MHz, and it is necessary to ensure that the slew rate of the operational amplifier meets the requirement. For example, when the CT transformation ratio is 100: 1, primary side current 30A, a secondary side conversion resistor 10 omega, and when the amplification factor of the operational amplifier is 1, the output voltage change amplitude of the operational amplifier is 3V, and at the moment, the slew rate of the operational amplifier is required to be at least 10.9V/us.
The pulse current sampling circuit based on CT sampling provided by the embodiment of the invention improves the sampling accuracy of narrow pulse current with lower device cost, has good cost advantage, exerts the advantages of respective devices to a great extent, can enable pulse current signals sampled by CT to have higher accuracy for more than 274ns time length, reduces the common mode interference voltage of the sampled signals, optimizes the sampling bandwidth of a sampling conditioning loop, provides a basis for good control, and has good application value.
The foregoing description of the embodiments has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same elements or features may also vary in many respects. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.
Example embodiments are provided so that this disclosure will be thorough and will fully convey the scope to those skilled in the art. Numerous details are set forth, such as examples of specific parts, devices, and methods, in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to those skilled in the art that specific details need not be employed, that example embodiments may be embodied in many different forms and that neither should be construed to limit the scope of the disclosure. In certain example embodiments, well-known processes, well-known device structures, and well-known technologies are not described in detail.
The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises" and "comprising" are intended to be inclusive and therefore specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order discussed and illustrated, unless explicitly indicated as an order of performance. It should also be understood that additional or alternative steps may be employed.
When an element or layer is referred to as being "on" … … "," engaged with "… …", "connected to" or "coupled to" another element or layer, it can be directly on, engaged with, connected to or coupled to the other element or layer, or intervening elements or layers may also be present. In contrast, when an element or layer is referred to as being "directly on … …," "directly engaged with … …," "directly connected to" or "directly coupled to" another element or layer, there may be no intervening elements or layers present. Other words used to describe the relationship of elements should be interpreted in a similar manner (e.g., "between … …" and "directly between … …", "adjacent" and "directly adjacent", etc.). As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. Although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region or section from another element, component, region or section. Unless clearly indicated by the context, use of terms such as the terms "first," "second," and other numerical values herein does not imply a sequence or order. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the example embodiments.
Spatially relative terms, such as "inner," "outer," "below," "… …," "lower," "above," "upper," and the like, may be used herein for ease of description to describe a relationship between one element or feature and one or more other elements or features as illustrated in the figures. Spatially relative terms may be intended to encompass different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the example term "below … …" can encompass both an orientation of facing upward and downward. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted.
Claims (7)
1. A pulse current sampling circuit based on CT sampling is characterized by comprising a CT sampling circuit and a signal conditioning circuit; wherein the content of the first and second substances,
the CT sampling circuit comprises a current transformer CT, a first resistor R1, a second resistor R2, a diode Q1 and a sixth capacitor C6; the signal conditioning circuit comprises a first operational amplifier U1, a second operational amplifier C2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4;
the primary side of the current transformer CT is connected in series in a sampled circuit, the homonymous end of the secondary side of the current transformer CT is connected with the non-inverting input end of the first operational amplifier U1, and the heteronymous end of the secondary side of the current transformer CT is connected with the inverting input end of the first operational amplifier U1 and is connected with a power ground;
two ends of the first resistor R1 are respectively connected with the homonymous end and the synonym end of the secondary side of the current transformer CT; one ends of the second resistor R2 and the sixth capacitor C6 are respectively connected with the homonymous end of the secondary side of the current transformer CT through the diode Q1, and the other ends of the second resistor R2 and the sixth capacitor C6 are respectively connected with the synonym end of the secondary side of the current transformer CT; the anode of the diode Q1 is connected with the homonymous terminal of the secondary side of the current transformer CT, and the cathode of the diode Q1 is connected with the non-inverting input terminal of the first operational amplifier U1; the fourth resistor R4 is connected in series between the synonym terminal of the secondary side of the current transformer CT and the inverting input terminal of the first operational amplifier U1;
the third resistor R3 is connected in parallel with the first capacitor C1 and then connected in series between the non-inverting input terminal of the first operational amplifier U1 and a first reference voltage; the fifth resistor R5 is connected in parallel with the second capacitor C2, and then one end of the fifth resistor R5 is connected with the inverting input end of the first operational amplifier U1, and the other end of the fifth resistor R5 is connected with the output end of the first operational amplifier U1; the sixth resistor R6 is connected in series between the output terminal of the first operational amplifier U1 and the inverting input terminal of the second operational amplifier U2;
the seventh resistor R7 and the third capacitor C3 are connected in parallel and then connected in series between the non-inverting input terminal of the second operational amplifier U2 and a second reference voltage; the eighth resistor R8 is connected in parallel with the fourth capacitor C4, and then one end of the eighth resistor R8 is connected with the inverting input end of the second operational amplifier U2, and the other end of the eighth resistor R8 is connected with the output end of the second operational amplifier U2; the ninth resistor R9 is connected in series at the output of the second operational amplifier U2.
2. The pulsed current sampling circuit based on CT sampling according to claim 1, further comprising an analog-to-digital converter, ADC, sampling front end;
the sampling front end of the analog-to-digital converter ADC comprises a tenth resistor R10, a fifth capacitor C5 and a sampling switch SW 1;
one end of the tenth resistor R10 is connected to the ninth resistor R9, and the other end is connected to one end of the fifth capacitor C5;
the other end of the fifth capacitor C5 is grounded;
the sampling switch SW1 is connected between the ninth resistor R9 and the tenth resistor R10.
3. The pulsed current sampling circuit based on CT sampling according to claim 1, wherein the cutoff frequency of the RC filter circuit formed by the second capacitor C2 and the fifth resistor R5 is 1/2 rr 5C 2.
4. The CT sampling based pulsed current sampling circuit of claim 1, wherein said diode Q1 is a fast recovery diode.
5. The pulsed current sampling circuit based on CT sampling according to claim 1, wherein the primary side and the secondary side of the current transformer CT have a conversion relationship of:
UR2＝ip×R2/N；
wherein, UR2Is a secondThe voltage of the resistor R2, ip, is the current of the circuit to be sampled, and N is the current transformation ratio of the current transformer CT.
6. The CT sampling based pulse current sampling circuit according to claim 1, wherein the sixth capacitor is a nano-farad capacitor.
7. The CT sampling based pulsed current sampling circuit of claim 1, wherein the first resistance is a reset resistance.
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| CN107271763A (en) * | 2017-06-20 | 2017-10-20 | 常熟开关制造有限公司(原常熟开关厂） | Current sampling circuit, electronic trip unit, breaker |
| CN107968654A (en) * | 2017-12-29 | 2018-04-27 | 浙江九州量子信息技术股份有限公司 | A kind of narrow pulse peak using compensation network |
| CN208367085U (en) * | 2018-06-26 | 2019-01-11 | 成都晶博电气科技有限公司 | A kind of Current Voltage acquisition control module |
| CN110082700A (en) * | 2019-05-13 | 2019-08-02 | 国网天津市电力公司电力科学研究院 | A kind of electric energy meter measurement error on-line monitoring circuit and method based on CT sampling |
| CN110022065A (en) * | 2019-05-16 | 2019-07-16 | 池州学院 | A kind of single-phase grid-connected photovoltaic power generation system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113899941A (en) * | 2021-09-27 | 2022-01-07 | 湖北航天技术研究院总体设计所 | Current acquisition circuit and acquisition method |
| CN113899941B (en) * | 2021-09-27 | 2023-08-18 | 湖北航天技术研究院总体设计所 | Current acquisition circuit and acquisition method |
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