CN219678446U - Antenna interface circuit of camera detector - Google Patents

Abstract

The utility model discloses an antenna interface circuit of a camera detector. The antenna comprises a first inductor, a second inductor, a first antenna unit and a second antenna unit, wherein one end of the first inductor is connected with the first antenna unit through a first capacitor and a first resistor which are sequentially connected in series and grounded through a third capacitor, one end of the second inductor is connected with the second antenna unit through a thirteenth capacitor and a second resistor which are sequentially connected in series and grounded through an eighth capacitor, the third capacitor is sequentially connected with a fourth capacitor, a fifth capacitor, a sixth capacitor and a seventh capacitor in parallel, and the eighth capacitor is sequentially connected with a ninth capacitor, a tenth capacitor, an eleventh capacitor and a twelfth capacitor in parallel. The utility model obtains the total value of the large capacitance through the parallel connection of the plurality of capacitors with small capacitance values, improves the self-resonant frequency of the circuit, reduces the internal resistance of the power supply, thereby avoiding the error of the single large capacitance and improving the reliability of the data detected by the antenna.

Description

Antenna interface circuit of camera detector

Technical Field

The utility model relates to the technical field of electronic circuits, in particular to an antenna interface circuit of a camera detector.

Background

Probes are well known devices for detecting eavesdroppers and/or eavesdroppers. With eavesdropping and the flooding of the eavesdropping equipment, reports of exposure of media news on personal privacy can be heard from time to time, such as clothing store changing rooms, hotel accommodation privacy being shot by stealth, the process of inputting passwords by a bank cash dispenser being shot by stealth, and the like. In this environment, people have to pay more and more attention to their own personal privacy. Therefore, the need for anti-eavesdropping and anti-piracy devices has become urgent in such a context, thereby promoting the market of anti-eavesdropping and anti-piracy detectors.

The detection of the pinhole camera is generally realized through an LED lamp and an observation window, the light generated by the LED lamp is acquired and reflected by the camera, whether a red light spot reflected by the camera exists or not is monitored by the observation window to judge the position of the camera, but the detection of the LED lamp and the observation window is adopted in the prior art, so that the detection is carried out on a large scale and a large space without targets, the time and the labor are consumed, and the place provided with the pinhole camera is missed carelessly. Therefore, some detectors rely on an internal antenna to detect whether a pinhole camera exists nearby based on wireless electromagnetic signals of the vacuum chamber camera in advance, and then carefully look through a viewing window. Therefore, the reliability of the signal detected back by the antenna is that the pinhole camera direct factor will not be missed. In the prior art, an interface circuit is generally disposed between the antenna and the internal chip, and the interface circuit is used to form a connection between the antenna and the chip, and the chip obtains signals transmitted by the antenna. However, the existing antenna interface circuits are generally two kinds, one is complicated in circuit structure, and depends on some signal processing components such as an amplifier and a filter, and although signals are quite reliable and accurate, a circuit board is enlarged, and a common pinhole camera detector is quite small, so that the volume of the detector is increased. The other type of the circuit is a small structure suitable for a detector, namely, the circuit is simple in structure and is directly formed by an EMC filter circuit, but the EMC filter circuit only uses one capacitor as a large capacitor to meet the whole filtering requirement, so that errors are easy to generate in the process of filtering signals, and the signals obtained by the whole filtering process are unreliable.

Disclosure of Invention

Aiming at the defects in the prior art, the utility model aims to provide an antenna interface circuit of a camera detector.

In order to achieve the above purpose, the present utility model adopts the following technical scheme:

the utility model provides an antenna interface circuit of camera detector, includes first inductance, second inductance, first antenna monomer and second antenna monomer, the TX1 terminal foot of radio frequency chip is connected to the one end of first inductance, the other end of first inductance is connected with first antenna monomer through first electric capacity and the first resistance of establishing ties in proper order and is grounded through the third electric capacity, the TX1 terminal foot of radio frequency chip is connected to the one end of second inductance, the other end of second inductance is connected with the second antenna monomer through thirteenth electric capacity and the second resistance of establishing ties in proper order and is grounded through the eighth electric capacity, the third electric capacity has parallelly connected in proper order fourth electric capacity, fifth electric capacity, sixth electric capacity and seventh electric capacity, the eighth electric capacity has parallelly connected ninth electric capacity, tenth electric capacity, eleventh electric capacity and twelfth electric capacity in proper order, the first electric capacity has parallelly connected with the second electric capacity, the thirteenth electric capacity has the fourteenth electric capacity in parallel, the first inductance has the fourth resistance through seventeenth electric capacity connection, the fourth electric resistance is connected with the RX terminal foot of radio frequency chip and is connected through third resistance and radio frequency chip and VMID end connection.

Preferably, the capacitance value added up by the third capacitance and the fourth capacitance is equal to the capacitance value added up by the eighth capacitance and the ninth capacitance; the capacitance value added by the first capacitance and the second capacitance value is equal to the capacitance value added by the thirteenth capacitance and the fourteenth capacitance; the capacitance value added up by the fifth capacitance, the sixth capacitance and the seventh capacitance is equal to the capacitance value added up by the tenth capacitance, the eleventh capacitance and the twelfth capacitance.

Preferably, the connection part of the first resistor and the first inductor is connected with the connection part of the second resistor and the second inductor through an adjustable capacitor.

By adopting the scheme, the utility model uses single filtering as signal processing to meet the design requirement of small structure of the detector, and for the signal processing, the large capacitance total value is obtained through parallel connection among a plurality of capacitors with small capacitance values, the self-resonance frequency of the circuit is improved, the internal resistance of a power supply is reduced, thereby avoiding errors of single large capacitance and improving the reliability of data detected by an antenna; meanwhile, the problem that the whole signal cannot be filtered due to the occurrence of a single capacitor can be avoided, and the design of a plurality of capacitors only slightly reduces the signal filtering effect even if one capacitor has the problem, and the signal cannot be detected directly and is scrapped directly.

Drawings

Fig. 1 is a schematic diagram of a circuit structure according to an embodiment of the present utility model.

Detailed Description

The present utility model will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present utility model more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.

In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present utility model. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the description of the present utility model, it should be noted that the terms "mounted," "connected," and "coupled" are to be construed broadly, as well as, for example, fixedly coupled, detachably coupled, or integrally coupled, unless otherwise specifically indicated and defined. Either mechanically or electrically. Can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.

As shown in fig. 1, the antenna interface circuit of the camera detector provided in this embodiment includes a first inductor L1, a second inductor L2, a first antenna unit L3 and a second antenna unit L4, one end of the first inductor L1 is connected to a TX1 terminal pin of a radio frequency chip, the other end of the first inductor L1 is connected to the first antenna unit L3 in series through a first capacitor C1 and a first resistor R1, which are sequentially connected in series, and is grounded through a third capacitor C3, one end of the second inductor L2 is connected to a TX1 terminal pin of the radio frequency chip, the other end of the second inductor L2 is connected to the second antenna unit L4 in series through a thirteenth capacitor C13 and a second resistor R2, which are sequentially connected in series, and is grounded through an eighth capacitor C8, the third capacitor C3 is sequentially connected in parallel with a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6 and a seventh capacitor C7, the eighth capacitor C8 is sequentially connected in parallel with a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11 and a twelfth capacitor C12, which are sequentially connected to the radio frequency chip, and is connected to the third capacitor C3 through a thirteenth capacitor C1, which is connected in parallel through a thirteenth capacitor C3, which is connected to the third capacitor C4 is connected to the third resistor R4, and is connected to the third capacitor C4.

Further, the connection part of the first resistor R1 and the first inductor L1 is connected with the connection part of the second resistor R2 and the second inductor L2 through the adjustable capacitor C15.

According to the embodiment, the total value of the large capacitors is obtained through parallel connection among the capacitors with the small capacitance values, the self-resonant frequency of the circuit is improved, the internal resistance of a power supply is reduced, errors of the single large capacitor are avoided, and the reliability of data detected by the antenna is improved; meanwhile, the problem that the whole signal cannot be filtered due to the occurrence of a single capacitor can be avoided, and the design of a plurality of capacitors only slightly reduces the signal filtering effect even if one capacitor has the problem, and the signal cannot be detected directly and is scrapped directly.

The circuit principle for this embodiment is described as follows:

firstly, the rf chip of the circuit may adopt FM1722 or MFRC531, where the VMID pin in fig. 1 is the reference voltage value output by the inside, and mainly provides the reference voltage value for the RX pin, the seventeenth capacitor C17 in fig. 1 is mainly used for isolating the dc signal, and the third resistor R3 and the fourth resistor R4 are used for dividing the received ac signal, so as to reach a voltage range suitable for the receiving pin.

Compared with the traditional circuit, the circuit has the main advantages that the original one series capacitor is changed into a plurality of series capacitors, meanwhile, in order to facilitate system debugging, the adjustable capacitor C15 is added, and the first resistor R1 and the second resistor R2 of the adjustable capacitor C are used for finely adjusting the Q values of the antennas (the first antenna unit L3 and the second antenna unit L4). And the first antenna element L3 and the second antenna element L4 are grounded. In order to avoid the error of the large capacitor and improve the working reliability of the system, the circuit obtains the large capacitor through the parallel connection of the small capacitance value capacitor, namely the parallel connection relation between the third capacitor C3 and the fourth capacitor C4, the fifth capacitor C5, the sixth capacitor C6 and the seventh capacitor C7, and the parallel connection relation between the eighth capacitor C8 and the ninth capacitor C9, the tenth capacitor C10, the eleventh capacitor C11 and the twelfth capacitor C12.

Meanwhile, in order to reduce power consumption, the current of the TVDD designed by the circuit is limited to be less than 100 mA. The parallel connection relation of a plurality of capacitors forms a differential circuit, and in order to ensure the symmetry of the differential circuit, the inductance and capacitance values of the capacitors need to satisfy: the capacitance value added up by the third capacitor C3 and the fourth capacitor C4 is equal to the capacitance value added up by the eighth capacitor C8 and the ninth capacitor C9; the capacitance value added up by the first capacitance C1 and the second capacitance C2 is equal to the capacitance value added up by the thirteenth capacitance C13 and the fourteenth capacitance C14; the capacitance value of the fifth, sixth and seventh capacitances C5, C6 and C7 added up is equal to the capacitance value of the tenth, eleventh and twelfth capacitances C10, C11 and C12 added up.

The foregoing description is only of the preferred embodiments of the present utility model, and is not intended to limit the scope of the utility model, but rather is intended to cover any equivalents of the structures or equivalent processes disclosed herein or in the alternative, which may be employed directly or indirectly in other related arts.

Claims (3)

1. An antenna interface circuit of a camera detector is characterized in that: the antenna comprises a first inductor, a second inductor, a first antenna monomer and a second antenna monomer, wherein one end of the first inductor is connected with a TX1 end pin of a radio frequency chip, the other end of the first inductor is connected with the first antenna monomer through a first capacitor and a first resistor which are sequentially connected in series and grounded through a third capacitor, one end of the second inductor is connected with the TX1 end pin of the radio frequency chip, the other end of the second inductor is connected with the second antenna monomer through a thirteenth capacitor and a second resistor which are sequentially connected in series and grounded through an eighth capacitor, the third capacitor is sequentially connected with a fourth capacitor, a fifth capacitor, a sixth capacitor and a seventh capacitor in parallel, the eighth capacitor is sequentially connected with a ninth capacitor, a tenth capacitor, an eleventh capacitor and a twelfth capacitor in parallel, the first capacitor is connected with a fourteenth capacitor in parallel, the first inductor is connected with a fourth resistor through a seventeenth capacitor, the fourth resistor is connected with an RX end pin of the radio frequency chip and grounded through a sixteenth capacitor and the VMresistor of the radio frequency chip.

2. The antenna interface circuit of a camera probe of claim 1, wherein: the capacitance value added up by the third capacitor and the fourth capacitor is equal to the capacitance value added up by the eighth capacitor and the ninth capacitor; the capacitance value added by the first capacitance and the second capacitance value is equal to the capacitance value added by the thirteenth capacitance and the fourteenth capacitance; the capacitance value added up by the fifth capacitance, the sixth capacitance and the seventh capacitance is equal to the capacitance value added up by the tenth capacitance, the eleventh capacitance and the twelfth capacitance.

3. An antenna interface circuit for a camera probe as claimed in claim 2, wherein: the connection part of the first resistor and the first inductor is connected with the connection part of the second resistor and the second inductor through the adjustable capacitor.