CN219678440U - Driving circuit for reducing electromagnetic interference and solid relay - Google Patents

Driving circuit for reducing electromagnetic interference and solid relay Download PDF

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Publication number
CN219678440U
CN219678440U CN202320413742.1U CN202320413742U CN219678440U CN 219678440 U CN219678440 U CN 219678440U CN 202320413742 U CN202320413742 U CN 202320413742U CN 219678440 U CN219678440 U CN 219678440U
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loop
silicon controlled
controlled rectifier
photovoltaic
resistor
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吴盛源
林育超
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Kudom Electronics Technology Xiamen Co ltd
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Kudom Electronics Technology Xiamen Co ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/56—Power conversion systems, e.g. maximum power point trackers

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Abstract

The utility model discloses a driving circuit and a solid relay for reducing electromagnetic interference, which are used for an alternating current power grid and comprise the following components: the photovoltaic MOSFET response loop, the silicon controlled rectifier self-locking loop, the filtering loop, the discharging loop and the alternating current power grid output port; the output port of the alternating current power grid is connected with the alternating current power grid and a load loop; the photovoltaic MOSFET response loop is used for conducting the output port when the light driving signal is received and the voltage between the output ports is larger than the starting voltage of the silicon controlled rectifier self-locking loop; the silicon controlled rectifier self-locking loop is used for matching with the photovoltaic MOSFET response loop to conduct the output port when the voltage between the output ports is smaller than or equal to the starting voltage of the silicon controlled rectifier self-locking loop; the discharging loop is used for discharging the photovoltaic MOSFET response loop to turn off the photovoltaic MOSFET response loop when the light driving signal is received; the solid state relay provided by the utility model has the advantages of the driving circuit, and can be used in occasions with requirements on EMI.

Description

Driving circuit for reducing electromagnetic interference and solid relay
Technical Field
The utility model relates to the technical field of alternating-current solid relays, in particular to a driving circuit for reducing electromagnetic interference and a solid relay.
Background
The solid relay is an electronic switch with isolation function, which is composed of semiconductor device and passive element, and uses photoelectron and microelectronic technique to realize electric coupling and isolation between output end and input end.
In general, an ac solid state relay employs a semiconductor device thyristor as a switching device, so that the solid state relay has a very high switching life.
However, the thyristor causes a loop controlled by the ac solid relay due to factors such as a trigger mode and a holding current, the loop current is not as smooth as voltage, but jumps, and when the loop current is reduced to the holding current, the thyristor is turned off, and the loop current becomes zero instantaneously, so that larger conduction disturbance is caused.
Excessive conduction disturbances can cause equipment to malfunction, rendering ac solid relays unusable where EMI is required.
The above information disclosed in this section is only for understanding the background of the inventive concept of the present disclosure, and thus, the above information may contain information that does not constitute prior art.
Disclosure of Invention
The utility model aims to provide a driving circuit and a solid relay for reducing electromagnetic interference, which can ensure the reliability and effectively reduce the conduction disturbance by adding a filter circuit while realizing the relay function.
To achieve the above object, the solution of the present utility model is: a drive circuit for reducing electromagnetic interference for an ac power grid, comprising: photovoltaic MOSFET response loop, silicon controlled rectifier self-locking loop, discharging loop and AC power grid output port; the output port is connected with an alternating current power grid and a load loop; the photovoltaic MOSFET response loop is used for conducting the output port of the alternating current power grid when the light driving signal is received and the voltage between the output ports is smaller than the starting voltage of the silicon controlled rectifier self-locking loop; the silicon controlled rectifier self-locking loop is used for conducting the output port when the voltage between the output ports is larger than or equal to the starting voltage of the silicon controlled rectifier self-locking loop; and the discharging loop is used for discharging the photovoltaic MOSFET response loop after receiving the light driving signal so as to turn off the photovoltaic MOSFET response loop.
Further, the photovoltaic MOSFET response loop includes: the photovoltaic output optocoupler U1, resistors R9 and R10 and MOS tubes F1 and F2; the alternating current power grid output port comprises a first output port and a second output port of an alternating current power grid; the photovoltaic output optocoupler U1 is externally connected with a control circuit to acquire an optical driving signal; the anode of the photovoltaic output optocoupler U1 is connected with the resistors R9 and R10; the resistor R9 is connected with the grid electrode of the MOS tube F1, and the resistor R10 is connected with the grid electrode of the MOS tube F2; and the cathode of the photovoltaic output optocoupler U1 is connected with the source electrode of the MOS tube F1 and the drain electrode of the MOS tube F2.
Further, the self-locking loop of the silicon controlled rectifier comprises: NPN triode Q1, diode D2, unidirectional thyristors Q3 and Q4, resistors R3, R4, R5, R6 and R7; the anode of the photovoltaic output optocoupler U1 is connected with the collector of the NPN triode Q1; the cathode of the photovoltaic output optocoupler U1 is connected with the anode of the diode D2 and the emitter of the NPN triode Q1 of the resistor R3; the cathode of the unidirectional silicon controlled rectifier Q3 is connected with the anode of the unidirectional silicon controlled rectifier Q4, the first output port and the resistors R4 and R6; the anode of the unidirectional silicon controlled rectifier Q3 is connected with the second output port, the cathode of the unidirectional silicon controlled rectifier Q4 and the resistors R5 and R7; the gate electrode of the unidirectional silicon controlled rectifier Q3 is connected with the drain electrode of the MOS tube F1 of the resistor R6; the gate electrode of the unidirectional silicon controlled rectifier Q4 is connected with the 2 end of the resistor R7 and the source electrode of the MOS tube F2; the resistors R4 and R5 are respectively connected with the resistor R3, the cathode of the diode D2 and the base of the NPN triode Q1, the first output port is connected with the drain electrode of the MOS tube F1 through the resistor R6, and the second output port is connected with the source electrode of the MOS tube F2 through the resistor R7.
Further, the discharge circuit includes: PNP transistor Q2, diode D6, resistors R2 and R13; the base electrode of the PNP triode Q2 is connected with the anode of the diode D6, the resistors R13 and R2 and the anode of the photovoltaic output optocoupler U1; the emitter of the PNP triode Q2 is connected with the cathode of the diode D6, the resistor R13 and the collector of the NPN triode Q1; and the collector electrode of the PNP triode Q2 is connected with the resistor R2 and the cathode of the photovoltaic output optocoupler U1.
Further, the photovoltaic MOSFET self-locking circuit also comprises a filtering circuit, wherein the filtering circuit is used for counteracting conduction disturbance caused by current jump in the photovoltaic MOSFET response circuit, the silicon controlled self-locking circuit and the discharging circuit.
Further, the filtering loop includes: zener diodes D3 and D4; the anode of the zener diode D3 is connected with the first output port; the cathode of the zener diode D3 is connected with the drain electrode of the MOS tube F1; the anode of the zener diode D4 is connected with the second output port; the cathode of the zener diode D4 is connected to the source of the MOS tube F2.
The filter loop further comprises: a bidirectional TVS tube T1; one end of the bidirectional TVS tube T1 is connected with the gate electrode of the unidirectional silicon controlled rectifier Q3, and the other end of the bidirectional TVS tube T1 is connected with the gate electrode of the unidirectional silicon controlled rectifier Q4.
The filter loop further comprises: a varistor MOV1; one end of the piezoresistor MOV1 is connected with the cathode of the unidirectional silicon controlled rectifier Q3, and the other end of the piezoresistor MOV1 is connected with the cathode of the unidirectional silicon controlled rectifier Q4.
The filter loop further comprises: the capacitor C2 and the resistor R14, wherein one end of the capacitor C2 is connected with the cathode of the unidirectional silicon controlled rectifier Q3; the other end of the capacitor C2 is connected with the resistor R14; the resistor R14 is connected with the cathode of the unidirectional silicon controlled rectifier Q4.
The utility model also provides a solid relay which comprises a shell, a PCB, a DBC board, a control circuit and the driving circuit for reducing electromagnetic interference, wherein the PCB and the DBC board are arranged in the shell, and the control circuit and the driving circuit are arranged on the PCB and the DBC board.
Further, the control circuit comprises an input port, a control photovoltaic loop and an indicator light loop; the input port receives an external voltage action; the control photovoltaic loop is used for responding to external voltage and providing a light driving signal for the photovoltaic MOSFET response loop; the indicator light loop is used for indicating the working state.
Further, the input ports include a first input port and a second input port; the control photovoltaic loop comprises a diode D5, a capacitor C1, resistors R1, R8 and R12; the indicator light loop comprises a light emitting diode D1 and a resistor R11; the anode of the diode D5 is connected with the first input port; the cathode of the diode D5 is connected with the anode of the light-emitting diode D1, the resistor R12, the capacitor C1 and the anode of the photovoltaic output optocoupler U1; the cathode of the light-emitting diode D1 is connected with the resistor R11; the resistor R12 is connected with the capacitor C1, the cathode of the photovoltaic output optocoupler U1 and the resistor R1; the resistor R1 is connected with the resistor R8; the second input port is connected with the resistors R8 and R11.
After the scheme is adopted, the gain effect of the utility model is as follows:
1. the driving circuit provided by the utility model adopts the photovoltaic MOSFET response loop to realize that the output port of the alternating current power grid is connected in a conducting way when the alternating current power grid does not reach the triggering condition of the silicon controlled rectifier self-locking loop.
2. The driving circuit provided by the utility model adopts the silicon controlled rectifier self-locking loop to realize that the alternating current power grid is matched with the photovoltaic MOSFET response loop to realize that the output port of the alternating current power grid is connected in a conducting way when the triggering condition of the silicon controlled rectifier self-locking loop is reached.
3. The driving circuit provided by the utility model adopts the MOSFET discharging loop to conduct rapid discharging so as to rapidly turn off the output port of the alternating current power grid.
4. The driving circuit provided by the utility model adopts a filter loop to reduce electromagnetic interference.
5. The solid state relay provided by the utility model has the advantages of the driving circuit, and can be used in occasions with requirements on EMI.
6. The solid relay provided by the utility model is safe and reliable by adopting the control loop to be matched with the driving circuit.
7. The driving circuit and the solid relay provided by the utility model realize the adjustment of the starting voltage of the silicon controlled self-locking loop, namely the zero crossing voltage of the sine wave of the alternating current power grid by utilizing the partial pressure matching of R3, R4 and R5.
Drawings
FIG. 1 is a schematic diagram of a driving circuit and a control circuit according to the present utility model;
FIG. 2 is a schematic diagram of the solid state relay of the present utility model;
FIG. 3 is a schematic diagram of an exploded construction of the solid state relay of the present utility model;
Detailed Description
Hereinafter, embodiments of the present utility model will be described more fully. The utility model is capable of various embodiments and of modifications and variations therein. However, it should be understood that: there is no intention to limit the scope of the utility model to the specific embodiments disclosed herein, but rather the utility model is to be understood to cover all modifications, equivalents, and/or alternatives falling within the spirit and scope of the various embodiments of the utility model.
The present utility model will be described in detail with reference to fig. 1 to 3.
The utility model provides a driving circuit for reducing electromagnetic interference, which is used for an alternating current power grid and comprises the following components: the photovoltaic MOSFET response loop, the silicon controlled rectifier self-locking loop, the discharging loop, the filtering loop and the output alternating current power grid port; the AC power grid port is connected with an AC power grid and a load loop; the photovoltaic MOSFET response loop is used for conducting the output port when the light driving signal is received and the voltage between the ports of the alternating current power grid is smaller than or equal to the starting voltage of the silicon controlled rectifier self-locking loop; the silicon controlled rectifier self-locking loop is used for matching with the photovoltaic MOSFET response loop to conduct the output port when the voltage between the ports of the alternating current power grid is larger than the starting voltage of the silicon controlled rectifier self-locking loop; and the discharging loop is used for discharging the photovoltaic MOSFET response loop to turn off the photovoltaic MOSFET response loop when the voltage between the ports of the alternating current power grid is larger than the starting voltage of the silicon controlled rectifier self-locking loop, and the filtering loop is used for counteracting conduction disturbance caused by current jump in the photovoltaic MOSFET response loop, the silicon controlled rectifier self-locking loop and the discharging loop.
Specifically, the ac ports include ac grid port 1 and ac grid port 2
Specifically, the photovoltaic MOSFET response loop includes: the photovoltaic output optocoupler U1, the resistors R9 and R10 and the MOS tubes F1 and F2, wherein the anode of the photovoltaic output optocoupler U1 is connected with the resistors R9 and R10, the resistor R9 is connected with the grid of the MOS tube F1, the resistor R10 is connected with the grid of the MOS tube F2, the cathode of the photovoltaic output optocoupler U1 is connected with the source of the MOS tube F1 and the drain of the MOS tube F2, the drain of the MOS tube F1 is connected with the AC grid port 1, and the source of the MOS tube F2 is connected with the AC grid port 2 of the AC grid port.
Specifically, the silicon controlled self-locking loop comprises: the device comprises an NPN triode Q1, a diode D2, unidirectional thyristors Q3 and Q4, resistors R3, R4, R5, R6 and R7, wherein the anode of a photovoltaic output optocoupler U1 is connected with the collector of the NPN triode Q1, the cathode of the photovoltaic output optocoupler U1 is connected with the resistor R3, the anode of the diode D2 and the emitter of the NPN triode Q1, the cathode of the unidirectional thyristors Q3 is connected with the anode of the unidirectional thyristors Q4, an alternating current power grid port 1, resistors R4 and R6, the anode of the unidirectional thyristors Q3 is connected with an alternating current port 2, the cathode of the unidirectional thyristors Q4, the resistors R5 and R7, and the gate of the unidirectional thyristors Q3 is connected with the resistor R6 and the drain electrode of a MOS tube F1; the gate electrode of the unidirectional silicon controlled rectifier Q4 is connected with the resistor R7 and the source electrode of the MOS tube F2; the resistors R4 and R5 are connected with the resistor R3, the cathode of the diode D2 and the base of the NPN triode Q1.
Specifically, the discharge circuit includes: PNP triode Q2, diode D6, resistors R2, R13; the base electrode of the PNP triode Q2 is connected with the anode of the diode D6, the resistor R13, the resistor R2 and the anode of the photovoltaic output optocoupler U1, the emitter electrode of the PNP triode Q2 is connected with the cathode of the diode D6, the resistor R13 and the collector electrode of the NPN triode Q1, and the collector electrode of the PNP triode Q2 is connected with the resistor R2 and the cathode of the photovoltaic output optocoupler U1.
Specifically, the photovoltaic MOSFET self-locking circuit also comprises a filtering circuit, wherein the filtering circuit is used for counteracting conduction disturbance caused by current jump in the photovoltaic MOSFET response circuit, the silicon controlled self-locking circuit and the discharging circuit.
Specifically, the filtering loop includes zener diodes D3 and D4, where an anode of the zener diode D3 is connected to the first output port of the ac power grid, a cathode of the zener diode D3 is connected to the drain of the MOS tube F2, an anode of the zener diode D4 is connected to the second output port of the ac power grid, and a cathode of the zener diode D4 is connected to the drain of the MOS tube F2.
Specifically, the filtering loop further includes a bidirectional TVS tube T1, one end of the bidirectional TVS tube T1 is connected to the gate electrode of the unidirectional thyristor Q3, and the other end of the bidirectional TVS tube T1 is connected to the gate electrode of the unidirectional thyristor Q4.
Specifically, the filter circuit further comprises a piezoresistor MOV1, one end of the piezoresistor MOV1 is connected with the cathode of the unidirectional silicon controlled rectifier Q3, and the other end of the piezoresistor MOV1 is connected with the cathode of the unidirectional silicon controlled rectifier Q4.
Specifically, the filter circuit further includes a capacitor C2 and a resistor R14, one end of the capacitor C2 is connected to the cathode of the unidirectional thyristor Q3, the other end of the capacitor C2 is connected to the resistor R14, and the resistor R14 is connected to the cathode of the unidirectional thyristor Q4.
The utility model also provides a solid state relay 000, as shown in fig. 2 and 3, comprising a shell 100, a PCB board 200, a DBC board 300, a control circuit 400 and the driving circuit 500, wherein the PCB board and the DBC board are arranged in the shell, the control circuit and the driving circuit are arranged on the PCB board and the DBC board, and the photovoltaic output optocoupler U1, the MOS transistors F1 and F2, the unidirectional thyristors Q3 and Q4, the triode Q1, the PNP triode Q2, the diodes D2 and D6, the zener diodes D3 and D4, the bidirectional TVS diode T1, the varistor MOV1, the capacitor C2, the resistors R2, R3, R4, R5, R6, R7, R9, R10, R13 and R14 in the driving circuit 500 are electrically connected through the PCB board and/or the DBC board.
Specifically, the control circuit comprises an input port, a control photovoltaic loop and an indicator light loop; the input port receives an external voltage action; the control photovoltaic loop is used for responding to external voltage and providing a light driving signal for the photovoltaic MOSFET response loop; the indicator light loop is used for indicating the working state.
Specifically, the input ports include a first input port and a second input port; the control photovoltaic loop comprises a diode D5, a capacitor C1, resistors R1, R8 and R12; the indicator light loop comprises a light emitting diode D1 and a resistor R11; the anode of the diode D5 is connected with the first input port, the cathode of the diode D5 is connected with the anode of the light emitting diode D1, the resistor R12, the capacitor C1 and the anode of the photovoltaic output optocoupler U1, the cathode of the light emitting diode D1 is connected with the resistor R11, the resistor R12 is connected with the capacitor C1 and the cathode of the photovoltaic output optocoupler U1 and the resistor R1, the resistor R1 is connected with the resistor R8, and the second input port is connected with the resistors R8 and R11.
Solid state relay theory of operation:
the grid voltage is sinusoidal alternating voltage, which is connected across the drive module, i.e. the voltage across the drive circuit is also sinusoidal alternating current which varies with time.
The alternating current power grid is connected to two ends of an output port of the alternating current power grid, the alternating current power grid provides sine alternating current, when an input port of the control circuit receives external voltage, the photovoltaic loop and the indicator lamp loop are controlled to be conducted, the photovoltaic output optical coupler U1 is conducted, and at the moment, the other end of the photovoltaic output optical coupler U1 can generate 8V alternating voltage;
when the voltage change between the ports of the alternating current power grid is smaller than the starting voltage of the silicon controlled rectifier self-locking loop, namely zero crossing voltage: the base potential of an NPN triode Q1 of the self-locking loop of the silicon controlled rectifier is insufficient to enable the triode Q1 to be conducted, namely the triode Q1 is turned off, so that the grid voltages of MOS tubes F1 and F2 in a response loop of the photovoltaic MOSFET meet the requirement that the MOS tubes F1 and F2 are conducted, the junction voltages of the source and drain ends of the MOS tube F1 and the MOS tube F2 are smaller, the one-way silicon controlled rectifier Q3 and Q4 cannot be triggered to be conducted, the silicon controlled rectifier Q3 and Q4 are turned off, and at the moment, the loop current of the driving circuit is provided by the response loop of the photovoltaic MOSFET, namely the response loop of the photovoltaic MOSFET ensures that the loop current is not zero instantaneously when the silicon controlled rectifier is turned off;
when the voltage between the ports of the alternating current power grid is changed to be greater than or equal to the starting voltage of the silicon controlled self-locking loop, namely zero crossing voltage: the base potential of an NPN triode Q1 of the self-locking circuit of the silicon controlled rectifier meets the condition that the triode Q1 enters a conducting state, namely the triode Q1 is conducted, so that grid voltages of MOS tubes F1 and F2 in a photovoltaic MOSFET response circuit are insufficient, the MOS tubes F1 and F2 are conducted, junction voltages at both source ends and drain ends of the MOS tubes F1 and F2 are enough to trigger the one-way silicon controlled rectifier Q3 and Q4 to be conducted, the silicon controlled rectifier Q3 and Q4 are conducted, and at the moment, loop current of the driving circuit is provided by the self-locking circuit of the silicon controlled rectifier, namely the photovoltaic MOSFET response circuit does not provide loop current when the silicon controlled rectifier is conducted;
in summary, the voltage at the output end of the ac power grid is sinusoidal ac, which varies periodically to a voltage less than zero crossing and greater than or equal to the ac voltage, and the photovoltaic MOSFET response loop and the thyristor self-locking loop alternately provide loop current periodically, which varies more gradually as the ac power grid voltage varies than if only the thyristor self-locking loop provides current.
In the utility model, the resistors R3, R4 and R5 of the self-locking circuit of the silicon controlled rectifier play a role in zero crossing, which determines the starting voltage of the self-locking circuit of the silicon controlled rectifier, namely the voltage of the zero crossing point of the sine wave of the alternating current, and the resistors R6 and R7 play a role in controlling the current magnitude of the conduction of the silicon controlled rectifier, which can avoid jumping under the influence of interference when the solid relay is conducted at the zero crossing point, thereby playing a role in reducing the conduction electromagnetic interference;
the diode D5 of the control circuit protects the control circuit from reverse turn-on;
the TVS tube T1 of the photovoltaic MOSFET response loop has the function of triggering the silicon controlled rectifier at the output end to be conducted when surge voltage exists at the two ends of the output and the voltage exceeds the action voltage of the TVS, so that the silicon controlled rectifier is prevented from being damaged due to overvoltage, and the protection function is achieved;
the voltage dependent resistor MOV1 of the filter circuit has the function that when surge voltage is arranged at two ends of the output, and the surge voltage exceeds the action voltage of the voltage dependent resistor, the voltage dependent resistor acts to absorb the energy of the surge voltage and convert the energy into heat, and the positive and negative rotation module is prevented from generating overvoltage breakdown, so that the protection function is realized; the capacitor C2 and the resistor R14 are connected in series to form an RC absorption loop, so that unidirectional thyristors Q3 and Q4 of the unidirectional thyristor loop are protected, in order to inhibit impact on devices caused by instantaneous voltage variation dV/dt in the circuit, when an inductive load is applied, a self-induced electromotive force is generated according to a corrugated law when the magnetic flux of the inductive load is not zero at the moment in the moment when the switching device is turned off, and the external magnetic fields are used for storing energy, and for simplicity, the RC absorption loop is adopted to consume part of energy in a heat energy mode.
The resistor R13 and the diode D6 of the discharge loop are rapidly discharged, so that the circuit achieves the effect of rapid turn-off;
in order to play a role in reverse protection of the triode Q1, the diode D2 of the self-locking circuit of the silicon controlled rectifier divides the voltage of the triode Q1 in the circuit.
In summary, the driving circuit provided by the utility model adopts the photovoltaic MOSFET response loop to realize that the output port of the alternating current power grid is connected in a conducting way when the alternating current power grid does not reach the triggering condition of the silicon controlled rectifier self-locking loop, namely, the loop current is provided; the driving circuit provided by the utility model adopts the silicon controlled rectifier self-locking loop to realize that the output port of the alternating current power grid is connected in a conducting way when the alternating current power grid reaches the triggering condition of the silicon controlled rectifier self-locking loop by matching with the photovoltaic MOSFET response loop, namely, the loop current is provided; the driving circuit provided by the utility model adopts the MOSFET discharging loop to carry out rapid discharging so as to rapidly turn off the output port of the alternating current power grid; the driving circuit provided by the utility model adopts a filter circuit to reduce electromagnetic interference; the solid relay provided by the utility model has the advantages of the driving circuit, and can be used in occasions with requirements on EMI; the solid relay provided by the utility model is also realized by adopting a control loop matched with the driving circuit, and is safe and reliable; the driving circuit and the solid relay provided by the utility model realize the adjustment of the starting voltage of the silicon controlled rectifier self-locking loop, namely the zero crossing voltage, by utilizing the voltage division fit of the resistors R3, R4 and R5.
The above embodiments are only preferred embodiments of the present utility model, and are not limited to the present utility model, and all equivalent changes made according to the design key of the present utility model fall within the protection scope of the present utility model.

Claims (7)

1. A drive circuit for reducing electromagnetic interference for an ac power grid, comprising: photovoltaic MOSFET response loop, silicon controlled rectifier self-locking loop, discharging loop and AC power grid output port; the output port is connected with an alternating current power grid and a load loop; the photovoltaic MOSFET response loop is used for conducting the output port of the alternating current power grid when the light driving signal is received and the voltage between the output ports is smaller than the starting voltage of the silicon controlled rectifier self-locking loop; the silicon controlled rectifier self-locking loop is used for conducting the output port when the voltage between the output ports is larger than or equal to the starting voltage of the silicon controlled rectifier self-locking loop; and the discharging loop is used for discharging the photovoltaic MOSFET response loop after receiving the light driving signal so as to turn off the photovoltaic MOSFET response loop.
2. A driving circuit for reducing electromagnetic interference as defined in claim 1, wherein: the photovoltaic MOSFET response loop includes: the photovoltaic output optocoupler U1, resistors R9 and R10 and MOS tubes F1 and F2; the alternating current power grid output port comprises a first output port and a second output port of an alternating current power grid; the photovoltaic output optocoupler U1 is externally connected with a control circuit to acquire an optical driving signal; the anode of the photovoltaic output optocoupler U1 is connected with the resistors R9 and R10; the resistor R9 is connected with the grid electrode of the MOS tube F1, and the resistor R10 is connected with the grid electrode of the MOS tube F2; and the cathode of the photovoltaic output optocoupler U1 is connected with the source electrode of the MOS tube F1 and the drain electrode of the MOS tube F2.
3. A driving circuit for reducing electromagnetic interference as defined in claim 2, wherein: the silicon controlled self-locking loop comprises: NPN triode Q1, diode D2, unidirectional thyristors Q3 and Q4, resistors R3, R4, R5, R6 and R7; the anode of the photovoltaic output optocoupler U1 is connected with the collector of the NPN triode Q1; the cathode of the photovoltaic output optocoupler U1 is connected with the anode of the diode D2 and the emitter of the NPN triode Q1 of the resistor R3; the cathode of the unidirectional silicon controlled rectifier Q3 is connected with the anode of the unidirectional silicon controlled rectifier Q4, the first output port and the resistors R4 and R6; the anode of the unidirectional silicon controlled rectifier Q3 is connected with the second output port, the cathode of the unidirectional silicon controlled rectifier Q4 and the resistors R5 and R7; the gate electrode of the unidirectional silicon controlled rectifier Q3 is connected with the drain electrode of the MOS tube F1 of the resistor R6; the gate electrode of the unidirectional silicon controlled rectifier Q4 is connected with the 2 end of the resistor R7 and the source electrode of the MOS tube F2; the resistors R4 and R5 are respectively connected with the resistor R3, the cathode of the diode D2 and the base of the NPN triode Q1, the first output port is connected with the drain electrode of the MOS tube F1 through the resistor R6, and the second output port is connected with the source electrode of the MOS tube F2 through the resistor R7.
4. A driving circuit for reducing electromagnetic interference as defined in claim 3, wherein: the discharge circuit includes: PNP transistor Q2, diode D6, resistors R2 and R13; the base electrode of the PNP triode Q2 is connected with the anode of the diode D6, the resistors R13 and R2 and the anode of the photovoltaic output optocoupler U1; the emitter of the PNP triode Q2 is connected with the cathode of the diode D6, the resistor R13 and the collector of the NPN triode Q1; and the collector electrode of the PNP triode Q2 is connected with the resistor R2 and the cathode of the photovoltaic output optocoupler U1.
5. The driving circuit for reducing electromagnetic interference of claim 4, further comprising a filter loop for canceling conduction disturbances caused by current jumps in the photovoltaic MOSFET response loop, the thyristor self-locking loop, and the discharge loop.
6. The driving circuit for reducing electromagnetic interference of claim 5, wherein the filter circuit comprises: zener diodes D3 and D4; the anode of the zener diode D3 is connected with the first output port; the cathode of the zener diode D3 is connected with the drain electrode of the MOS tube F1; the anode of the zener diode D4 is connected with the second output port; the cathode of the zener diode D4 is connected with the source electrode of the MOS tube F2; the filter loop further comprises: a bidirectional TVS tube T1; one end of the bidirectional TVS tube T1 is connected with the gate electrode of the unidirectional silicon controlled rectifier Q3, and the other end of the bidirectional TVS tube T1 is connected with the gate electrode of the unidirectional silicon controlled rectifier Q4; the filter loop further comprises: a varistor MOV1; one end of the piezoresistor MOV1 is connected with the cathode of the unidirectional silicon controlled rectifier Q3, and the other end of the piezoresistor MOV1 is connected with the cathode of the unidirectional silicon controlled rectifier Q4; the filter loop further comprises: the capacitor C2 and the resistor R14, wherein one end of the capacitor C2 is connected with the cathode of the unidirectional silicon controlled rectifier Q3; the other end of the capacitor C2 is connected with the resistor R14; the resistor R14 is connected with the cathode of the unidirectional silicon controlled rectifier Q4.
7. A solid state relay comprising a housing, a PCB board, a DBC board, a control circuit, and a driving circuit for reducing electromagnetic interference according to any one of claims 1-6, wherein the PCB board and the DBC board are mounted in the housing, and the control circuit and the driving circuit are disposed on the PCB board and the DBC board.
CN202320413742.1U 2023-03-07 2023-03-07 Driving circuit for reducing electromagnetic interference and solid relay Active CN219678440U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202320413742.1U CN219678440U (en) 2023-03-07 2023-03-07 Driving circuit for reducing electromagnetic interference and solid relay

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202320413742.1U CN219678440U (en) 2023-03-07 2023-03-07 Driving circuit for reducing electromagnetic interference and solid relay

Publications (1)

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CN219678440U true CN219678440U (en) 2023-09-12

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Application Number Title Priority Date Filing Date
CN202320413742.1U Active CN219678440U (en) 2023-03-07 2023-03-07 Driving circuit for reducing electromagnetic interference and solid relay

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CN (1) CN219678440U (en)

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