CN219644146U

CN219644146U - Dimmable driving circuit

Info

Publication number: CN219644146U
Application number: CN202223397258.9U
Authority: CN
Inventors: 赵磊
Original assignee: Opple Lighting Co Ltd; Suzhou Op Lighting Co Ltd
Current assignee: Opple Lighting Co Ltd; Suzhou Op Lighting Co Ltd
Priority date: 2022-12-16
Filing date: 2022-12-16
Publication date: 2023-09-05
Anticipated expiration: 2032-12-16

Abstract

The utility model provides a dimmable driving circuit, comprising: the front-stage converter is coupled with an external power supply and outputs a first voltage; the dimming driving module is coupled with the front-stage converter and an external load, receives the first voltage, outputs a second voltage and drives the external load to work; a first detection circuit coupled to the pre-stage converter, receiving the first voltage, and outputting a first detection signal indicative of the first voltage; the second detection circuit is coupled with the dimming driving module, receives the second voltage and outputs a second detection signal representing the second voltage; the main control module receives the first detection signal and the second detection signal, outputs an adjusting signal, and sends the adjusting signal to the pre-stage converter, wherein the pre-stage converter adjusts the value of the first voltage, and the ratio of the second voltage to the first voltage is maintained at a preset value. The dimming driving circuit can reduce the setbacks in the dimming process as much as possible.

Description

Dimmable driving circuit

Technical Field

The utility model relates to the technical field of integrated circuit design, in particular to a dimming driving circuit.

Background

The development of intelligent lighting has rapidly increased in recent two years, and during this time, the dimming function has been touted in particular. At present, an excellent intelligent lighting can require a dimming driving circuit to have a smooth dimming effect, so that the whole visual effect is more comfortable, and the requirement of human eyes on optics is met; i.e. the dimming effect requires no jitter in any one of the brightness and dimming processes, since the jitter of the light gives a dangerous feeling. PWM chopper dimming is a dimming driving scheme with very high cost performance, and can realize dimming depth of one thousandth or even one thousandth deeper on dimming depth, thereby meeting various dimming requirements.

However, researchers have studied that if the change of the front and rear PWM dimming signals falls exactly in the discharge period of the inductor, the current of the inductor does not actually increase and the brightness of the lamp does not change. Referring to fig. 1, in the lower diagram, the active high level of the former PWM dimming signal continues to the a position, the active high level of the latter PWM dimming signal continues to the b position, i.e. the lengths of the active high levels of the front PWM dimming signal and the rear PWM dimming signal change from the a position to the b position, which increases, and theoretically the brightness of the lamp changes to be bright; however, since the two PWM dimming signals are changed just in the discharge period of the inductor, as shown in the dotted line period (the operating frequency of the inductor is otherwise determined), the current of the inductor (the current flowing through the lamp beads) does not actually increase, so that the brightness of the lamp beads does not change. When the effective high level of the following PWM dimming signal falls in the charging period of the inductor, the current of the inductor directly works according to the current corresponding to the following PWM dimming signal, namely the current directly jumps and increases, the brightness of the lamp beads directly jumps and becomes brighter, and the current is a pause (shake) in dimming; this frustration is even more pronounced if the variation of successive PWM dimming signals falls within the discharge period of the inductor.

In this regard, one solution that directly corresponds to this is to detect and determine the effective high level time of the PWM dimming signal and the charging period and the discharging period of the inductor, so that the effective high level time of the PWM dimming signal falls as much as possible in the charging period of the inductor, but it is obvious that the implementation of this solution is unusually difficult. The inventor of the present utility model proposes that if the duty ratio of the PWM chopper dimming circuit is increased as much as possible, for example, 100% in the extremely ideal state, that is, the ratio of the output voltage to the input voltage of the PWM chopper dimming circuit is increased, the discharge period of the inductor can be reduced as much as possible, as shown by the dotted line period in fig. 2, so that the change of the PWM dimming signal can be avoided as much as possible in the discharge period of the inductor, thereby reducing the frustration of dimming. The inventors of the present utility model have therefore proposed the solution of the present utility model.

Disclosure of Invention

The utility model aims to provide a dimming driving circuit which can reduce the setbacks of a dimming process as much as possible.

In order to achieve the above purpose, the present utility model provides the following technical scheme:

the utility model provides a dimmable driving circuit, comprising:

the front-stage converter is coupled with an external power supply and outputs a first voltage;

the dimming driving module is coupled with the front-stage converter and an external load, receives the first voltage, outputs a second voltage and drives the external load to work;

a first detection circuit coupled to the pre-stage converter, receiving the first voltage, and outputting a first detection signal indicative of the first voltage;

the second detection circuit is coupled with the dimming driving module, receives the second voltage and outputs a second detection signal representing the second voltage;

the main control module is coupled with the first detection circuit, the second detection circuit and the front-stage converter, receives the first detection signal and the second detection signal, outputs an adjusting signal and sends the adjusting signal to the front-stage converter, the front-stage converter adjusts the value of the first voltage, and the ratio of the second voltage to the first voltage is maintained at a preset value.

In an embodiment, the dimmable driving circuit further includes a voltage reference and a feedback loop, where the voltage reference and the feedback loop are both coupled to the main control module and the pre-stage converter, receive the adjustment signal output by the main control module, generate a feedback signal, and send the feedback signal to the pre-stage converter, and the pre-stage converter adjusts the value of the first voltage according to the feedback signal.

In an embodiment, the main control module includes a main control chip, the main control chip has a first pin as a power pin, and is coupled to a working power supply; the main control chip is provided with a first detection pin which is coupled with the first detection circuit and used for receiving the first detection signal output by the first detection circuit; the main control chip is provided with a third pin which is a second detection pin and is coupled with the second detection circuit, and receives the second detection signal output by the second detection circuit; the main control chip is provided with a third pin which is an adjusting signal output pin and outputs the adjusting signal; the main control chip is provided with an eighth pin which is a grounding pin and is coupled with signal ground.

In an embodiment, the master control chip has a seventh pin as a dimming signal output pin, and is coupled to the dimming driving module to output a dimming signal to the dimming driving module.

In an embodiment, the dimming driving module includes a dimming chip, the dimming chip has a second pin as a dimming signal input pin, and is coupled with a signal ground through a second resistor; the dimming chip is provided with a third pin which is a power pin, is coupled with signal ground through a first capacitor, is coupled with the front-stage converter through a first resistor and receives the first voltage; the dimming chip is provided with a fifth pin serving as a driving pin, is coupled with the external load through a second inductor and is coupled with the pre-stage converter through a first diode, the anode of the first diode is coupled with the first voltage, and the cathode of the first diode is coupled with the fifth pin of the dimming chip; the dimming chip is provided with a seventh pin which is a grounding pin and is coupled with signal ground.

In an embodiment, the dimming driving module is a PWM chopper dimming driving circuit, and the dimming signal is a PWM signal.

In an embodiment, the first detection circuit includes a ninth resistor and an eleventh resistor connected in series, a free end of the ninth resistor is coupled to the pre-stage converter, the free end of the eleventh resistor is coupled to signal ground, and a coupling point of the ninth resistor and the eleventh resistor outputs the first detection signal; the second detection circuit comprises a fourth resistor and a tenth resistor which are connected in series, the free end of the fourth resistor is coupled with the dimming driving module and receives the second voltage, the free end of the tenth resistor is coupled with signal ground, and the coupling point of the fourth resistor and the tenth resistor outputs the second detection signal.

In an embodiment, the voltage reference and feedback loop includes a reference voltage chip and an optocoupler, the reference voltage chip having a third pin that is a ground pin, coupled to signal ground; the reference voltage chip is provided with a second pin which is a power supply pin, and is coupled with the front-stage converter through a sixteenth resistor and a seventeenth resistor which are connected in series to receive the first voltage; the reference voltage chip is provided with a first pin which is an adjusting pin, is coupled with the main control module through a twenty-third resistor and receives the adjusting signal, is also coupled with signal ground through a twenty-third resistor, is also coupled with the pre-stage converter through an eighteenth resistor and is also coupled with a second pin of the reference voltage chip through an eighth capacitor and a twenty-first resistor which are connected in series; the optocoupler is provided with a first pin and a second pin which are connected in parallel with two ends of the seventeenth resistor, is provided with a third pin and is coupled with a power supply ground, is provided with a fourth pin and is coupled with the front-stage converter, outputs the feedback signal and sends the feedback signal to the front-stage converter.

In an embodiment, the pre-stage converter includes an auxiliary control chip, a power tube and a transformer, the auxiliary control chip has an eighth pin as a feedback pin, and is coupled with the voltage reference and the feedback loop, and receives feedback signals provided by the voltage reference and the feedback loop, and the eighth pin of the auxiliary control chip is further coupled with a power supply ground via a third capacitor; the auxiliary control chip is provided with a second pin which is a power supply pin, is coupled with the transformer through a sixth resistor and a third diode which are connected in series, and is also coupled with power supply ground through a third electrolytic capacitor; the auxiliary control chip is provided with a seventh pin which is a grounding pin and is coupled with a power supply ground; the auxiliary control chip is provided with a fifth pin which is a control pin and is coupled with the transformer through the power tube.

In an embodiment, the pre-stage converter further includes a rectifier bridge, an input end of the rectifier bridge is coupled to the external power source, and a first electrolytic capacitor is connected in parallel between two ends of an output end of the rectifier bridge and is further coupled to the transformer.

Compared with the prior art, the technical scheme of the utility model has the following beneficial effects:

according to the dimming driving circuit, the first voltage (namely the input voltage of the dimming driving module) output by the front-stage converter, the second voltage (namely the output voltage of the dimming driving module) output by the dimming driving module are obtained, and the value of the first voltage output by the front-stage converter is regulated according to different load voltages (such as different external loads, namely the second voltage) and the preset value of the ratio of the second voltage to the first voltage (the highest value of the duty ratio of the dimming driving module), so that the ratio of the second voltage to the first voltage is maintained at the preset value, the discharging period of the inductor in the dimming driving module is reduced, the probability that the change of a dimming signal falls in the discharging period of the inductor is avoided as much as possible, the pause and frustration in the dimming process is reduced, and the use experience of a user is improved.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of waveforms of current and dimming signals of an inductor in a prior art dimmable driving circuit;

FIG. 2 is a schematic diagram of a waveform of current flowing through an inductor in a dimmable driving circuit according to the present utility model;

fig. 3 is a schematic structural diagram of a dimmable driving circuit according to a first embodiment of the present utility model.

Detailed Description

The following description of the technical solutions in the embodiments of the present utility model will be clear and complete, and it is obvious that the described embodiments are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to fall within the scope of the utility model.

The technical scheme of the utility model provides a dimmable driving circuit, which is described in detail below. It should be noted that the following description order of the embodiments is not intended to limit the preferred order of the embodiments of the present utility model. In the following embodiments, the descriptions of the embodiments are focused on, and for the part that is not described in detail in a certain embodiment, reference may be made to the related descriptions of other embodiments.

Referring to fig. 3, a first embodiment of the present utility model provides a dimmable driving circuit, comprising:

a pre-stage converter 10 coupled to an external power source and outputting a first voltage V1;

the dimming driving module 20 is coupled to both the pre-stage converter 10 and the external load 70, receives the first voltage V1, outputs a second voltage V2, and drives the external load 70 to operate;

a first detection circuit 30 coupled to the pre-stage converter 10, receiving the first voltage V1, and outputting a first detection signal adc_v1 indicative of the first voltage V1;

a second detection circuit 40, coupled to the dimming driving module 20, for receiving the second voltage V2 and outputting a second detection signal adc_v2 representing the second voltage V2;

the main control module 50 is coupled to the first detection circuit 30, the second detection circuit 40, and the pre-stage converter 10, receives the first detection signal adc_v1 and the second detection signal adc_v2, outputs the adjustment signal dac_adj, and sends the adjustment signal dac_adj to the pre-stage converter 10, wherein the pre-stage converter 10 adjusts the value of the first voltage V1, and the ratio of the second voltage V2 to the first voltage V1 is maintained at a preset value.

The first voltage V1 is provided to the dimming driving module 20, and may also be referred to as an input voltage of the dimming driving module 20. The second voltage V2 is output from the dimming driving module 20, which may be also referred to as an output voltage of the dimming driving module 20, and is applied to the external load 70, which may be also referred to as a load voltage. In an embodiment, the external load 70 is an LED light bulb, and a plurality of or a plurality of groups of LED light bulbs may be connected in series and/or in parallel; the second voltage V2 is applied to the negative electrode of the LED lamp bead, and the positive electrode of the LED lamp bead is coupled to the first voltage V1. The ratio of the second voltage V2 to the first voltage V1 may also be referred to as the duty ratio D of the dimming driving module 20. In general, the highest value of the duty ratio D of one dimming driving module 20 can be determined according to various parameter requirements of the dimming driving module 20 and the following test verification during design, and the highest value of the determined duty ratio D is stored in the dimming driving module 20 as the preset value. For example, in a specific embodiment, the highest value of the duty cycle D may be 94%, or 95%. In general, the duty cycle D is greater than 80%, in particular greater than 90%, preferably. According to the utility model, by detecting the load voltage (the second voltage V2 is different when different external loads 70 are coupled), the first voltage V1 (the input voltage of the dimming driving module 20) is adjusted, so that the ratio of the second voltage V2 to the first voltage V1 is maintained at a preset value, i.e. a higher duty ratio D, such as 94% or 95%, so that the discharge period of the inductor in the dimming driving module 20 is as small as possible no matter what external load 70 is coupled, the change of the dimming signal is prevented from falling in the discharge period of the inductor as much as possible, and the dimming frustration is reduced, and better use experience is provided for users.

In an embodiment, the main control module 50 includes a main control chip U5, where the main control chip U5 has a first pin as a power pin, and is coupled to a working power supply; the main control chip U5 has a second pin as a first detection pin CS/PA7, and is coupled to the first detection circuit 30 to receive the first detection signal ADC_V1 output by the first detection circuit 30; the main control chip U5 has a third pin that is a second detection pin TKS/PA6, and is coupled to the second detection circuit 40, and receives the second detection signal adc_v2 output by the second detection circuit 40; the main control chip U5 is provided with a third pin which is an adjusting signal output pin RSTB/PA5 and outputs the adjusting signal DAC_ADJ; the main control chip U5 has an eighth pin, which is a ground pin, and is coupled to the signal ground SGND. As described above, the main control module 50 stores a preset value of the ratio of the second voltage V2 to the first voltage V1, that is, the highest value of the duty ratio D of the dimming driving module 20; and the obtained first detection signal adc_v1 actually represents the actual value of the first voltage V1, the obtained second detection signal adc_v2 actually represents the actual value of the second voltage V2, and thus an adjustment signal dac_adj can be output after the judgment, comparison and calculation to represent the ideal value that the first voltage V1 should reach. For example, in one embodiment, the current actual value of the first voltage V1 is 24V, but the comparison calculation is performed in combination with the second voltage V2 and the highest value (preset value) of the duty ratio D, so that the ideal value of the first voltage V1 should be 22V, and the output adjustment signal dac_adj represents the 22V.

In one embodiment, the adjustment signal DAC_ADJ is an analog signal. This analog signal does not directly control the pre-converter 10 to vary the output first voltage V1. Therefore, in an embodiment, the dimmable driving circuit further includes a voltage reference and feedback loop 60, where the voltage reference and feedback loop 60 is coupled to both the main control module 50 and the pre-stage converter 10, receives the adjustment signal dac_adj output by the main control module 50, generates a feedback signal FB, and sends the feedback signal FB to the pre-stage converter 10, and the pre-stage converter 10 adjusts the value of the first voltage V1 according to the feedback signal FB. The adjustment signal dac_adj is converted by the voltage reference and feedback loop 60 to generate a feedback signal FB, and the feedback signal FB is sent to the pre-stage converter 10, and the pre-stage converter 10 can adjust the value of the first voltage V1 according to the feedback signal FB.

In one embodiment, the voltage reference and feedback loop 60 includes a reference voltage chip U2 and an optocoupler U3, where the reference voltage chip U2 has a third pin that is a ground pin and is coupled to the signal ground SGND; the reference voltage chip U2 has a second pin as a power pin, and is coupled to the pre-stage converter 10 via a sixteenth resistor R16 and a seventeenth resistor R17 connected in series to receive the first voltage V1; the reference voltage chip U2 has a first pin as a regulation pin, is coupled to the main control module 50 via a twenty-third resistor R23, receives the regulation signal dac_adj, and the first pin of the reference voltage chip U2 is further coupled to the signal ground SGND via a twentieth resistor R20, is further coupled to the pre-stage converter 10 via an eighteenth resistor R18, and is further coupled to the second pin of the reference voltage chip U2 via an eighth capacitor C8 and a twenty-first resistor R21 connected in series; the optocoupler U3 has a first pin and a second pin, and is connected in parallel to two ends of the seventeenth resistor R17, the optocoupler has a third pin and is coupled to the power ground PGND, the optocoupler U3 has a fourth pin, and is coupled to the pre-stage converter 10, outputs the feedback signal FB, and sends the feedback signal FB to the pre-stage converter 10. In a specific embodiment, the reference voltage chip U2 is of a model TL431M. The regulation signal dac_adj, which is an analog signal, generates a feedback signal FB, i.e. a first voltage V1, which can be used to control the pre-converter 10 to vary the output, via conversion of the voltage reference and feedback loop 60.

In an embodiment, the pre-stage converter 10 includes an auxiliary control chip U1, a power tube Q1 and a transformer T1, where the auxiliary control chip U1 has an eighth pin as a feedback pin, and is coupled to the voltage reference and feedback loop 60, and receives a feedback signal FB provided by the voltage reference and feedback loop 60, and the eighth pin of the auxiliary control chip U1 is further coupled to a power ground PGND via a third capacitor C3; the auxiliary control chip U1 is provided with a second pin serving as a power supply pin, is coupled with the transformer T1 through a sixth resistor D6 and a third diode D3 which are connected in series, and is also coupled with the power supply ground PGND through a third electrolytic capacitor EC 3; the auxiliary control chip U1 is provided with a seventh pin which is a grounding pin and is coupled with the power supply ground PGND; the auxiliary control chip U1 has a fifth pin as a control pin, and is coupled to the transformer T1 through the power tube Q1. In one embodiment, the auxiliary control chip U1 is HFC0100HS. The value of the output first voltage V1 may be adjusted according to the feedback signal FB.

More specifically, in an embodiment, the pre-stage converter 10 further includes a rectifier bridge DB1, where an input end of the rectifier bridge DB1 is coupled to the external power source, and in a specific embodiment, the external power source is an ac power, and two ends of the input end of the rectifier bridge DB1 are respectively coupled to the ac power through a live wire L and a neutral wire N. A first electrolytic capacitor EC1 is connected in parallel between two ends of the output end of the rectifier bridge DB1, and is further coupled with the transformer T1. The transformer T1 is provided with a first pin, a third pin, a fifth pin, a sixth pin, a ninth pin and a tenth pin, a primary winding of the transformer T1 is formed between the first pin and the third pin of the transformer T1, a secondary winding of the transformer T1 is formed between the ninth pin and the tenth pin of the transformer T1, and an auxiliary winding of the transformer T1 is formed between the fifth pin and the sixth pin of the transformer T1. The first pin of the transformer T1 is coupled to a first end of the output end of the rectifier bridge DB1, the second end of the output end of the rectifier bridge DB1 is coupled to the power ground PGND, and the third pin of the transformer T1 is coupled to the drain of the power tube Q1. A fourth diode D4 and a fourth electrolytic capacitor EC4 are connected in series between the ninth pin and the tenth pin of the transformer T1, and the tenth pin of the transformer T1 is coupled to the signal ground SGND, and the coupling point between the fourth diode D4 and the fourth electrolytic capacitor EC4 outputs the first voltage V1. The fifth pin of the transformer T1 is coupled to the power ground PGND, and the sixth pin of the transformer T1 is coupled to the second pin of the auxiliary control chip U1 via the third diode D3 and the sixth resistor D6 connected in series. The auxiliary control chip U1 further has a first pin, which is a valley detection pin, coupled to the sixth pin of the transformer T1 via a seventh resistor R7, and coupled to the power ground PGND via a fifth capacitor C5. The auxiliary control chip U1 further has a fourth pin, which is a voltage supply pin HV, and is coupled to the first end of the output end of the rectifier bridge DB1 via a fifth resistor R5. The auxiliary control chip U1 further has a sixth pin as a sampling pin CS, and is coupled to the power ground PGND via a fourth capacitor C4, and is coupled to the power ground PGND via a twelfth resistor R12, and is coupled to the source of the power tube Q1. The fifth pin of the auxiliary control chip U1 is coupled to the gate of the power tube Q1. In this way, the pre-stage converter 10 can work more completely and safely, adjust the value of the output first voltage V1 according to the difference of the feedback signals FB, and can perform various sampling and detection of the circuit, so that the circuit can work safely and stably.

In an embodiment, the dimming driving module 20 includes a dimming chip U6, where the dimming chip U6 has a second pin as a dimming signal input pin, and is coupled to the signal ground SGND via a second resistor R2; the dimming chip U6 has a third pin as a power pin, is coupled to the signal ground SGND via a first capacitor C1, is coupled to the pre-stage converter 10 via a first resistor R1, and receives the first voltage V1; the dimming chip U6 has a fifth pin as a driving pin, is coupled to the external load 70 via a second inductor T2, and is coupled to the pre-stage converter 10 via a first diode D1, wherein an anode of the first diode D1 is coupled to the first voltage V1, and a cathode of the first diode D1 is coupled to the fifth pin of the dimming chip U6; the dimming chip U6 has a seventh pin, which is a ground pin, and is coupled to the signal ground SGND. The dimming signal is provided by the main control module 50. The main control chip U5 has a seventh pin as a dimming signal output pin, and is coupled to the dimming driving module 20 to output a dimming signal to the dimming driving module 20. That is, the second pin of the dimming chip U6 is coupled to the seventh pin of the main control chip U5, and receives the dimming signal output from the seventh pin of the main control chip U5. In one embodiment, the dimming signal is a PWM signal, that is, the dimming driving module 20 is a PWM chopper dimming driving circuit. More specifically, the dimming chip U6 has an eighth pin as a ground pin, and is coupled to the seventh pin of the dimming chip U6; the dimming chip U6 is provided with a sixth pin which is also a driving pin and is coupled with a fifth pin of the dimming chip U6; the dimming chip U6 has a first pin, which is also a voltage stabilizing pin LD, and is coupled to a third pin of the dimming chip U6.

In an embodiment, the first detection circuit 30 includes a ninth resistor R9 and an eleventh resistor R11 connected in series, where a free end of the ninth resistor R9 is coupled to the pre-stage converter 10, receives the first voltage V1, a free end of the eleventh resistor R11 is coupled to the signal ground SGND, and a coupling point of the ninth resistor R9 and the eleventh resistor R11 outputs the first detection signal adc_v1. The second detection circuit 40 includes a fourth resistor R4 and a tenth resistor R10 connected in series, wherein a free end of the fourth resistor R4 is coupled to the dimming driving module 20, receives the second voltage V2, a free end of the tenth resistor R10 is coupled to the signal ground SGND, and a coupling point of the fourth resistor R4 and the tenth resistor R10 outputs the second detection signal adc_v2.

Finally, it should be noted that the first pin of the main control chip U5 is coupled to the pre-stage converter 10 via the voltage conversion chip U4, so as to convert the first voltage V1 output by the pre-stage converter 10 into the working voltage required by the main control chip U5. For example, the first voltage V1 is 24V, and the working voltage required by the main control chip U5 is 5V, and the conversion is completed by the voltage conversion chip U4.

The foregoing is merely illustrative of the present utility model, and the present utility model is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present utility model. Therefore, the protection scope of the present utility model shall be subject to the protection scope of the claims. Furthermore, the foregoing description of the principles and embodiments of the utility model has been provided for the purpose of illustrating the principles and embodiments of the utility model and for the purpose of providing a further understanding of the principles and embodiments of the utility model, and is not to be construed as limiting the utility model.

Claims

1. A dimmable drive circuit, comprising:

a pre-stage converter (10) coupled to an external power source and outputting a first voltage (V1);

the dimming driving module (20) is coupled with the front-stage converter (10) and an external load (70), receives the first voltage (V1), outputs a second voltage (V2) and drives the external load (70) to work;

-a first detection circuit (30) coupled to the pre-stage converter (10), receiving the first voltage (V1), outputting a first detection signal (adc_v1) representative of the first voltage (V1);

a second detection circuit (40) coupled to the dimming driving module (20), receiving the second voltage (V2), outputting a second detection signal (adc_v2) representative of the second voltage (V2);

the main control module (50) is coupled with the first detection circuit (30), the second detection circuit (40) and the front-stage converter (10), receives the first detection signal (ADC_V1), the second detection signal (ADC_V2), outputs the adjusting signal (DAC_ADJ) and sends the adjusting signal to the front-stage converter (10), the front-stage converter (10) adjusts the value of the first voltage (V1), and the ratio of the second voltage (V2) to the first voltage (V1) is maintained at a preset value.

2. The dimmable drive circuit according to claim 1, further comprising a voltage reference and feedback loop (60), said voltage reference and feedback loop (60) being coupled to both said main control module (50) and said pre-stage converter (10), receiving said adjustment signal (dac_adj) output by said main control module (50), generating a feedback signal (FB) to be sent to said pre-stage converter (10), said pre-stage converter (10) adjusting the value of said first voltage (V1) in dependence of said feedback signal (FB).

3. The dimmable driving circuit according to claim 1, wherein the main control module (50) comprises a main control chip (U5), the main control chip (U5) having a first pin as a power pin, coupled to an operating power supply; the main control chip (U5) is provided with a first detection pin (CS/PA 7) with a second pin, is coupled with the first detection circuit (30), and receives the first detection signal (ADC_V1) output by the first detection circuit (30); the main control chip (U5) is provided with a second detection pin (TKS/PA 6) with a third pin, is coupled with the second detection circuit (40), and receives the second detection signal (ADC_V2) output by the second detection circuit (40); the main control chip (U5) is provided with a third pin which is an adjusting signal output pin (RSTB/PA 5) and outputs the adjusting signal (DAC_ADJ); the main control chip (U5) is provided with an eighth pin which is a grounding pin and is coupled with Signal Ground (SGND).

4. A dimmable driving circuit according to claim 3, wherein said main control chip (U5) has a seventh pin as a dimming signal output pin, and is coupled to said dimming driving module (20) to output a dimming signal to said dimming driving module (20).

5. The dimmable driver circuit according to claim 4, wherein the dimming driver module (20) comprises a dimming chip (U6), the dimming chip (U6) having a second pin being a dimming signal input pin and being coupled to Signal Ground (SGND) via a second resistor (R2); the dimming chip (U6) is provided with a third pin which is a power pin, is coupled with a Signal Ground (SGND) through a first capacitor (C1), is coupled with the front-stage converter (10) through a first resistor (R1), and receives the first voltage (V1); the dimming chip (U6) is provided with a fifth pin serving as a driving pin, is coupled with the external load (70) through a second inductor (T2) and is coupled with the pre-stage converter (10) through a first diode (D1), the anode of the first diode (D1) is coupled with the first voltage (V1), and the cathode of the first diode (D1) is coupled with the fifth pin of the dimming chip (U6); the dimming chip (U6) is provided with a seventh pin which is a grounding pin and is coupled with Signal Ground (SGND).

6. The dimmable driver circuit according to claim 5, wherein said dimming driver module (20) is a PWM chopper dimming driver circuit and said dimming signal is a PWM signal.

7. The dimmable driving circuit according to claim 1, wherein said first detection circuit (30) comprises a ninth resistor (R9), an eleventh resistor (R11) connected in series, a free end of said ninth resistor (R9) being coupled to said pre-inverter (10), receiving said first voltage (V1), a free end of said eleventh resistor (R11) being coupled to Signal Ground (SGND), a coupling point of said ninth resistor (R9), said eleventh resistor (R11) outputting said first detection signal (adc_v1); the second detection circuit (40) comprises a fourth resistor (R4) and a tenth resistor (R10) which are connected in series, the free end of the fourth resistor (R4) is coupled with the dimming driving module (20) and receives the second voltage (V2), the free end of the tenth resistor (R10) is coupled with the Signal Ground (SGND), and the coupling point of the fourth resistor (R4) and the tenth resistor (R10) outputs the second detection signal (ADC_V2).

8. The dimmable drive circuit according to claim 2, wherein said voltage reference and feedback loop (60) comprises a reference voltage chip (U2) and an optocoupler (U3), said reference voltage chip (U2) having a third pin being a ground pin, coupled to Signal Ground (SGND); the reference voltage chip (U2) is provided with a second pin serving as a power supply pin, is coupled with the pre-stage converter (10) through a sixteenth resistor (R16) and a seventeenth resistor (R17) which are connected in series, and receives the first voltage (V1); the reference voltage chip (U2) is provided with a first pin serving as a regulating pin, is coupled with the main control module (50) through a twenty-third resistor (R23) and receives the regulating signal (DAC_ADJ), the first pin of the reference voltage chip (U2) is further coupled with a Signal Ground (SGND) through a twentieth resistor (R20), is further coupled with the front-stage converter (10) through an eighteenth resistor (R18), and is further coupled with the second pin of the reference voltage chip (U2) through an eighth capacitor (C8) and a twenty-first resistor (R21) which are connected in series; the optocoupler (U3) is provided with a first pin and a second pin which are connected in parallel with two ends of the seventeenth resistor (R17), the optocoupler is provided with a third pin which is coupled with the Power Ground (PGND), the optocoupler (U3) is provided with a fourth pin which is coupled with the pre-stage converter (10), and the feedback signal (FB) is output and sent to the pre-stage converter (10).

9. The dimmable drive circuit according to claim 8, wherein the pre-stage converter (10) comprises an auxiliary control chip (U1), a power tube (Q1) and a transformer (T1), the auxiliary control chip (U1) having an eighth pin as a feedback pin, being coupled with the voltage reference and feedback loop (60), receiving a feedback signal (FB) provided by the voltage reference and feedback loop (60), the eighth pin of the auxiliary control chip (U1) being further coupled with a Power Ground (PGND) via a third capacitor (C3); the auxiliary control chip (U1) is provided with a second pin serving as a power supply pin, is coupled with the transformer (T1) through a sixth resistor (D6) and a third diode (D3) which are connected in series, and is also coupled with a power supply ground (PGND) through a third electrolytic capacitor (EC 3); the auxiliary control chip (U1) is provided with a seventh pin which is a grounding pin and is coupled with Power Ground (PGND); the auxiliary control chip (U1) is provided with a fifth pin serving as a control pin and is coupled with the transformer (T1) through the power tube (Q1).

10. The dimmable driving circuit according to claim 9, wherein said pre-stage converter (10) further comprises a rectifier bridge (DB 1), an input terminal of said rectifier bridge (DB 1) is coupled to said external power source, a first electrolytic capacitor (EC 1) is connected in parallel between two ends of an output terminal of said rectifier bridge (DB 1), and is further coupled to said transformer (T1).