CN115802537A

CN115802537A - Adjustable optical drive circuit

Info

Publication number: CN115802537A
Application number: CN202211627429.4A
Authority: CN
Inventors: 赵磊
Original assignee: Opple Lighting Co Ltd; Suzhou Op Lighting Co Ltd
Current assignee: Opple Lighting Co Ltd; Suzhou Op Lighting Co Ltd
Priority date: 2022-12-16
Filing date: 2022-12-16
Publication date: 2023-03-14

Abstract

The application provides a drive circuit can adjust luminance includes: the pre-stage converter is coupled with an external power supply and outputs a first voltage; the dimming driving module is coupled with the pre-converter and an external load, receives the first voltage, outputs a second voltage and drives the external load to work; the first detection circuit is coupled with the pre-converter, receives the first voltage and outputs a first detection signal representing the first voltage; the second detection circuit is coupled with the dimming driving module, receives the second voltage and outputs a second detection signal representing the second voltage; and the main control module receives the first detection signal and the second detection signal, outputs an adjusting signal and sends the adjusting signal to the pre-converter, the pre-converter adjusts the value of the first voltage, and the ratio of the second voltage to the first voltage is maintained at a preset value. The application the adjustable light driving circuit can reduce pause and pause of the light adjusting process as much as possible.

Description

Adjustable optical drive circuit

Technical Field

The application relates to the technical field of integrated circuit design, in particular to a dimmable drive circuit.

Background

The development of intelligent lighting has been rapidly increased in recent two years, during which the dimming function is especially sought after. At present, an excellent intelligent lighting requires that a dimming driving circuit of the intelligent lighting has a silky dimming effect, so that the intelligent lighting is more comfortable in the overall visual effect and more meets the requirement of human eyes on optics; i.e. the dimming effect, requires no jitter in either brightness or dimming procedure, since the jitter of the light gives a dangerous feeling. PWM chopping dimming is a dimming driving scheme with very high cost performance, and can realize a dimming depth of one thousandth or even one thousandth of depth in the dimming depth, thereby meeting various dimming requirements.

However, researchers have noticed that if the changes of the two PWM dimming signals are just in the discharging period of the inductor, the current of the inductor will not increase and the brightness of the lamp will not change. Referring to fig. 1, in the lower graph, the active high level of the previous PWM dimming signal continues to the position a, and the active high level of the next PWM dimming signal continues to the position b, that is, the lengths of the active high levels of the previous and next PWM dimming signals change from the position a to the position b, which increases, and theoretically, the brightness of the lamp will change a little; however, since the changes of the two PWM dimming signals just fall in the discharge period of the inductor, as shown by the dotted line period in the above figure (the operating frequency of the inductor is determined by another), at this time, actually, the current of the inductor (also the current flowing through the lamp bead) will not increase, so that the brightness of the lamp bead will not change. Therefore, when the effective high level of the following PWM dimming signal falls in the charging period of the inductor, the current of the inductor directly works according to the current corresponding to the following PWM dimming signal, that is, the current directly jumps and increases, and the brightness of the lamp bead also directly jumps and becomes brighter, which is a pause (jitter) in dimming; this frustration is even more pronounced if the change of successive PWM dimming signals falls on the discharge period of the inductor.

In contrast, a solution directly corresponding to the above is to detect and determine the effective high level time of the PWM dimming signal and the charging period and the discharging period of the inductor, so that the effective high level time of the PWM dimming signal falls as much as possible in the charging period of the inductor. The inventor of the present application proposes that if the duty ratio of the PWM chopping dimming circuit is increased as much as possible, for example, 100% in an extreme ideal state, that is, the ratio of the output voltage to the input voltage of the PWM chopping dimming circuit is increased, so that the discharge period of the inductor can be reduced as much as possible, as shown by the dotted line period in fig. 2, the change of the PWM dimming signal can be easily avoided as much as possible from falling into the discharge period of the inductor, thereby reducing the frustration of dimming. Therefore, the inventors of the present application have proposed the solution of the present application.

Disclosure of Invention

An object of the application is to provide an adjustable optical drive circuit, which can minimize the pause and pause of the dimming process.

In order to achieve the above purpose, the present application provides the following technical solutions:

the application provides a drive circuit can adjust luminance includes:

the pre-stage converter is coupled with an external power supply and outputs a first voltage;

the dimming driving module is coupled with the pre-stage converter and an external load, receives the first voltage, outputs a second voltage and drives the external load to work;

the first detection circuit is coupled with the pre-converter, receives the first voltage and outputs a first detection signal representing the first voltage;

the second detection circuit is coupled with the dimming driving module, receives the second voltage and outputs a second detection signal representing the second voltage;

and the main control module is coupled with the first detection circuit, the second detection circuit and the pre-converter, receives the first detection signal and the second detection signal, outputs an adjusting signal and sends the adjusting signal to the pre-converter, the pre-converter adjusts the value of the first voltage, and the ratio of the second voltage to the first voltage is maintained at a preset value.

In an embodiment, the adjustable optical driving circuit further includes a voltage reference and a feedback loop, the voltage reference and the feedback loop are coupled to the main control module and the pre-stage converter, and receive the adjusting signal output by the main control module, generate a feedback signal, and send the feedback signal to the pre-stage converter, and the pre-stage converter adjusts the value of the first voltage according to the feedback signal.

In one embodiment, the main control module comprises a main control chip, wherein the main control chip is provided with a first pin which is a power supply pin and is coupled with a working power supply; the main control chip is provided with a second pin which is a first detection pin, is coupled with the first detection circuit and receives the first detection signal output by the first detection circuit; the main control chip is provided with a third pin which is a second detection pin, is coupled with the second detection circuit and receives the second detection signal output by the second detection circuit; the main control chip is provided with a third pin which is an adjusting signal output pin and outputs the adjusting signal; the main control chip is provided with an eighth pin which is a grounding pin and is coupled with a signal ground.

In an embodiment, the main control chip has a seventh pin as a dimming signal output pin, and is coupled to the dimming driving module to output the dimming signal to the dimming driving module.

In an embodiment, the dimming driving module includes a dimming chip having a second pin as a dimming signal input pin and coupled to a signal ground via a second resistor; the dimming chip is provided with a third pin which is a power supply pin, is coupled with a signal ground through a first capacitor, is coupled with the pre-converter through a first resistor and receives the first voltage; the dimming chip is provided with a fifth pin serving as a driving pin, is coupled with the external load through a second inductor and is coupled with the pre-converter through a first diode, the anode of the first diode is coupled with the first voltage, and the cathode of the first diode is coupled with the fifth pin of the dimming chip; the dimming chip is provided with a seventh pin which is a grounding pin and is coupled with a signal ground.

In an embodiment, the dimming driving module is a PWM chopping dimming driving circuit, and the dimming signal is a PWM signal.

In one embodiment, the first detection circuit includes a ninth resistor and an eleventh resistor connected in series, a free end of the ninth resistor is coupled to the pre-converter and receives the first voltage, a free end of the eleventh resistor is coupled to a signal ground, and a coupling point of the ninth resistor and the eleventh resistor outputs the first detection signal; the second detection circuit comprises a fourth resistor and a tenth resistor which are connected in series, a free end of the fourth resistor is coupled with the dimming driving module and receives the second voltage, a free end of the tenth resistor is coupled with a signal ground, and a coupling point of the fourth resistor and the tenth resistor outputs the second detection signal.

In one embodiment, the voltage reference and feedback loop comprises a reference voltage chip and an optical coupler, wherein the reference voltage chip is provided with a third pin which is a grounding pin and is coupled with a signal ground; the reference voltage chip is provided with a second pin which is a power supply pin, is coupled with the pre-stage converter through a sixteenth resistor and a seventeenth resistor which are connected in series, and receives the first voltage; the reference voltage chip is provided with a first pin which is a regulation pin, is coupled with the main control module through a twenty-third resistor and receives the regulation signal, and is also coupled with a signal ground through a twentieth resistor, is also coupled with the pre-stage converter through an eighteenth resistor, and is also coupled with a second pin of the reference voltage chip through an eighth capacitor and a twenty-first resistor which are connected in series; the optocoupler has a first pin and a second pin and is connected in parallel with two ends of the seventeenth resistor, the optocoupler has a third pin and is coupled with a power ground, the optocoupler has a fourth pin and is coupled with the preceding stage converter to output the feedback signal, and the feedback signal is sent to the preceding stage converter.

In an embodiment, the pre-converter comprises an auxiliary control chip, a power tube and a transformer, the auxiliary control chip has an eighth pin as a feedback pin, is coupled to the voltage reference and the feedback loop, receives a feedback signal provided by the voltage reference and the feedback loop, and is further coupled to a power ground via a third capacitor; the auxiliary control chip is provided with a second pin which is a power supply pin, is coupled with the transformer through a sixth resistor and a third diode which are connected in series, and is also coupled with a power supply ground through a third electrolytic capacitor; the auxiliary control chip is provided with a seventh pin which is a grounding pin and is coupled with a power ground; the auxiliary control chip is provided with a fifth pin which is a control pin and is coupled with the transformer through the power tube.

In an embodiment, the pre-converter further includes a rectifier bridge, an input terminal of the rectifier bridge is coupled to the external power source, and a first electrolytic capacitor is connected in parallel between two terminals of an output terminal of the rectifier bridge and is further coupled to the transformer.

Compared with the prior art, the technical scheme of the application has the following beneficial effects:

the adjustable light driving circuit obtains the first voltage (i.e., the input voltage of the dimming driving module) output by the pre-stage converter, obtains the second voltage (i.e., the output voltage of the dimming driving module, i.e., the load voltage) output by the dimming driving module, and adjusts the value of the first voltage output by the pre-stage converter according to different load voltages (e.g., different external loads, i.e., the second voltage) and the preset value of the ratio of the second voltage to the first voltage (the highest value of the duty ratio of the dimming driving module), so that the ratio of the second voltage to the first voltage is maintained at the preset value, thereby reducing the discharge time interval of an inductor in the dimming driving module, avoiding the change of a dimming signal from falling on the discharge time interval of the inductor as much as possible, reducing the frustration in the dimming process, and improving the use experience of a user.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic diagram of waveforms of current and a dimming signal of an inductor in a prior art tunable optical drive circuit;

FIG. 2 is a schematic diagram illustrating a waveform of a current of an inductor in the tunable optical driving circuit according to the present application;

fig. 3 is a schematic structural diagram of an adjustable optical driving circuit according to a first embodiment of the present disclosure.

Detailed Description

The technical solutions in the embodiments of the present application will be described clearly and completely below, and it should be understood that the described embodiments are only a part of the embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The technical solution of the present application provides a dimmable driving circuit, which is described in detail below. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments of the present application. In the following embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to related descriptions of other embodiments for parts that are not described in detail in a certain embodiment.

Referring to fig. 3, a first embodiment of the present application provides a dimmable driving circuit, including:

a pre-converter 10 coupled to an external power source and outputting a first voltage V1;

the dimming driving module 20 is coupled to the pre-converter 10 and the external load 70, receives the first voltage V1, outputs a second voltage V2, and drives the external load 70 to operate;

a first detection circuit 30, coupled to the pre-converter 10, for receiving the first voltage V1 and outputting a first detection signal ADC _ V1 representing the first voltage V1;

a second detection circuit 40, coupled to the dimming driving module 20, for receiving the second voltage V2 and outputting a second detection signal ADC _ V2 representing the second voltage V2;

the main control module 50 is coupled to the first detection circuit 30, the second detection circuit 40, and the pre-converter 10, receives the first detection signal ADC _ V1 and the second detection signal ADC _ V2, outputs an adjustment signal DAC _ ADJ, and sends the adjustment signal DAC _ ADJ to the pre-converter 10, where the pre-converter 10 adjusts a value of the first voltage V1, and a ratio of the second voltage V2 to the first voltage V1 is maintained at a preset value.

The first voltage V1 is provided to the dimming driving module 20, and may also be referred to as an input voltage of the dimming driving module 20. The second voltage V2 is output from the dimming driving module 20, which may also be referred to as an output voltage of the dimming driving module 20, and is applied to the external load 70, which may also be referred to as a load voltage. In one embodiment, the external load 70 is LED lamp beads, and a plurality of LED lamp beads or a plurality of groups of LED lamp beads may be connected in series and/or in parallel; the second voltage V2 is applied to the cathode of the LED lamp bead, and the anode of the LED lamp bead is coupled to the first voltage V1. The ratio of the second voltage V2 to the first voltage V1 may also be referred to as the duty ratio D of the dimming driving module 20. Generally speaking, the highest value of the duty ratio D of one dimming driving module 20 can be determined according to various parameter requirements of the dimming driving module 20 and subsequent test verification during design, and the determined highest value of the duty ratio D is used as the preset value and stored in the dimming driving module 20. For example, in one embodiment, the maximum value of the duty cycle D may be 94%, or 95%. Generally, the duty cycle D is greater than 80%, in particular greater than 90%, better. According to the present disclosure, the first voltage V1 (the input voltage of the dimming driving module 20) is adjusted by detecting the load voltage (the second voltage V2, which is different when coupled to different external loads 70), so that the ratio of the second voltage V2 to the first voltage V1 is maintained at a predetermined value, i.e., a higher duty ratio D, e.g., 94% or 95%, and thus, no matter what external load 70 is coupled to the dimming driving module 20, the discharge time period of the inductor in the dimming driving module 20 is as short as possible, thereby preventing the change of the dimming signal from falling into the discharge time period of the inductor as much as possible, thereby reducing the pause of dimming and providing better user experience.

In one embodiment, the main control module 50 includes a main control chip U5, and the main control chip U5 has a first pin as a power pin and is coupled to a working power supply; the main control chip U5 has a second pin as a first detection pin CS/PA7, is coupled to the first detection circuit 30, and receives the first detection signal ADC _ V1 output by the first detection circuit 30; the main control chip U5 has a third pin which is a second detection pin TKS/PA6, is coupled to the second detection circuit 40, and receives the second detection signal ADC _ V2 output by the second detection circuit 40; the main control chip U5 is provided with a third pin which is an adjusting signal output pin RSTB/PA5 and outputs the adjusting signal DAC _ ADJ; the main control chip U5 has an eighth pin as a ground pin, and is coupled to the signal ground SGND. As mentioned above, the main control module 50 stores a preset value of the ratio of the second voltage V2 to the first voltage V1, that is, the highest value of the duty ratio D of the dimming driving module 20; and the acquired first detection signal ADC _ V1 actually characterizes the actual value of the first voltage V1, and the acquired second detection signal ADC _ V2 actually characterizes the actual value of the second voltage V2, so that an adjustment signal DAC _ ADJ can be output through judgment, comparison and calculation to characterize an ideal value which the first voltage V1 should reach. For example, in a specific embodiment, the current actual value of the first voltage V1 is 24V, but the comparison calculation is performed in combination with the second voltage V2 and the highest value (preset value) of the duty ratio D, so that the ideal value of the first voltage V1 should be 22V, and the adjustment signal DAC _ ADJ thus outputted represents the 22V.

In one embodiment, the adjustment signal DAC _ ADJ is an analog signal. This analog signal does not directly control the pre-converter 10 to change the output first voltage V1. Therefore, in an embodiment, the dimmable driver circuit further includes a voltage reference and feedback loop 60, the voltage reference and feedback loop 60 is coupled to both the master control module 50 and the pre-converter 10, receives the adjustment signal DAC _ ADJ output by the master control module 50, generates a feedback signal FB, and sends the feedback signal FB to the pre-converter 10, and the pre-converter 10 adjusts the value of the first voltage V1 according to the feedback signal FB. The adjustment signal DAC _ ADJ is converted by the voltage reference and feedback loop 60 to generate a feedback signal FB, which is sent to the pre-converter 10, and the pre-converter 10 can adjust the value of the first voltage V1 according to the feedback signal FB.

In one embodiment, the voltage reference and feedback loop 60 includes a reference voltage chip U2 and an optocoupler U3, the reference voltage chip U2 has a third pin, which is a ground pin, and is coupled to a signal ground SGND; the reference voltage chip U2 has a second pin as a power pin, and is coupled to the pre-converter 10 through a sixteenth resistor R16 and a seventeenth resistor R17 connected in series to receive the first voltage V1; the reference voltage chip U2 has a first pin serving as a regulation pin, and is coupled to the main control module 50 via a twenty-third resistor R23 to receive the regulation signal DAC _ ADJ, the first pin of the reference voltage chip U2 is further coupled to a signal ground SGND via a twentieth resistor R20, is further coupled to the pre-converter 10 via an eighteenth resistor R18, and is further coupled to a second pin of the reference voltage chip U2 via an eighth capacitor C8 and a twenty-first resistor R21 connected in series; the optocoupler U3 has a first pin and a second pin, and is connected in parallel to two ends of the seventeenth resistor R17, the optocoupler has a third pin and is coupled with a power ground PGND, the optocoupler U3 has a fourth pin and is coupled with the pre-stage converter 10 to output the feedback signal FB, and the feedback signal FB is sent to the pre-stage converter 10. In one embodiment, the reference voltage chip U2 has a model number TL431M. The adjustment signal DAC _ ADJ, which is an analog signal, generates a feedback signal FB, i.e., a first voltage V1 that can be used to control the pre-converter 10 to vary the output, via the conversion of the voltage reference and feedback loop 60.

In an embodiment, the pre-converter 10 includes an auxiliary control chip U1, a power tube Q1 and a transformer T1, the auxiliary control chip U1 has an eighth pin as a feedback pin, is coupled to the voltage reference and feedback loop 60, and receives a feedback signal FB provided by the voltage reference and feedback loop 60, and the eighth pin of the auxiliary control chip U1 is further coupled to a power ground PGND via a third capacitor C3; the auxiliary control chip U1 has a second pin as a power pin, and is coupled to the transformer T1 through a sixth resistor D6 and a third diode D3 connected in series, and is further coupled to a power ground PGND through a third electrolytic capacitor EC 3; the auxiliary control chip U1 is provided with a seventh pin which is a grounding pin and is coupled with a power ground PGND; the auxiliary control chip U1 has a fifth pin as a control pin, and is coupled to the transformer T1 via the power tube Q1. In one embodiment, the model of the assisted control chip U1 is HFC0100HS. According to the difference of the feedback signal FB, the value of the output first voltage V1 can be adjusted.

More specifically, in an embodiment, the pre-converter 10 further includes a rectifier bridge DB1, an input end of the rectifier bridge DB1 is coupled to the external power source, in a specific embodiment, the external power source is an alternating current, and two ends of the input end of the rectifier bridge DB1 are electrically coupled to the alternating current through a live line L and a neutral line N, respectively. A first electrolytic capacitor EC1 is connected in parallel between two ends of the output end of the rectifier bridge DB1, and is coupled to the transformer T1. The transformer T1 is provided with a first pin, a third pin, a fifth pin, a sixth pin, a ninth pin and a tenth pin, a primary winding of the transformer T1 is formed between the first pin and the third pin of the transformer T1, a secondary winding of the transformer T1 is formed between the ninth pin and the tenth pin of the transformer T1, and an auxiliary winding of the transformer T1 is formed between the fifth pin and the sixth pin of the transformer T1. A first pin of the transformer T1 is coupled to a first end of an output terminal of the rectifier bridge DB1, a second end of the output terminal of the rectifier bridge DB1 is coupled to a power ground PGND, and a third pin of the transformer T1 is coupled to a drain of the power transistor Q1. A fourth diode D4 and a fourth electrolytic capacitor EC4 are connected in series between the ninth pin and the tenth pin of the transformer T1, the tenth pin of the transformer T1 is coupled to a signal ground SGND, and a coupling point of the fourth diode D4 and the fourth electrolytic capacitor EC4 outputs the first voltage V1. A fifth pin of the transformer T1 is coupled to a power ground PGND, and a sixth pin of the transformer T1 is coupled to the second pin of the auxiliary control chip U1 through the third diode D3 and the sixth resistor D6 connected in series. The auxiliary control chip U1 further has a first pin as a valley detection pin, and is coupled to the sixth pin of the transformer T1 through a seventh resistor R7, and is coupled to the power ground PGND through a fifth capacitor C5. The auxiliary control chip U1 further has a fourth pin, which is a voltage supply pin HV and is coupled to the first end of the output terminal of the rectifier bridge DB1 via a fifth resistor R5. The auxiliary control chip U1 further has a sixth pin as a sampling pin CS, and is coupled to the power ground PGND through a fourth capacitor C4, coupled to the power ground PGND through a twelfth resistor R12, and coupled to the source of the power transistor Q1. And a fifth pin of the auxiliary control chip U1 is coupled with the grid electrode of the power tube Q1. Therefore, the pre-converter 10 can work more completely and safely, adjust the value of the output first voltage V1 according to the difference of the feedback signal FB, and can perform various sampling and detection of the circuit, so that the circuit can work safely and stably.

In one embodiment, the dimming driving module 20 includes a dimming chip U6, the dimming chip U6 has a second pin as a dimming signal input pin and is coupled to the signal ground SGND via a second resistor R2; the dimming chip U6 has a third pin as a power pin, and is coupled to a signal ground SGND through a first capacitor C1, and is coupled to the pre-converter 10 through a first resistor R1, and receives the first voltage V1; the dimming chip U6 has a fifth pin as a driving pin, and is coupled to the external load 70 via a second inductor T2, and is coupled to the pre-converter 10 via a first diode D1, an anode of the first diode D1 is coupled to the first voltage V1, and a cathode of the first diode D1 is coupled to the fifth pin of the dimming chip U6; the dimming chip U6 has a seventh pin as a ground pin and is coupled to the signal ground SGND. The dimming signal is provided by the main control module 50. The main control chip U5 has a seventh pin as a dimming signal output pin, and is coupled to the dimming driving module 20 to output a dimming signal to the dimming driving module 20. That is, the second pin of the dimming chip U6 is coupled to the seventh pin of the main control chip U5, and receives the dimming signal output by the seventh pin of the main control chip U5. In one embodiment, the dimming signal is a PWM signal, that is, the dimming driving module 20 is a PWM chopping dimming driving circuit. More specifically, the dimming chip U6 has an eighth pin which is a ground pin and is coupled to a seventh pin of the dimming chip U6; the dimming chip U6 is provided with a sixth pin which is also a driving pin and is coupled with a fifth pin of the dimming chip U6; the dimming chip U6 has a first pin, which is also a voltage stabilizing pin LD, coupled to a third pin of the dimming chip U6.

In an embodiment, the first detection circuit 30 includes a ninth resistor R9 and an eleventh resistor R11 connected in series, a free end of the ninth resistor R9 is coupled to the pre-converter 10 to receive the first voltage V1, a free end of the eleventh resistor R11 is coupled to a signal ground SGND, and a coupling point of the ninth resistor R9 and the eleventh resistor R11 outputs the first detection signal ADC _ V1. The second detection circuit 40 includes a fourth resistor R4 and a tenth resistor R10 connected in series, a free end of the fourth resistor R4 is coupled to the dimming driving module 20 and receives the second voltage V2, a free end of the tenth resistor R10 is coupled to a signal ground SGND, and a coupling point of the fourth resistor R4 and the tenth resistor R10 outputs the second detection signal ADC _ V2.

It should be added that the first pin of the main control chip U5 is coupled to the pre-converter 10 via a voltage conversion chip U4, and converts the first voltage V1 output by the pre-converter 10 into an operating voltage required by the main control chip U5. For example, if the first voltage V1 is 24V and the operating voltage required by the main control chip U5 is 5V, the conversion is completed through the voltage conversion chip U4.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims. In addition, the principle and the implementation manner of the present application are explained by applying specific examples in the specification, the above description of the embodiments is only for helping understanding the method and the core idea of the present application, and the content of the present application should not be construed as limiting the present application.

Claims

1. A dimmable driver circuit, comprising:

a pre-converter (10) coupled to an external power source and outputting a first voltage (V1);

the dimming driving module (20) is coupled with the pre-converter (10) and an external load (70), receives the first voltage (V1), outputs a second voltage (V2), and drives the external load (70) to work;

a first detection circuit (30) coupled to the pre-converter (10), receiving the first voltage (V1), and outputting a first detection signal (ADC _ V1) indicative of the first voltage (V1);

a second detection circuit (40) coupled to the dimming driving module (20), receiving the second voltage (V2), and outputting a second detection signal (ADC _ V2) indicative of the second voltage (V2);

a main control module (50), coupled to the first detection circuit (30), the second detection circuit (40), and the pre-converter (10), for receiving the first detection signal (ADC _ V1) and the second detection signal (ADC _ V2), outputting an adjustment signal (DAC _ ADJ), sending the adjustment signal (DAC _ ADJ) to the pre-converter (10), wherein the pre-converter (10) adjusts the value of the first voltage (V1), and the ratio of the second voltage (V2) to the first voltage (V1) is maintained at a preset value.

2. A dimmable driver circuit according to claim 1, further comprising a voltage reference and feedback loop (60), wherein said voltage reference and feedback loop (60) is coupled to said main control module (50) and said pre-converter (10), for receiving said adjustment signal (DAC _ ADJ) outputted by said main control module (50) and generating a feedback signal (FB) to said pre-converter (10), and said pre-converter (10) adjusts the value of said first voltage (V1) according to said feedback signal (FB).

3. The dimmable driver circuit according to claim 1, wherein the main control module (50) comprises a main control chip (U5), the main control chip (U5) has a first pin as a power pin, and is coupled to an operating power supply; the main control chip (U5) is provided with a second pin which is a first detection pin (CS/PA 7), is coupled with the first detection circuit (30), and receives the first detection signal (ADC _ V1) output by the first detection circuit (30); the main control chip (U5) is provided with a third pin which is a second detection pin (TKS/PA 6), is coupled with the second detection circuit (40) and receives the second detection signal (ADC _ V2) output by the second detection circuit (40); the main control chip (U5) is provided with a third pin which is an adjusting signal output pin (RSTB/PA 5) and outputs the adjusting signal (DAC _ ADJ); the main control chip (U5) is provided with an eighth pin which is a grounding pin and is coupled with a Signal Ground (SGND).

4. The tunable optical driver circuit according to claim 3, wherein the main control chip (U5) has a seventh pin as a dimming signal output pin, and is coupled to the dimming driving module (20) for outputting the dimming signal to the dimming driving module (20).

5. The tunable light driving circuit according to claim 4, wherein the dimming driving module (20) comprises a dimming chip (U6), the dimming chip (U6) having a second pin as a dimming signal input pin and coupled to a Signal Ground (SGND) via a second resistor (R2); the dimming chip (U6) is provided with a third pin which is a power supply pin, is coupled with a Signal Ground (SGND) through a first capacitor (C1), is coupled with the pre-converter (10) through a first resistor (R1), and receives the first voltage (V1); the dimming chip (U6) has a fifth pin as a driving pin, and is coupled to the external load (70) through a second inductor (T2), and is coupled to the pre-converter (10) through a first diode (D1), an anode of the first diode (D1) is coupled to the first voltage (V1), and a cathode of the first diode (D1) is coupled to the fifth pin of the dimming chip (U6); the dimming chip (U6) has a seventh pin which is a ground pin and is coupled with a Signal Ground (SGND).

6. The tunable light driving circuit according to claim 5, wherein the dimming driving module (20) is a PWM chopping dimming driving circuit, and the dimming signal is a PWM signal.

7. The dimmable driver circuit according to claim 1, wherein the first detection circuit (30) comprises a ninth resistor (R9) and an eleventh resistor (R11) connected in series, a free end of the ninth resistor (R9) is coupled to the pre-converter (10) and receives the first voltage (V1), a free end of the eleventh resistor (R11) is coupled to a Signal Ground (SGND), and a coupling point of the ninth resistor (R9) and the eleventh resistor (R11) outputs the first detection signal (ADC _ V1); the second detection circuit (40) comprises a fourth resistor (R4) and a tenth resistor (R10) connected in series, a free end of the fourth resistor (R4) is coupled to the dimming driving module (20) to receive the second voltage (V2), a free end of the tenth resistor (R10) is coupled to a Signal Ground (SGND), and a coupling point of the fourth resistor (R4) and the tenth resistor (R10) outputs the second detection signal (ADC _ V2).

8. The dimmable driver circuit of claim 2, wherein said voltage reference and feedback loop (60) comprises a voltage reference chip (U2) and an optocoupler (U3), said voltage reference chip (U2) having a third pin being a ground pin, coupled to a Signal Ground (SGND); the reference voltage chip (U2) is provided with a second pin serving as a power supply pin, is coupled with the pre-converter (10) through a sixteenth resistor (R16) and a seventeenth resistor (R17) which are connected in series, and receives the first voltage (V1); the reference voltage chip (U2) has a first pin which is a regulation pin, is coupled with the main control module (50) through a twenty-third resistor (R23) and receives the regulation signal (DAC _ ADJ), and the first pin of the reference voltage chip (U2) is also coupled with a Signal Ground (SGND) through a twentieth resistor (R20), is also coupled with the pre-converter (10) through an eighteenth resistor (R18), and is also coupled with a second pin of the reference voltage chip (U2) through an eighth capacitor (C8) and a twenty-first resistor (R21) which are connected in series; the optocoupler (U3) is provided with a first pin and a second pin and is connected with two ends of the seventeenth resistor (R17) in parallel, the optocoupler is provided with a third pin and is coupled with a Power Ground (PGND), the optocoupler (U3) is provided with a fourth pin and is coupled with the pre-converter (10), outputs the feedback signal (FB) and sends the FB to the pre-converter (10).

9. The tunable optical drive circuit according to claim 8, wherein the pre-converter (10) comprises an auxiliary control chip (U1), a power transistor (Q1) and a transformer (T1), the auxiliary control chip (U1) has an eighth pin as a feedback pin, is coupled to the voltage reference and feedback loop (60), and receives a feedback signal (FB) provided by the voltage reference and feedback loop (60), and the eighth pin of the auxiliary control chip (U1) is further coupled to a Power Ground (PGND) via a third capacitor (C3); the auxiliary control chip (U1) is provided with a second pin serving as a power supply pin, and is coupled with the transformer (T1) through a sixth resistor (D6) and a third diode (D3) which are connected in series, and is also coupled with a power supply ground (PGND) through a third electrolytic capacitor (EC 3); the auxiliary control chip (U1) is provided with a seventh pin which is a grounding pin and is coupled with a Power Ground (PGND); the auxiliary control chip (U1) is provided with a fifth pin as a control pin and is coupled with the transformer (T1) through the power tube (Q1).

10. Dimmable driver circuit according to claim 9, wherein said pre-converter (10) further comprises a rectifier bridge (DB 1), an input terminal of said rectifier bridge (DB 1) is coupled to said external power source, and a first electrolytic capacitor (EC 1) is connected in parallel between two terminals of an output terminal of said rectifier bridge (DB 1) and is further coupled to said transformer (T1).