CN219641786U - Protection device of test fixture - Google Patents
Protection device of test fixture Download PDFInfo
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- CN219641786U CN219641786U CN202320242668.1U CN202320242668U CN219641786U CN 219641786 U CN219641786 U CN 219641786U CN 202320242668 U CN202320242668 U CN 202320242668U CN 219641786 U CN219641786 U CN 219641786U
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- 238000012360 testing method Methods 0.000 title claims abstract description 115
- 230000003068 static effect Effects 0.000 claims abstract description 25
- 239000003985 ceramic capacitor Substances 0.000 claims description 52
- 230000000087 stabilizing effect Effects 0.000 claims description 36
- 239000003990 capacitor Substances 0.000 claims description 28
- 230000001681 protective effect Effects 0.000 claims 2
- 238000001914 filtration Methods 0.000 abstract description 8
- 238000011084 recovery Methods 0.000 description 17
- 230000001629 suppression Effects 0.000 description 12
- 230000001052 transient effect Effects 0.000 description 12
- 230000005669 field effect Effects 0.000 description 11
- 101100163833 Arabidopsis thaliana ARP6 gene Proteins 0.000 description 8
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- 230000015556 catabolic process Effects 0.000 description 5
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- 230000002159 abnormal effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
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- 230000002093 peripheral effect Effects 0.000 description 1
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Abstract
The utility model discloses a protection device of a test fixture, which comprises an input module, a protection module and a test module, wherein the input module comprises a first power supply, a high-speed signal and a second power supply, the protection module comprises a first protection circuit, a second protection circuit and a third protection circuit, the test module comprises a first power supply of a test main board, a high-speed signal of the test main board and a second power supply of the test main board, the first protection circuit is respectively connected with the first power supply and the first power supply of the test main board, the second protection circuit is respectively connected with the high-speed signal and the high-speed signal of the test main board, and the third protection circuit is respectively connected with the second power supply and the second power supply of the test main board. Through the first protection circuit, the second protection circuit and the third protection circuit, overcurrent and overvoltage protection, filtering, surge protection and static protection are carried out on the input power supply and signals, burrs, pulses, surges and static of the test main board are reduced, and therefore the test main board is protected, and the device can be widely applied to the technical field of test fixtures.
Description
Technical Field
The utility model relates to the technical field of test fixtures, in particular to a protection device of a test fixture.
Background
At present, the probe that intelligent wrist-watch mainboard test fixture connected intelligent wrist-watch mainboard is direct electricity connection with peripheral equipment, often causes the intelligent wrist-watch mainboard in the test fixture to damage because of reasons such as prior art workman maloperation, burr, pulse, surge, static when production test.
Disclosure of Invention
Therefore, an object of the embodiments of the present utility model is to provide a protection device for a test fixture, so that when a tested motherboard is tested by using the test fixture, burrs, pulses, static electricity and surges generated instantaneously by a power supply and the outside are absorbed by a protection circuit, so as to reduce the influence on the output of the rear end of the fixture, protect the tested motherboard, and improve the test safety.
The embodiment of the utility model provides a protection device of a test fixture, which comprises an input module, a protection module and a test module, wherein the input module comprises a first power supply, a high-speed signal and a second power supply, the protection module comprises a first protection circuit, a second protection circuit and a third protection circuit, the test module comprises a first power supply of a test main board, a high-speed signal of the test main board and a second power supply of the test main board, the first protection circuit is respectively connected with the first power supply and the first power supply of the test main board, the second protection circuit is respectively connected with the high-speed signal and the high-speed signal of the test main board, and the third protection circuit is respectively connected with the second power supply and the second power supply of the test main board.
Optionally, the first protection circuit includes first overcurrent protection circuit, first overvoltage protection circuit, first power filter circuit, first surge protection circuit, first static protection circuit and power indication circuit, first overcurrent protection circuit respectively with first power with first overvoltage protection circuit is connected, first power filter circuit respectively with first overvoltage protection circuit with first surge protection circuit is connected, first static protection circuit respectively with first surge protection circuit with power indication circuit is connected, power indication circuit with test motherboard's first power connection.
Optionally, the second protection circuit includes a low-capacitance electrostatic protection circuit, and the low-capacitance electrostatic protection circuit is connected with the high-speed signal and the high-speed signal of the test motherboard respectively.
Optionally, the third protection circuit includes power reverse connection protection circuit, second overcurrent protection circuit, second overvoltage protection circuit, second power filter circuit, second surge protection circuit and second static protection circuit, power reverse connection protection circuit respectively with the second power with second overcurrent protection circuit, second overvoltage protection circuit respectively with second overcurrent protection circuit with second power filter circuit is connected, second surge protection circuit respectively with second power filter circuit with second static protection circuit is connected, second static protection circuit with test mainboard's second power is connected.
Optionally, the first overcurrent protection circuit includes a first self-recovery fuse connected to the first power supply and the first overvoltage protection circuit, respectively.
Optionally, the first overvoltage protection circuit includes first voltage regulator tube, second voltage regulator tube and third voltage regulator tube, the positive pole of first voltage regulator tube the positive pole of second voltage regulator tube with the positive pole of third voltage regulator tube all ground connection, the negative pole of first voltage regulator tube the negative pole of second voltage regulator tube and the negative pole of third voltage regulator tube all with first overcurrent protection circuit connects.
Optionally, the first power supply filter circuit includes first electrolytic capacitor, first ceramic capacitor and second ceramic capacitor, the negative pole of first electrolytic capacitor, first ceramic capacitor's first end with the first end of second ceramic capacitor all ground connection, first electrolytic capacitor's positive pole, first ceramic capacitor's second end and second ceramic capacitor second end all with first overvoltage protection circuit connects.
Optionally, the low-capacitance electrostatic protection circuit includes a first electrostatic diode and a second electrostatic diode, a first end of the first electrostatic diode and a first end of the second electrostatic diode are all grounded, a second end of the first electrostatic diode is connected with a first end of the high-speed signal and a first end of the high-speed signal of the test motherboard respectively, and a second end of the second electrostatic diode is connected with a second end of the high-speed signal and a second end of the high-speed signal of the test motherboard respectively.
Optionally, the second overcurrent protection circuit includes a second self-recovery fuse, and the second self-recovery fuse is connected with the power supply reverse connection protection circuit and the second overvoltage protection circuit respectively.
Optionally, the second power supply filter circuit includes a second electrolytic capacitor, a third ceramic capacitor and a fourth ceramic capacitor, wherein the negative electrode of the second electrolytic capacitor, the first end of the third ceramic capacitor and the first end of the fourth ceramic capacitor are all grounded, and the positive electrode of the second electrolytic capacitor, the second end of the third ceramic capacitor and the second end of the fourth ceramic capacitor are all connected with the second overvoltage protection circuit.
The embodiment of the utility model has the following beneficial effects: the embodiment of the utility model provides a protection device of a test fixture, which comprises an input module, a protection module and a test module, wherein the input module comprises a first power supply, a high-speed signal and a second power supply, the protection module comprises a first protection circuit, a second protection circuit and a third protection circuit, the test module comprises a first power supply of a test main board, a high-speed signal of the test main board and a second power supply of the test main board, the first protection circuit is respectively connected with the first power supply and the first power supply of the test main board, the second protection circuit is respectively connected with the high-speed signal and the high-speed signal of the test main board, and the third protection circuit is respectively connected with the second power supply and the second power supply of the test main board. The first power supply is subjected to overcurrent and overvoltage protection, filtering, surge protection and static protection through the first protection circuit, the high-speed signal is subjected to static protection through the second protection circuit, and the second power supply is subjected to reverse connection protection, overcurrent and overvoltage protection, filtering, surge protection and static protection through the third protection circuit, so that burrs, pulses, surges and static are reduced in the first power supply, the second power supply and the high-speed signal of the test main board, the test main board is protected, and the test safety is improved.
Drawings
FIG. 1 is a block diagram of a test fixture protector according to an embodiment of the present utility model;
FIG. 2 is a circuit block diagram of a protection device for a test fixture according to an embodiment of the present utility model;
fig. 3 is a schematic circuit diagram of a protection device of a test fixture according to an embodiment of the present utility model.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
In embodiments of the utility model, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g." in an embodiment should not be taken as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.
The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present utility model, unless otherwise indicated, the meaning of "a plurality" is two or more.
Referring to fig. 1, an embodiment of the present utility model provides a protection device for a test fixture, including an input circuit 100, a protection circuit 200, and a test circuit 300, where the input module includes a first power supply 110, a high-speed signal 120, and a second power supply 130, the protection module includes a first protection circuit 210, a second protection circuit 220, and a third protection circuit 230, the test module includes a first power supply 310 for a test motherboard, a high-speed signal 320 for the test motherboard, and a second power supply 330 for the test motherboard, the first protection circuit 210 is connected to the first power supply 110 and the first power supply 310 for the test motherboard, the second protection circuit 220 is connected to the high-speed signal 120 and the high-speed signal 320 for the test motherboard, and the third protection circuit 230 is connected to the second power supply 130 and the second power supply 330 for the test motherboard.
The input module is used for inputting an external power supply and a high-speed signal into the test fixture.
And the protection module is used for filtering or counteracting burrs, pulses, static electricity and surges generated by the input voltage or high-speed signals.
And the test module is used for inputting the voltage and the high-speed signal input by the protection module into the test main board for testing.
In a specific embodiment, a first power supply (VBUS) supplies power to a tested smart watch main board to form a first power supply loop, and a first protection circuit is connected in series to the first power supply loop to protect the power supply loop from the first power supply (VBUS) to the smart watch, so as to protect the smart watch loop connected with a first power supply end of the smart watch; the high-speed signal of the computer is sent to the tested intelligent watch main board to form a high-speed signal loop, a second protection circuit is connected in series on the high-speed signal loop, the high-speed signal end of the external computer is protected to the high-speed signal loop of the intelligent watch main board, and then the intelligent watch loop connected with the high-speed signal end of the intelligent watch is protected; the second power supply (VBAT) supplies power to the tested intelligent watch main board to form a second power supply loop, and a third protection circuit is connected in series on the second power supply loop, so that the power supply loop which is externally connected with a second power supply end to the second power supply (VBAT) of the intelligent watch main board is protected, and the intelligent watch loop connected with the second power supply end of the intelligent watch is further protected; the first protection circuit, the second protection circuit and the third protection circuit can absorb burrs, pulses, surges and static electricity generated instantaneously by a power supply and the outside, so that the influence on the output of the rear end of the clamp is reduced, the tested intelligent watch main board is protected, and the intelligent watch main board is prevented from being damaged by the intelligent watch main board testing clamp.
Referring to fig. 2, optionally, the first protection circuit includes a first overcurrent protection circuit 211, a first overvoltage protection circuit 212, a first power supply filter circuit 213, a first surge protection circuit 214, a first electrostatic protection circuit 215, and a power supply indication circuit 216, the first overcurrent protection circuit 211 is connected to the first power supply and the first overvoltage protection circuit 212, the first power supply filter circuit 213 is connected to the first overvoltage protection circuit 212 and the first surge protection circuit 214, the first electrostatic protection circuit 215 is connected to the first surge protection circuit 214 and the power supply indication circuit 216, and the power supply indication circuit 216 is connected to the first power supply of the test motherboard.
Specifically, the first power supply overcurrent protection circuit outputs an overcurrent protection voltage to the first power supply overvoltage protection circuit, and the first power supply overcurrent protection circuit is used for carrying out overcurrent protection on a first power supply (VBUS); the first overvoltage protection circuit outputs overvoltage protection voltage to the first power supply filter circuit, and the first power supply overvoltage protection circuit performs overvoltage protection on the overcurrent protection voltage; the first power supply filter circuit outputs the filtered voltage to the first power supply surge protection circuit, and the first power supply filter circuit filters the overvoltage protection voltage; the first power supply surge protection circuit outputs voltage after surge protection to the first power supply electrostatic protection circuit, and the first power supply surge protection circuit performs surge protection on the first power supply filtering voltage; the first power supply electrostatic protection circuit outputs electrostatic protection voltage to the tested main board, and the first power supply electrostatic protection circuit performs electrostatic protection on the power supply surge protection voltage; the first power indication circuit indicates whether the voltage output by the first power electrostatic protection circuit is normal.
Referring to fig. 2, optionally, the second protection circuit includes a low-capacitance electrostatic protection circuit 221, and the low-capacitance electrostatic protection circuit 221 is connected to the high-speed signal and the high-speed signal of the test motherboard, respectively.
Specifically, the low-capacitance electrostatic protection circuit of the second protection circuit outputs the computer high-speed signal after electrostatic protection to the test main board, and the low-capacitance electrostatic protection circuit performs electrostatic protection on the computer high-speed signal.
Referring to fig. 2, optionally, the third protection circuit includes a power supply reverse connection protection circuit 231, a second overcurrent protection circuit 232, a second overvoltage protection circuit 233, a second power supply filter circuit 234, a second surge protection circuit 235, and a second static protection circuit 236, the power supply reverse connection protection circuit 231 is respectively connected with the second power supply and the second overcurrent protection circuit 232, the second overvoltage protection circuit 233 is respectively connected with the second overcurrent protection circuit 232 and the second power supply filter circuit 234, the second surge protection circuit 235 is respectively connected with the second power supply filter circuit 234 and the second static protection circuit 236, and the second static protection circuit 236 is connected with the second power supply of the test motherboard.
Specifically, the power supply reverse connection protection circuit outputs the negative and positive electrode reverse connection protection voltage of the second power supply (VBAT) to the second power supply overcurrent protection circuit, and the power supply reverse connection protection circuit prevents the negative and positive electrodes of the external power supply voltage of the second power supply (VBAT) from reversing; the second power supply overcurrent protection circuit outputs an overcurrent protection voltage to the overvoltage protection module, and the second power supply overcurrent protection circuit connects the positive electrode and the negative electrode of the second power supply with a reverse protection voltage to carry out overcurrent protection; the second overvoltage protection circuit outputs overvoltage protection voltage to the second power supply filter circuit, and the second power supply overvoltage protection circuit performs overvoltage protection on the overcurrent protection voltage; the second power supply filter circuit outputs the filtered voltage to the second power supply surge protection circuit, and the second power supply filter circuit filters the overvoltage protection voltage; the second surge protection circuit outputs the voltage after surge protection to the second electrostatic protection circuit, and the second surge protection circuit performs surge protection on the power supply filtering voltage; the second electrostatic protection circuit outputs electrostatic protection voltage to the tested main board, and the second electrostatic protection circuit performs electrostatic protection on the surge protection voltage.
Referring to fig. 3, optionally, the first overcurrent protection circuit 211 includes a first self-recovery fuse, a first end of the first self-recovery fuse is connected to the first power supply, and a second end of the first self-recovery fuse is connected to the first overvoltage protection circuit 212.
Specifically, a first end of the first self-recovery fuse PPTC1 is connected to a supply voltage of a first power supply (VBUS), and a second end of the first self-recovery fuse PPTC1 is connected to an output voltage of the first power supply overcurrent protection circuit. The parameter of the first self-healing fuse PPTC1 is preferably 500 milliamps of holding current.
Referring to fig. 3, optionally, the first overvoltage protection circuit 212 includes a first voltage regulator, a second voltage regulator, and a third voltage regulator, where the positive electrode of the first voltage regulator, the positive electrode of the second voltage regulator, and the positive electrode of the third voltage regulator are all grounded, and the negative electrode of the first voltage regulator, the negative electrode of the second voltage regulator, and the negative electrode of the third voltage regulator are all connected to the first overcurrent protection circuit 211.
Specifically, the positive electrode of the first voltage stabilizing tube ZD1, the positive electrode of the second voltage stabilizing tube ZD2 and the positive electrode of the third voltage stabilizing tube ZD3 are all grounded, and the negative electrode of the first voltage stabilizing tube ZD1, the negative electrode of the second voltage stabilizing tube ZD2 and the negative electrode of the third voltage stabilizing tube ZD3 are all connected with the output voltage of the first overcurrent protection circuit.
In a specific implementation, the range of the stable voltage of the first voltage stabilizing tube ZD1 is 10V-16V, the range of the stable voltage of the second voltage stabilizing tube ZD2 is 7V-9V, and the range of the stable voltage of the third voltage stabilizing tube ZD3 is 5V-6V. It should be noted that, the implementation of the present embodiment includes, but is not limited to, these stable voltage value ranges, and the stable voltage value of each voltage regulator tube may be selected according to actual needs.
Referring to fig. 3, optionally, the first power filter circuit 213 includes a first electrolytic capacitor, a first ceramic capacitor, and a second ceramic capacitor, where a negative electrode of the first electrolytic capacitor, a first end of the first ceramic capacitor, and a first end of the second ceramic capacitor are all grounded, and a positive electrode of the first electrolytic capacitor, a second end of the first ceramic capacitor, and a second end of the second ceramic capacitor are all connected to the first overvoltage protection circuit 212.
Specifically, the negative electrode of the first electrolytic capacitor C1, the first end of the first ceramic capacitor C2 and the first end of the second ceramic capacitor C3 are all grounded; the positive electrode of the first electrolytic capacitor C1, the second end of the first ceramic capacitor C2 and the second end of the second ceramic capacitor C3 are connected to the output voltage of the first overvoltage protection module.
In a specific embodiment, the first electrolytic capacitor C1 parameter is preferably 16V470uF, the first ceramic capacitor C2 parameter is preferably 16V10uF, and the second ceramic capacitor C3 parameter is preferably 16V100nF.
Referring to fig. 3, in a specific embodiment, the first surge protection circuit includes a transient suppression diode TVS1, the positive electrode of the transient suppression diode TVS1 is grounded, and the negative electrode of the transient suppression diode TVS1 is connected to the output voltage of the first power supply filter circuit; the parameters of the transient suppression diode TVS1 are preferably a maximum reverse operating voltage of 7V. The first electrostatic protection circuit comprises an electrostatic diode ESD1, one end of the electrostatic diode ESD1 is grounded, and the other end of the electrostatic diode ESD1 is connected with the output voltage of the first surge protection circuit; the parameter of the electrostatic diode ESD1 is preferably a maximum reverse operating voltage of 7V. The power supply indication circuit comprises a resistor R1 and a light emitting diode LED1; the cathode of the light emitting diode LED1 is grounded, the anode of the light emitting diode LED1 is connected with one end of a resistor R1, and the other end of the resistor R1 is connected with the output voltage of the first electrostatic protection circuit; the resistance value of the resistor R1 is preferably 470 ohms; a first power supply (VBUS) of the test motherboard is connected to the output voltage of the power indication circuit.
Referring to fig. 3, optionally, the low capacitance electrostatic protection circuit includes a first electrostatic diode and a second electrostatic diode, a first end of the first electrostatic diode and a first end of the second electrostatic diode are grounded, a second end of the first electrostatic diode is connected with a first end of the high-speed signal and a first end of the high-speed signal of the test motherboard, respectively, and a second end of the second electrostatic diode is connected with a second end of the high-speed signal and a second end of the high-speed signal of the test motherboard, respectively.
Specifically, the low capacitance electrostatic protection circuit includes a first electrostatic diode ESD2 and a second electrostatic diode ESD3. One ends of the first electrostatic diode ESD2 and the second electrostatic diode ESD3 are grounded, the other end of the first electrostatic diode ESD2 is connected with a high-speed signal (D+) of a computer and a high-speed signal (D+) of a test main board, and the other end of the second electrostatic diode ESD3 is connected with a high-speed signal (D-) of the computer and a high-speed signal (D-) of the tested main board.
In a specific embodiment, the parameters of the first electrostatic diode ESD2 are preferably bipolar, the maximum reverse operating voltage is 7V, and the junction capacitance is less than 1pF.
Referring to fig. 3, optionally, the second overcurrent protection circuit includes a second self-recovery fuse connected to the power supply reverse protection circuit and the second overvoltage protection circuit, respectively.
Specifically, one end of the second self-recovery fuse PPTC2 is connected to the output voltage of the power supply reverse connection protection circuit, and the other end of the second self-recovery fuse PPTC2 is connected to the output voltage of the second power supply overcurrent protection circuit.
In a specific embodiment, the parameter of the second self-healing fuse PPTC2 is preferably the holding current equal to 1 amp.
Referring to fig. 3, optionally, the second power supply filter circuit includes a second electrolytic capacitor, a third ceramic capacitor and a fourth ceramic capacitor, where a negative electrode of the second electrolytic capacitor, a first end of the third ceramic capacitor and a first end of the fourth ceramic capacitor are all grounded, and a positive electrode of the second electrolytic capacitor, a second end of the third ceramic capacitor and a second end of the fourth ceramic capacitor are all connected with the second overvoltage protection circuit.
Specifically, the negative electrode of the second electrolytic capacitor C4, one end of the third ceramic capacitor C5 and one end of the fourth ceramic capacitor C6 are all grounded; the positive electrode of the second electrolytic capacitor C4, the other end of the third ceramic capacitor C5 and the other end of the fourth ceramic capacitor C6 are all connected with the output voltage of the second overvoltage protection circuit.
In a specific embodiment, the second electrolytic capacitor C4 parameter is preferably 16V470uF, the third ceramic capacitor C5 parameter is preferably 16V10uF, and the fourth ceramic capacitor C6 parameter is preferably 16V100nF.
Referring to fig. 3, in a specific embodiment, the second power supply reverse connection protection circuit includes a P-channel field effect transistor PMOS1, a resistor R2, and a resistor R3. The drain electrode of the P-channel field effect transistor PMOS1 is connected with a second power supply (VBAT) for supplying power, the source electrode of the P-channel field effect transistor PMOS1 and one end of the resistor R2 are connected with the output voltage of the protection circuit in a reverse mode, the grid electrode of the P-channel field effect transistor PMOS1 and the other end of the resistor R2 are connected with one end of the resistor R3, and the other end of the resistor R3 is grounded. The type of the P-channel field effect transistor PMOS1 comprises AO3401A, the resistance value of a resistor R2 is 4700 ohms, and the resistance value of a resistor R3 is 4700 ohms.
The second overvoltage protection circuit comprises a voltage stabilizing tube ZD4, a voltage stabilizing tube ZD5 and a voltage stabilizing tube ZD6. The positive electrode of the voltage stabilizing tube ZD4, the positive electrode of the voltage stabilizing tube ZD5 and the positive electrode of the voltage stabilizing tube ZD6 are grounded, and the negative electrode of the voltage stabilizing tube ZD4, the negative electrode of the voltage stabilizing tube ZD5 and the negative electrode of the voltage stabilizing tube ZD6 are connected with the output voltage of the second overcurrent protection circuit; the stable voltage range of the voltage stabilizing tube ZD4 comprises 10V-12V, the stable voltage range of the voltage stabilizing tube ZD5 comprises 7V-9V, and the stable voltage range of the voltage stabilizing tube ZD6 comprises 4.5V-5.5V. It should be noted that, the implementation of the present embodiment includes, but is not limited to, these stable voltage value ranges, and the stable voltage value of each voltage regulator tube may be selected as needed.
The second surge protection circuit comprises a transient suppression diode TVS2. The positive electrode of the transient suppression diode TVS2 is grounded, and the negative electrode of the transient suppression diode TVS2 is connected to the output voltage of the second power supply filter circuit. The parameters of the transient suppression diode TVS2 are preferably a maximum reverse operating voltage of 4.5V.
The second electrostatic protection circuit comprises an electrostatic diode ESD4. One end of the electrostatic diode ESD4 is grounded, and the other end of the electrostatic diode ESD4 is connected to the output voltage of the second surge protection circuit. The parameters of the electrostatic diode ESD4 are preferably bipolar with a maximum reverse operating voltage of 4.5V. The second power supply (VBAT) of the test motherboard is connected to the output voltage of the second electrostatic protection circuit.
The principle of the embodiment of the utility model is illustrated as follows:
a first overcurrent protection circuit: under the normal state, the first self-recovery fuse PPTC1 is in a low-resistance state, the first overcurrent protection circuit outputs normal working current, when a circuit at the back end is short-circuited or overloaded, the large current flowing through the first self-recovery fuse PPTC1 generates heat to enable the first self-recovery fuse PPTC1 to form a high-resistance state, and the output current of the first power overcurrent protection module is rapidly reduced, so that the circuit is limited and protected.
A first overvoltage protection circuit: when the first overcurrent protection voltage is larger than the stable voltage value of the voltage stabilizing tube, the voltage stabilizing tube can enter a half breakdown state to release redundant voltage, so that the purpose of stabilizing the voltage is achieved, and devices connected with the first power supply of the test main board are prevented from being damaged by overvoltage.
A first power supply filter circuit: the burr voltage of the first power supply is filtered by utilizing the capacitors with three different capacitance values, the low-frequency burrs of the first power supply are filtered by the first electrolytic capacitor C1, the intermediate-frequency burrs of the first power supply are filtered by the second ceramic capacitor C2, the high-frequency burrs of the first power supply are filtered by the third ceramic capacitor C3, and the first power supply which is more stable is output to the test main board.
First surge protection circuit: when the instantaneous surge voltage is surging into the first power supply, the transient suppression diode TVS1 is rapidly suddenly changed from a high resistance state to a low resistance state, the instantaneous overcurrent caused by the surge voltage is discharged to the ground, and the voltage is clamped to a preset level, so that the test main board is effectively protected from damage; after the surge voltage is released, the resistance value of the transient suppression diode TVS1 is restored to a high resistance state, and the circuit is restored to a normal working state.
First electrostatic protection circuit: when the first power supply loop normally works, the electrostatic diode ESD1 is in a cut-off state (high-resistance state) and does not influence the normal work of the first power supply loop, when the instant electrostatic voltage appears in the loop and reaches the breakdown voltage of the electrostatic diode ESD1, the electrostatic diode ESD1 is quickly changed from the high-resistance state to the low-resistance state, a low-resistance conduction path is provided for instant current, and meanwhile, abnormal high voltage is clamped within a safe level, so that a test main board is protected; after the surge voltage is released, the electrostatic diode ESD1 is restored to a high-resistance state, and the circuit is restored to normal operation.
First power indication circuit: the first electrostatic protection circuit is used for indicating whether the output voltage of the first electrostatic protection circuit is normal.
Low capacitance electrostatic protection circuit: when the high-speed signal loop normally works, the electrostatic diode ESD2 or the electrostatic diode ESD3 is in a cut-off state (high-resistance state) and does not influence the normal work of the high-speed signal loop, when the instant electrostatic voltage appears in the loop and reaches the breakdown voltage of the electrostatic diode ESD2 or the electrostatic diode ESD3, the electrostatic diode ESD2 or the electrostatic diode ESD3 is quickly changed from the high-resistance state to the low-resistance state, a low-resistance conduction path is provided for instant current, and meanwhile, the abnormal high voltage is clamped within a safe level, so that a test main board is protected; after the surge voltage is released, the electrostatic diode ESD2 or the electrostatic diode ESD3 is restored to a high-resistance state, and the circuit is restored to normal operation.
The power reverse connection protection circuit: the source electrode and the drain electrode of the P-channel field effect transistor PMOS1 are connected in series between a power supply and a load, and the resistor R2 and the resistor R3 provide voltage bias for the P-channel field effect transistor PMOS 1; when the second power supply input is accessed in the forward direction, the parasitic diode of the P-channel field effect transistor PMOS1 is conducted, the source voltage is increased, so that the parasitic diode of the P-channel field effect transistor PMOS1 is turned on, and the power supply reverse connection protection circuit outputs normal voltage; when the second power supply input is reversely connected, the parasitic diode of the P-channel field effect transistor PMOS1 is cut off, the source voltage is 0V, the P-channel field effect transistor PMOS1 is turned off, and the power supply reverse connection protection circuit does not output voltage, so that the main board to be tested is prevented from being damaged by the power supply reverse connection.
And a second overcurrent protection circuit: under the normal state, the second self-recovery fuse PPTC2 is in a low-resistance state, and the second power supply overcurrent protection module outputs normal working current; when the rear-end circuit is short-circuited or overloaded, the heat generated by the large current flowing through the second self-recovery fuse PPTC2 enables the second self-recovery fuse PPTC2 to form a high-resistance state, and the output current of the second power supply overcurrent protection module is rapidly reduced, so that the circuit is limited and protected.
The second overvoltage protection circuit: when the second overcurrent protection voltage is larger than the stable voltage value of the voltage stabilizing tube, the voltage stabilizing tube can enter a half breakdown state to release redundant voltage, so that the purpose of stabilizing the voltage is achieved, and devices connected with the second power supply of the test main board are prevented from being damaged by overvoltage.
A second power supply filter circuit: the burr voltage of the second power supply is filtered by utilizing the capacitors with three different capacitance values, the electrolytic capacitor C4 filters the low-frequency burrs of the second power supply, the ceramic capacitor C5 filters the medium-frequency burrs of the second power supply, the ceramic capacitor C6 filters the high-frequency burrs of the second power supply, and the second power supply which is more stable is output to the tested main board.
And a second surge protection circuit: when the instantaneous surge voltage is surging into the second power supply, the transient suppression diode TVS2 is rapidly suddenly changed from a high resistance state to a low resistance state, the instantaneous overcurrent caused by the surge voltage is discharged to the ground, and the voltage is clamped to a preset level, so that the test main board is effectively protected from damage; after the surge voltage is released, the resistance value of the transient suppression diode TVS2 is restored to a high resistance state, and the circuit is restored to a normal working state.
A second electrostatic protection circuit: when the second power supply loop normally works, the electrostatic diode ESD4 is in a cut-off state (high-resistance state) and does not influence the normal work of the second power supply loop, when the instant electrostatic voltage appears in the loop and reaches the breakdown voltage of the electrostatic diode ESD4, the electrostatic diode ESD4 is quickly changed from the high-resistance state to the low-resistance state, a low-resistance conduction path is provided for instant current, and meanwhile, abnormal high voltage is clamped within a safe level, so that a test main board is protected; after the surge voltage is released, the electrostatic diode ESD4 is restored to a high-resistance state, and the circuit is restored to normal operation.
The embodiment of the utility model has the following beneficial effects: the embodiment of the utility model provides a protection device of a test fixture, which comprises an input module, a protection module and a test module, wherein the input module comprises a first power supply, a high-speed signal and a second power supply, the protection module comprises a first protection circuit, a second protection circuit and a third protection circuit, the test module comprises a first power supply of a test main board, a high-speed signal of the test main board and a second power supply of the test main board, the first protection circuit is respectively connected with the first power supply and the first power supply of the test main board, the second protection circuit is respectively connected with the high-speed signal and the high-speed signal of the test main board, and the third protection circuit is respectively connected with the second power supply and the second power supply of the test main board. The first power supply is subjected to overcurrent and overvoltage protection, filtering, surge protection and static protection through the first protection circuit, the high-speed signal is subjected to static protection through the second protection circuit, and the second power supply is subjected to reverse connection protection, overcurrent and overvoltage protection, filtering, surge protection and static protection through the third protection circuit, so that burrs, pulses, surges and static are reduced in the first power supply, the second power supply and the high-speed signal of the test main board, the test main board is protected, and the test safety is improved.
While the preferred embodiment of the present utility model has been described in detail, the utility model is not limited to the embodiment, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the utility model, and these equivalent modifications and substitutions are intended to be included in the scope of the present utility model as defined in the appended claims.
Claims (10)
1. The utility model provides a protection device of test fixture, its characterized in that includes input module, protection module and test module, input module includes first power, high-speed signal and second power, protection module includes first protection circuit, second protection circuit and third protection circuit, test module includes the first power of test mainboard, the high-speed signal of test mainboard and the second power of test mainboard, first protection circuit respectively with first power with the first power of test mainboard is connected, the second protection circuit respectively with high-speed signal with the high-speed signal connection of test mainboard, third protection circuit respectively with the second power of test mainboard is connected.
2. The protection device of the test fixture according to claim 1, wherein the first protection circuit comprises a first overcurrent protection circuit, a first overvoltage protection circuit, a first power supply filter circuit, a first surge protection circuit, a first electrostatic protection circuit and a power supply indication circuit, the first overcurrent protection circuit is respectively connected with the first power supply and the first overvoltage protection circuit, the first power supply filter circuit is respectively connected with the first overvoltage protection circuit and the first surge protection circuit, the first electrostatic protection circuit is respectively connected with the first surge protection circuit and the power supply indication circuit, and the power supply indication circuit is connected with the first power supply of the test main board.
3. The protective device of claim 1, wherein the second protective circuit comprises a low-capacitance electrostatic protection circuit connected to the high-speed signal and the high-speed signal of the test motherboard, respectively.
4. The protection device of the test fixture according to claim 1, wherein the third protection circuit comprises a power supply reverse connection protection circuit, a second overcurrent protection circuit, a second overvoltage protection circuit, a second power supply filter circuit, a second surge protection circuit and a second static protection circuit, the power supply reverse connection protection circuit is respectively connected with the second power supply and the second overcurrent protection circuit, the second overvoltage protection circuit is respectively connected with the second overcurrent protection circuit and the second power supply filter circuit, the second surge protection circuit is respectively connected with the second power supply filter circuit and the second static protection circuit, and the second static protection circuit is connected with the second power supply of the test motherboard.
5. The protection device of the test fixture of claim 2, wherein the first over-current protection circuit comprises a first self-healing fuse connected to the first power supply and the first over-voltage protection circuit, respectively.
6. The protection device of the test fixture according to claim 2, wherein the first overvoltage protection circuit comprises a first voltage stabilizing tube, a second voltage stabilizing tube and a third voltage stabilizing tube, wherein the positive electrode of the first voltage stabilizing tube, the positive electrode of the second voltage stabilizing tube and the positive electrode of the third voltage stabilizing tube are all grounded, and the negative electrode of the first voltage stabilizing tube, the negative electrode of the second voltage stabilizing tube and the negative electrode of the third voltage stabilizing tube are all connected with the first overcurrent protection circuit.
7. The protection device of the test fixture according to claim 2, wherein the first power supply filter circuit comprises a first electrolytic capacitor, a first ceramic capacitor and a second ceramic capacitor, the negative electrode of the first electrolytic capacitor, the first end of the first ceramic capacitor and the first end of the second ceramic capacitor are all grounded, and the positive electrode of the first electrolytic capacitor, the second end of the first ceramic capacitor and the second end of the second ceramic capacitor are all connected with the first overvoltage protection circuit.
8. The apparatus according to claim 3, wherein the low capacitance electrostatic protection circuit comprises a first electrostatic diode and a second electrostatic diode, the first end of the first electrostatic diode and the first end of the second electrostatic diode are grounded, the second end of the first electrostatic diode is connected to the first end of the high-speed signal and the first end of the high-speed signal of the test motherboard, respectively, and the second end of the second electrostatic diode is connected to the second end of the high-speed signal and the second end of the high-speed signal of the test motherboard, respectively.
9. The protection device of the test fixture of claim 4, wherein the second over-current protection circuit comprises a second self-healing fuse connected to the power supply reverse protection circuit and the second over-voltage protection circuit, respectively.
10. The device for protecting a test fixture according to claim 4, wherein the second power filter circuit comprises a second electrolytic capacitor, a third ceramic capacitor and a fourth ceramic capacitor, wherein the negative electrode of the second electrolytic capacitor, the first end of the third ceramic capacitor and the first end of the fourth ceramic capacitor are all grounded, and the positive electrode of the second electrolytic capacitor, the second end of the third ceramic capacitor and the second end of the fourth ceramic capacitor are all connected with the second overvoltage protection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320242668.1U CN219641786U (en) | 2023-02-15 | 2023-02-15 | Protection device of test fixture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320242668.1U CN219641786U (en) | 2023-02-15 | 2023-02-15 | Protection device of test fixture |
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| CN219641786U true CN219641786U (en) | 2023-09-05 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320242668.1U Active CN219641786U (en) | 2023-02-15 | 2023-02-15 | Protection device of test fixture |
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| Country | Link |
|---|---|
| CN (1) | CN219641786U (en) |
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2023
- 2023-02-15 CN CN202320242668.1U patent/CN219641786U/en active Active
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