CN219477857U

CN219477857U - Inversion driving and protecting circuit

Info

Publication number: CN219477857U
Application number: CN202320525240.8U
Authority: CN
Inventors: 王文涌; 谢申衡; 顾永; 王振; 赵雪晴; 秦晓冬
Original assignee: Anhui Daheng New Energy Technology Co ltd
Current assignee: Anhui Daheng New Energy Technology Co ltd
Priority date: 2023-03-17
Filing date: 2023-03-17
Publication date: 2023-08-04
Anticipated expiration: 2033-03-17

Abstract

The utility model discloses an inversion driving and protecting circuit, and relates to the technical field of photovoltaic inverters. The utility model comprises the following steps: the device comprises a drive power supply circuit, a drive control circuit, a drive output processing circuit, a hardware dead zone adjusting circuit and a quick turn-off control circuit. The utility model has simple integral circuit, can quickly protect the inversion driving circuit through the quick turn-off control module, drives the output processing module RLC absorption circuit, can effectively optimize inversion driving and inhibit voltage spike, improves the working efficiency of the whole system, ensures that the system can stably run for a long time, adopts the driving chip to effectively isolate the driving power tube, can absorb circuit oscillation, has strong driving capability, solves the problem of insufficient inversion driving current, can quickly turn off the protection inversion driving, reduces the failure rate of a machine, improves the stability of products, and simultaneously prevents the faults of overcurrent, overvoltage, overtemperature and the like in the circuit.

Description

Inversion driving and protecting circuit

Technical Field

The utility model belongs to the technical field of photovoltaic inverters, and particularly relates to an inversion driving and protecting circuit.

Background

Along with the development of electronic technology, the application of the inverter module is more and more extensive, especially the inverter module is an indispensable core device in the frequency converter and inverter products, the inverter circuit is a basic chopper circuit, it can change direct current into alternating current, mainly apply to industrial occasions such as alternating current power supply, inverter, etc., as long as the inverter module has unusual such products to be nearly equivalent to the rejection product and can't realize the due function, therefore, drive and protection circuit of the inverter module receive due attention in the design of the frequency converter products.

At present, the inversion driving and protecting circuit is simple, generally single-tube driving is carried out, and the power tube is burnt out due to direct connection possibly caused by insufficient driving dead zone, the current inversion driving circuit is driven and turned off by a processor only by means of sampling of a sensor, and the current inversion driving circuit is easy to cause extreme damage such as power tube damage due to the fact that software is long in delay time and lacks of quick turn-off protection and can not effectively turn off driving in time, so that faults such as overcurrent, overvoltage and overtemperature easily occur in the current inversion driving circuit.

For the problems in the related art, no effective solution has been proposed at present.

Disclosure of Invention

The present utility model provides an inverter driving and protecting circuit for solving the above-mentioned problems of the prior art.

In order to solve the technical problems, the utility model is realized by the following technical scheme:

the utility model relates to an inversion driving and protecting circuit, comprising: the device comprises a drive power supply circuit, a drive control circuit, a drive output processing circuit, a hardware dead zone adjusting circuit and a quick turn-off control circuit; the drive power supply circuit is used for supplying power to the drive control circuit, the drive control circuit outputs a drive input signal to the drive output circuit, and the drive output processing circuit is used for performing RLC absorption processing on the drive input signal; the driving control circuit comprises a driving chip U1 and a driving chip U2, the driving chip U1 and the driving chip U2 are respectively positioned on an upper bridge arm and a lower bridge arm of the driving control circuit, and the hardware dead zone adjusting circuit is used for adjusting the dead zone time of the driving of the upper bridge arm and the lower bridge arm; the quick turn-off control circuit is used for executing quick turn-off protection on the whole inversion driving and protecting circuit.

Further, the driving power supply circuit comprises a first upper tube power supply unit, a second upper tube power supply unit, a first lower tube power supply unit and a first lower tube power supply unit; the first upper tube power supply unit comprises a 12V power supply V1, a voltage stabilizing diode D1, a current limiting resistor R1, a voltage stabilizing resistor R3, a filter capacitor C2 and a filter capacitor C3; the second upper tube power supply unit comprises a filter capacitor C8, a filter capacitor C9 and a voltage stabilizing resistor R12; the first lower tube power supply unit comprises a 12V power supply V2, a voltage stabilizing diode D2, a current limiting resistor R13, a voltage stabilizing resistor R14, a filter capacitor C10 and a filter capacitor C11; the first lower tube power supply unit comprises a filter capacitor C13, a filter capacitor C14 and a voltage stabilizing resistor R23.

Further, the driving chip U1 is connected with two 5V power supplies, and the driving chip U1 is also connected with a current limiting resistor R5, a current limiting resistor R6 and a current limiting resistor R9 respectively; the driving chip U2 is connected with two 5V power supplies, and the driving chip U2 is also respectively connected with a current limiting resistor R15, a current limiting resistor R16 and a current limiting resistor R19; the driving chip U1 and the driving chip U2 are both used for driving the high-power switch tube, and effectively isolate the driving power supply circuit and the driving output processing circuit.

Further, the driving output processing circuit comprises a pull-down resistor unit, an output current limiting unit and an output filtering unit; the pull-down resistor unit comprises a voltage stabilizing resistor R8 and a voltage stabilizing resistor R18; the output current limiting unit comprises a current limiting resistor R7, a current limiting resistor R10, a current limiting resistor R17 and a current limiting resistor R20; the output filter unit comprises a filter inductor L1, a filter inductor L2, a filter inductor L3 and a filter inductor 4.

Further, the hardware dead zone adjusting circuit comprises a dead zone resistance control unit and a dead zone capacitance control unit; the dead zone resistance control unit comprises a resistor R11 and a resistor R22; the dead zone capacitance control unit comprises a capacitance C7 and a capacitance C12; the dead zone resistance control unit and the dead zone capacitance control unit are matched together to adjust dead zone time of the driving of the upper bridge arm and the lower bridge arm.

Further, the quick turn-off control circuit comprises a power supply unit and a turn-off control unit; the power supply unit comprises a 5V power supply, a filter capacitor C4 and a filter capacitor C6; the turn-off control unit comprises a MOS tube Q1, a 5V power supply, a filter capacitor C4, a bias resistor R2 and a bias resistor R4; the MOS transistor Q1 can be used for rapidly enabling the driving chip U1 and the driving chip U2 to drive a rear-stage high-power switch transistor (a rear-stage high-power switch transistor is a rear-stage MOS transistor).

The utility model has the following beneficial effects:

the inversion driving and protecting circuit is simple in integral circuit, power is supplied to the driving chip through the driving power supply module, the driving output processing module performs RLC absorption processing on driving input signals, the hardware dead zone adjusting module can adjust the driving dead zone time of the upper bridge arm and the lower bridge arm to form a driving control circuit together with the driving control module, and the inversion driving circuit can be protected rapidly through the rapid turn-off control module. The drive output processing module RLC absorption circuit can effectively optimize inversion driving and inhibit voltage spikes, improves the working efficiency of the whole system, ensures that the system can stably run for a long time, and the quick turn-off control module can effectively and quickly turn off the protection inversion driving, reduces the failure rate of the machine, and further improves the stability of products;

the driving control circuit adopts driving chips U1 and U2, the types of the driving chips U1 and U2 are MP18831-A4BGY-Z, the driving control circuit has the capacity of pulling and filling peak current of up to 4A, can realize the tolerance voltage of up to 5 KVMS and the common mode transient immunity of rating value larger than 100KV/us, can drive various power switching devices, has the characteristics of short propagation delay and small pulse width distortion, can play the role of isolating a DSP from the driving circuit, can effectively protect the DSP main control circuit, and enables the driving circuit not to be interfered by the main control circuit, and to work efficiently and stably.

Of course, it is not necessary for any one product to practice the utility model to achieve all of the advantages set forth above at the same time.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings that are needed for the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the utility model, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a circuit topology of an inverter driving and protecting circuit according to the present utility model;

FIG. 2 is a circuit topology of the driving power supply circuit of the present utility model;

FIG. 3 is a circuit topology of the drive control circuit of the present utility model;

FIG. 4 is a circuit topology of the driving output processing circuit of the present utility model;

FIG. 5 is a circuit topology of a hardware dead zone adjustment circuit of the present utility model;

fig. 6 is a circuit topology of the quick turn-off control circuit of the present utility model.

Detailed Description

The following description of the technical solutions in the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings in the embodiments of the present utility model, and it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, based on the embodiments in the utility model, which a person of ordinary skill in the art would obtain without inventive faculty, are within the scope of the utility model.

In the description of the present utility model, it should be understood that the terms "open," "upper," "lower," "top," "middle," "inner," and the like indicate an orientation or positional relationship, merely for convenience of description and to simplify the description, and do not indicate or imply that the components or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the utility model.

Referring to fig. 1-6, the present utility model is an inverter driving and protecting circuit, comprising: the device comprises a drive power supply circuit, a drive control circuit, a drive output processing circuit, a hardware dead zone adjusting circuit and a quick turn-off control circuit; the drive power supply circuit is used for supplying power to the drive control circuit, the drive control circuit outputs a drive input signal to the drive output circuit, and the drive output processing circuit is used for performing RLC absorption processing on the drive input signal; the driving control circuit comprises a driving chip U1 and a driving chip U2, the driving chip U1 and the driving chip U2 are respectively positioned on an upper bridge arm and a lower bridge arm of the driving control circuit, and the hardware dead zone adjusting circuit is used for adjusting the dead zone time of the driving of the upper bridge arm and the lower bridge arm; the quick turn-off control circuit is used for executing quick turn-off protection on the whole inversion driving and protecting circuit.

The drive power supply module generates power to supply power to the drive chip, the drive output processing module performs RLC absorption processing on the drive input signal, the hardware dead zone adjusting module can adjust the drive dead zone time of the upper bridge arm and the lower bridge arm to form a drive control circuit together with the drive control module, and the inversion drive circuit can be protected rapidly through the rapid turn-off control module. The RLC absorption circuit of the drive output processing module can effectively optimize inversion driving and inhibit voltage spikes, improves the working efficiency of the whole system, ensures that the system can stably run for a long time, and the rapid turn-off control module can effectively and rapidly turn off to protect the inversion driving, reduces the failure rate of a machine, and further improves the stability of products.

Preferably, as shown in fig. 2, the circuit topology diagram of the driving power supply circuit includes a first upper tube power supply unit, a second upper tube power supply unit, a first lower tube power supply unit, and a first lower tube power supply unit; the first upper tube power supply unit comprises a 12V power supply V1, a zener diode D1, a current-limiting resistor R1, a zener resistor R3, a filter capacitor C2 and a filter capacitor C3; the second upper tube power supply unit comprises a filter capacitor C8, a filter capacitor C9 and a voltage stabilizing resistor R12; the first lower tube power supply unit comprises a 12V power supply V2, a zener diode D2, a current-limiting resistor R13, a zener resistor R14, a filter capacitor C10 and a filter capacitor C11; the first lower tube power supply unit comprises a filter capacitor C13, a filter capacitor C14 and a voltage stabilizing resistor R23.

The circuit connection relation of the driving power supply circuit is as follows: the +12V power V1 is connected to the 1 pin of the diode D1 (model of diode D1 is US 1M) and the 1 pin of the resistor R3 (specification of resistor R3 is 10R, 1206), the 2 pin of the diode D1 is connected to the 1 pin of the resistor R1 (specification of resistor R1 is 10R, 1206), the 2 pin of the resistor R1 is connected to the 16 pin of the driving chip U1 and the 1 pin of the capacitor C2 (specification of capacitor C2 is 10uF/25V, 1206) and the 1 pin of the capacitor C3 (specification of capacitor C3 is 100nF/50V, 0603), the 1 pin of the capacitor C2 and the 2 pin of the capacitor C3 are connected to the 14 pin of the driving chip U1 and the 1 pin of the resistor R8 (the specification of the resistor R8 is 20K and 0603), the 2 pin of the resistor R3 is connected to the 11 pin of the driving chip U1 and the 2 pin of the capacitor C8 (the specification of the capacitor C8 is 10uF/25V and 1206) and the 1 pin of the capacitor C9 (the specification of the capacitor C9 is 100nF/50V and 0603), the 12 pin and 13 pin NC (unconnected) of the driving chip U1 are connected to the 1 pin of the capacitor C8 and the 2 pin of the capacitor C9 and the 1 pin of the resistor R12 and then grounded;

the +12V power V2 is connected to the 1 pin of diode D2 (model of diode D2 is US 1M) and the 1 pin of resistor R14 (specification of resistor R14 is 10R, 1206), the 2 pin of diode D2 is connected to the 1 pin of resistor R13 (specification of resistor R13 is 10R, 1206), the 2 pin of resistor R13 is connected to the 16 pin of driver chip U2 and capacitor C10 (specification of capacitor C10 is 10uF/25V, 1206) and the 1 pin of capacitor C11 (specification of capacitor C11 is 100nF/50V, 0603), the 1 pin of capacitor C10 and the 2 pin of capacitor C11 are connected to the 14 pin of driver chip U2 and the 1 pin of resistor R18 (specification of resistor R18 is 20K, 0603), the 2 pin of resistor R14 is connected to the 11 pin of driver chip U2 and the 2 pin of capacitor C13 (specification of capacitor C13 is 10uF/25V, 1206) and the 2 pin of capacitor C14 (specification of capacitor C14 is 100nF/50V, 0603) and the 2 pin of capacitor C14 is connected to the ground and the 1 pin of resistor C2 and the capacitor C2 is connected to the 1 pin of resistor C2 and the resistor C1 pin of the resistor C2 is connected.

Preferably, as shown in fig. 3, the driving control circuit has a circuit topology diagram, wherein the driving chip U1 is connected with two 5V power supplies, and the driving chip U1 is further connected with a current limiting resistor R5, a current limiting resistor R6 and a current limiting resistor R9 respectively; the driving chip U2 is connected with two 5V power supplies, and the driving chip U2 is also respectively connected with a current limiting resistor R15, a current limiting resistor R16 and a current limiting resistor R19; the driving chip U1 and the driving chip U2 are used for driving the high-power switch tube, and effectively isolating the driving power supply circuit and the driving output processing circuit.

The circuit connection relation of the drive control circuit is as follows: the driving chip U1 (the model of the driving chip U1 is MP18831-A4 BGY-Z) is connected with the 1 pin of a resistor R5 (the specification of the resistor R5 is 100R and 0603), the 2 pin of the resistor R5 is connected with the EPWM2A, the 2 pin of the driving chip U1 is connected with the 1 pin of a resistor R6 (the specification of the resistor R6 is 100R and 0603), the 2 pin of the resistor R6 is connected with the EPWM2B, a 5V power supply is connected with the 3 pin of the driving chip U1, the 4 pin of the driving chip U1 is connected with the ground, the 5 pin of the driving chip is connected with the 1 pin of a resistor R9 (the specification of the resistor R9 is 100R and 0603), and the 7 pin NC of the driving chip and the 5V power supply are connected with the 8 pin of the driving chip U1;

similarly, pin 1 of driver chip U2 (driver chip U2 model MP18831-A4 BGY-Z) is connected to pin 1 of resistor R15 (resistor R15 has 100R,0603 specification), pin 2 of resistor R15 is connected to EPWM1A, pin 2 of driver chip U2 is connected to pin 1 of resistor R16 (resistor R16 has 100R,0603 specification), pin 2 of resistor R16 is connected to EPWM1B,5V power is connected to pin 3 of driver chip U2, pin 4 of driver chip U2 is grounded, pin 5 of driver chip U2 is connected to pin 1 of resistor R19 (resistor R19 has 100R,0603 specification), pin 7 NC of driver chip U2, and 5V power is connected to pin 8 of driver chip U2.

The drive control circuit adopts the drive chips U1 and U2, the model of the drive chips U1 and U2 is MP18831-A4BGY-Z, the isolation function of the DSP and the drive circuit is achieved, the DSP main control circuit can be effectively protected, the drive circuit is not interfered by the main control circuit, and the efficient and stable work is achieved.

The driving (isolating) chip (MP 18831-A4 BGY-Z) is an isolated half-bridge gate driver, has the capability of pulling and filling peak current of up to 4A, can realize the Common Mode Transient Immunity (CMTI) with the withstand voltage of up to 5 KVMS and the rated value of more than 100KV/us by utilizing the MPS specific high-voltage capacitive isolating technology, can drive various power switching devices, and has the characteristics of short propagation delay and small pulse width distortion.

Preferably, as shown in fig. 4, the circuit topology diagram of the driving output processing circuit includes a pull-down resistor unit, an output current limiting unit, and an output filtering unit; the pull-down resistor unit comprises a voltage stabilizing resistor R8 and a voltage stabilizing resistor R18; the output current limiting unit comprises a current limiting resistor R7, a current limiting resistor R10, a current limiting resistor R17 and a current limiting resistor R20; the output filter unit comprises a filter inductor L1, a filter inductor L2, a filter inductor L3 and a filter inductor 4.

The circuit connection relation of the driving output processing circuit is as follows: the 15 pins of the driving chip U1 are connected with the 2 pins of the resistor R8 and the 2 pins of the resistor R7 (the specification of the resistor R7 is 47R and 1206), the 1 pin of the resistor R7 is connected with the 1 pin of the inductor L1 (the specification of the inductor L1 is 120R and 2A), and the 2 pin of the inductor L1 is connected with the G pole (Q1-G) of the gallium nitride Q1;

the 10 pin of the driving chip U1 is connected with the 2 pin of a resistor R12 (the specification of the resistor R12 is 20K and 0603) and the 2 pin of a resistor R10 (the specification of the resistor R10 is 47R and 1206), the 1 pin of the resistor R10 is connected with the 1 pin of an inductor L2 (the specification of the inductor L2 is 120R and 2A), and the 2 pin of the inductor L2 is connected with the G pole (Q4-G) of a gallium nitride Q4;

the 15 pins of the driving chip U2 are connected to the 2 pins of the resistor R18 and the 2 pins of the resistor R17 (the specification of the resistor R17 is 47R and 1206), the 1 pin of the resistor R17 is connected to the 1 pin of the inductor L3 (the specification of the inductor L3 is 120R and 2A), and the 2 pin of the inductor L3 is connected to the G pole (Q2-G) of the gallium nitride Q2;

the 10 pins of the driving chip U2 are connected to the 2 pin of the resistor R23 (the specification of the resistor R23 is 20K and 0603) and the 2 pin of the resistor R20 (the specification of the resistor R20 is 47R and 1206), the 1 pin of the resistor R20 is connected to the 1 pin of the inductor L4 (the specification of the inductor L4 is 120R and 2A), and the 2 pin of the inductor L4 is connected to the G pole (Q5-G) of the gallium nitride Q5.

Preferably, a circuit topology diagram of the hardware dead zone adjustment circuit is as shown in fig. 5, the hardware dead zone adjustment circuit including a dead zone resistance control unit and a dead zone capacitance control unit; the dead zone resistance control unit includes a resistor R11 and a resistor R22; the dead zone capacitance control unit includes a capacitance C7 and a capacitance C12; the dead zone resistance control unit and the dead zone capacitance control unit are matched together to adjust dead zone time of the upper bridge arm drive and the lower bridge arm drive.

The circuit connection relation of the hardware dead zone adjusting circuit is as follows: the 6 pin of the driving chip U1 is connected to the 1 pin of the dead resistor R11 and the 1 pin of the capacitor C7, and the 2 pin of the resistor R11 and the 2 pin of the capacitor C7 are connected to the ground; the 6 pins of the driving chip U2 are connected to the 1 pin of the dead resistor R22 and the 1 pin of the capacitor C12, and the 2 pin of the resistor R22 and the 2 pin of the capacitor C12 are grounded.

Preferably, a circuit topology diagram of the quick turn-off control circuit is shown in fig. 6, and the quick turn-off control circuit comprises a power supply unit and a turn-off control unit; the power supply unit comprises a 5V power supply, a filter capacitor C4 and a filter capacitor C6; the turn-off control unit comprises a MOS tube Q1 (the model of the MOS tube Q1 is BSS 84), a 5V power supply, a filter capacitor C4, a bias resistor R2 and a bias resistor R4; the MOS transistor Q1 can rapidly enable the driving chip U1 and the driving chip U2 to drive the rear-stage high-power switch transistor.

The circuit connection relation of the quick turn-off control circuit is as follows: the 5V power supply is connected into the 2 pin of a capacitor C4 (the specification of the capacitor C4 is 1uF/16V, 0603) and the 1 pin of a capacitor C5 (the specification of the capacitor C5 is 100nF/50V, 0603) and the 1 pin of a capacitor C6 (the specification of the capacitor C6 is 100nF/50V, 0603), and the 1 pin of the capacitor C4, the 2 pin of the capacitor C5 and the 2 pin of the capacitor C6 are grounded; the 5V power supply is connected with the 2 pin of the MOS tube Q1 (the model of the MOS tube Q1 is BSS 84), the 1 pin of the resistor R2 (the specification of the resistor R2 is 10K and 0603) and the 1 pin of the capacitor C1 (the specification of the capacitor C1 is 100nF/50V and 0603), meanwhile, the 1 pin of the MOS tube Q1 is connected with the 2 pin of the resistor R2 and the 2 pin of the capacitor C1 and then connected with the 2 pin of the resistor R4 (the specification of the resistor R4 is 499R and 0603), and the 1 pin of the resistor R4 is connected with the INV-OFF turn-OFF control unit; the 3 pins of the MOS transistor Q1 are connected to the 2 pins of the resistor R9 (the specification of the resistor R9 is 100R and 0603), the 1 pin of the resistor R21 (the specification of the resistor R21 is 10K and 0603), the 2 pins of the resistor R19 (the specification of the resistor R19 is 100R and 0603), and the 2 pins of the resistor R21 are grounded.

In the description of the present specification, the descriptions of the terms "one embodiment," "example," "specific example," and the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the utility model. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

The above disclosed preferred embodiments of the utility model are merely intended to help illustrate the utility model. The preferred embodiments are not exhaustive or to limit the utility model to the precise form disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the utility model and the practical application, to thereby enable others skilled in the art to best understand and utilize the utility model.

Claims

1. An inverter driving and protecting circuit, comprising: the device comprises a drive power supply circuit, a drive control circuit, a drive output processing circuit, a hardware dead zone adjusting circuit and a quick turn-off control circuit;

the drive power supply circuit is used for supplying power to the drive control circuit, the drive control circuit outputs a drive input signal to the drive output circuit, and the drive output processing circuit is used for performing RLC absorption processing on the drive input signal;

the driving control circuit comprises a driving chip U1 and a driving chip U2, the driving chip U1 and the driving chip U2 are respectively positioned on an upper bridge arm and a lower bridge arm of the driving control circuit, and the hardware dead zone adjusting circuit is used for adjusting the dead zone time of the driving of the upper bridge arm and the lower bridge arm;

the quick turn-off control circuit is used for executing quick turn-off protection on the whole inversion driving and protecting circuit.

2. The inverter driving and protecting circuit according to claim 1, wherein: the driving power supply circuit comprises a first upper tube power supply unit, a second upper tube power supply unit, a first lower tube power supply unit and a first lower tube power supply unit;

the first upper tube power supply unit comprises a 12V power supply V1, a voltage stabilizing diode D1, a current limiting resistor R1, a voltage stabilizing resistor R3, a filter capacitor C2 and a filter capacitor C3;

the second upper tube power supply unit comprises a filter capacitor C8, a filter capacitor C9 and a voltage stabilizing resistor R12;

the first lower tube power supply unit comprises a 12V power supply V2, a voltage stabilizing diode D2, a current limiting resistor R13, a voltage stabilizing resistor R14, a filter capacitor C10 and a filter capacitor C11;

the first lower tube power supply unit comprises a filter capacitor C13, a filter capacitor C14 and a voltage stabilizing resistor R23.

3. The inverter driving and protecting circuit according to claim 1, wherein: the driving chip U1 is connected with two 5V power supplies, and the driving chip U1 is also respectively connected with a current limiting resistor R5, a current limiting resistor R6 and a current limiting resistor R9;

the driving chip U2 is connected with two 5V power supplies, and the driving chip U2 is also respectively connected with a current limiting resistor R15, a current limiting resistor R16 and a current limiting resistor R19;

the driving chip U1 and the driving chip U2 are both used for driving the high-power switch tube, and effectively isolate the driving power supply circuit and the driving output processing circuit.

4. The inverter driving and protecting circuit according to claim 1, wherein: the driving output processing circuit comprises a pull-down resistor unit, an output current limiting unit and an output filtering unit;

the pull-down resistor unit comprises a voltage stabilizing resistor R8 and a voltage stabilizing resistor R18;

the output current limiting unit comprises a current limiting resistor R7, a current limiting resistor R10, a current limiting resistor R17 and a current limiting resistor R20;

the output filter unit comprises a filter inductor L1, a filter inductor L2, a filter inductor L3 and a filter inductor 4.

5. The inverter driving and protecting circuit according to claim 1, wherein: the hardware dead zone adjusting circuit comprises a dead zone resistance control unit and a dead zone capacitance control unit;

the dead zone resistance control unit comprises a resistor R11 and a resistor R22;

the dead zone capacitance control unit comprises a capacitance C7 and a capacitance C12;

the dead zone resistance control unit and the dead zone capacitance control unit are matched together to adjust dead zone time of the driving of the upper bridge arm and the lower bridge arm.

6. The inverter driving and protecting circuit according to claim 1, wherein: the quick turn-off control circuit comprises a power supply unit and a turn-off control unit;

the power supply unit comprises a 5V power supply, a filter capacitor C4 and a filter capacitor C6;

the turn-off control unit comprises a MOS tube Q1, a 5V power supply, a filter capacitor C4, a bias resistor R2 and a bias resistor R4;

the MOS tube Q1 can be used for rapidly enabling the driving chip U1 and the driving chip U2 to drive a rear-stage high-power switch tube.