CN219370716U - Chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate - Google Patents
Chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate Download PDFInfo
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- CN219370716U CN219370716U CN202222563997.4U CN202222563997U CN219370716U CN 219370716 U CN219370716 U CN 219370716U CN 202222563997 U CN202222563997 U CN 202222563997U CN 219370716 U CN219370716 U CN 219370716U
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Abstract
A chip temperature compensation attenuator based on an NTC heat-sensitive ceramic substrate belongs to the technical field of electronic components. Comprises an NTC thermosensitive ceramic substrate, a thin film resistor layer, a thin film electrode layer and a back insulating protective layer. Preparing a thin film resistor on the upper surface of the NTC thermosensitive ceramic substrate, and preparing a thin film electrode layer on the thin film resistor layer; preparing a back insulating protective layer on the bottom surface of the NTC thermosensitive ceramic substrate; the NTC thermistor consists of an NTC thermosensitive ceramic substrate and electrodes thereof, and is not only a carrier of the chip temperature compensation attenuator, but also a functional body of the negative temperature coefficient resistor of the chip temperature compensation attenuator attenuation network; the resistance film is not only a positive temperature coefficient resistance function body of the chip temperature compensation attenuator attenuation network, but also an adhesion barrier layer of the electrode layer. The problems of larger size, low N value and low application frequency of the traditional temperature compensation attenuator are solved. The chip temperature compensation attenuator is widely applied to the fields of microwave communication, electronic radar and the like which need high-frequency compensation.
Description
Technical Field
The utility model belongs to the technical field of electronic components, and further relates to the field of attenuators, in particular to a chip temperature compensation attenuator based on an NTC (negative temperature coefficient) heat-sensitive ceramic substrate.
Background
The passive sheet type membrane temperature compensation attenuator (hereinafter referred to as temperature compensation attenuator) has the characteristics of high application frequency, good compensation characteristic, no system distortion, phase shift, time delay and the like, is widely applied to the fields of industrial Internet, electronic radar, man-machine interaction, 5G communication and the like, and plays roles in temperature compensation and isolation protection in an electronic system.
The internal core attenuation network of the temperature compensation attenuator is generally composed of two resistors with different temperature characteristics, such as a positive temperature coefficient resistor with positive temperature characteristics, an NTC thermistor with negative temperature characteristics and the like. Since the properties of the materials are quite different, it is not possible to integrate the resistances of two different temperature properties at the same time. At present, the temperature compensation attenuator basically adopts NTC resistance paste and PTC resistance paste to be sequentially integrated on a ceramic substrate in a thick film printing mode to form an attenuation network, and then the product preparation is completed through processes such as encapsulation protection, electrode preparation and the like. However, due to the limitations of thick film technology and NTC resistor paste temperature characteristics and sheet resistance thereof, it is difficult for the existing temperature compensation attenuator to meet the application requirements of miniaturization, large temperature compensation coefficient (high N value) and high frequency, and a new passive temperature compensation device is urgently needed in the market to solve the above problems.
In view of this, the present utility model has been made.
Disclosure of Invention
The technical problems to be solved by the utility model are as follows: the problems of low application frequency, large size and small compensation coefficient of the temperature compensation attenuator prepared by the existing thick film technology are solved.
The utility model is characterized in that: the film sputtering and photoetching forming process is adopted to manufacture a film resistor attenuation network, a film electrode and an insulating protective layer, and the film resistor attenuation network, the film electrode and the insulating protective layer interact with the resistor of the NTC thermosensitive ceramic substrate structure to realize the aims of micro size, high N value and high frequency.
For this purpose, the utility model provides a temperature compensation attenuator based on an NTC heat-sensitive ceramic substrate chip, and the schematic structure is shown in figures 1-9.
The NTC heat-sensitive ceramic comprises an NTC heat-sensitive ceramic substrate 1, a thin film resistor layer 2, a thin film electrode layer 3 and a back insulating protective layer 4;
the NTC thermosensitive ceramic substrate is a double-sided polished substrate, is a carrier of a chip temperature compensation attenuator, is also a resistor function body of an NTC thermosensitive resistor of a chip temperature compensation attenuator attenuation network, and consists of an NTC thermosensitive matrix and electrodes, wherein under the condition that the square resistance of the NTC thermosensitive substrate is certain, the resistance of the NTC thermosensitive resistor is determined by the shape of the electrodes and the distance between the electrodes;
preparing a thin film resistor on the upper surface of the NTC thermosensitive ceramic substrate, and preparing a thin film electrode layer on the thin film resistor layer; preparing a back insulating protective layer on the bottom surface of the NTC thermosensitive ceramic substrate;
the film resistor layer consists of a positive temperature coefficient resistor film on the NTC thermosensitive ceramic substrate, and forms a positive temperature coefficient resistor which is a positive temperature coefficient resistor function body of a chip temperature compensation attenuator attenuation network and is also an adhesion barrier layer of the electrode layer;
the thin film electrode layer is of a metal film structure and is positioned on the upper surfaces of the two ends of the thin film resistor layer to form an upper surface thin film electrode;
the back insulating protective layer is an insulating film and is positioned on the back of the NTC thermal sensitive ceramic substrate to form the back insulating protective layer of the NTC thermal sensitive ceramic substrate;
the resistance attenuation network of the chip temperature compensation attenuator consists of an NTC thermistor, a positive temperature coefficient resistor and a thin film electrode;
the surface pattern structure of the chip temperature compensation attenuator is determined by the specific shape and specific combination of the thin film resistor layer and the thin film electrode layer.
The thin film electrode and the thin film resistor are manufactured by a thin film process.
The beneficial effects are that: compared with the temperature compensation attenuator prepared by the prior thick film process, the temperature compensation attenuator provided by the utility model has the advantages that the NTC thermosensitive ceramic substrate is adopted as the negative temperature coefficient resistor of the attenuator core network, so that the compensation characteristic of the chip temperature compensation attenuator is good, and the temperature compensation coefficient is increased; on the other hand, the sputtering and etching processes are adopted to prepare the resistor film and the electrode film, and the bearing is basically used as a part of the resistor body, so that the size of the chip temperature compensation attenuation attenuator is further reduced, and the application frequency is improved. Therefore, the chip temperature compensation attenuator has the characteristics of small volume, high application frequency (up to 36 GHz), good compensation characteristic, large temperature compensation coefficient, good compensation linearity and the like.
The method can be widely applied to the fields of microwave communication, electronic radar and the like which need high-frequency compensation.
Drawings
Fig. 1 is a schematic diagram of a principal structure of a chip temperature compensation attenuator.
Fig. 2 is a schematic top view of the principle of the chip temperature compensation attenuator.
Fig. 3 is a schematic diagram of a chip temperature compensation attenuator in a left view.
FIG. 4 is a schematic diagram of the surface pattern of a pi-network straight resistor double-straight parallel electrode.
FIG. 5 is a schematic diagram of the surface pattern of a pi-network S-shaped resistor UT-shaped nested parallel electrode.
FIG. 6 is a schematic diagram of the surface pattern of a pi-network U-resistance double-linear broken-strip parallel electrode.
FIG. 7 is a schematic diagram of the surface pattern of a T-network straight resistor tri-linear parallel electrode.
FIG. 8 is a schematic diagram of the surface pattern of a T-network straight resistor cross-shaped nested three-parallel electrode.
FIG. 9 is a schematic diagram of the surface pattern of a T-network S-shaped resistor tri-linear parallel electrode.
In the figure: 1 is an NTC thermosensitive ceramic substrate, 2 is a resistance function layer, 3 is an electrode layer, and 4 is a back insulation protection layer.
Description of the embodiments
As shown in fig. 1-9, the specific embodiment of the chip temperature compensation attenuator based on the NTC thermal sensitive ceramic substrate is as follows:
the resistor film layer is prepared by adopting a film process, and the specific preparation process comprises, but is not limited to, vacuum evaporation, chemical deposition, sputtering and the like; the functional layer material includes, but is not limited to, ni-Co series thin films such as TaN, niCr, crSi, tiAlN, ta series resistive thin films, si series resistive thin films, au-Cr series resistive thin films, ni-P series resistive thin films. The thin film resistor layer is a positive temperature coefficient resistor functional layer in a core attenuation network of the chip temperature compensation attenuator and is also an adhesion barrier layer of the electrode film layer. The thickness of the resistance film layer is 0.05-1 μm.
The electrode film layer is of a metal film structure, and the electrode layer is made of materials including but not limited to a TiW-Au structure metal film, a TiW-Ni-Au structure metal film, a TiW-Cu structure metal film, tiN-AL and the like, and the thickness of the electrode layer is 2-4 mu m.
The NTC thermosensitive ceramic substrate is a supporting body of the chip temperature compensation attenuator and is also a functional body of the negative temperature coefficient resistor of the chip temperature compensation attenuator. The polishing is double-sided polishing, the roughness is 0.005-0.025 mu m, the thickness of the substrate is 150-950 mu m, and the B value range is 100-5000K;
materials of the back insulating protective layer include, but are not limited to, polyimide films, thick film printed resin films, silicon nitride films, silicon oxide films and the like, and preparation processes of the insulating protective layer include, but are not limited to, thick film printing, CVD deposition, dispensing coating, magnetron sputtering and the like. The polyimide functional layer formed by the polyimide film is a functional layer of a capacitor and is also a photoetching photosensitive material.
The surface pattern structure of the chip temperature compensation attenuator is shown in the structures shown in figures 4-9, and is a pi-type network straight resistor double-straight-line parallel electrode, a pi-type network S-shaped resistor UT-shaped nested parallel electrode, a pi-type network U-shaped resistor double-straight-line broken strip parallel electrode, a T-type network straight-line resistor triple-straight-line parallel electrode, a T-type network straight-line resistor cross nested triple-parallel electrode or a T-type network S-shaped resistor triple-straight-line parallel electrode.
The surface pattern structure of the chip temperature compensation attenuator comprises, but is not limited to, the structures shown in fig. 4-9; the shape of a specific thin film electrode includes, but is not limited to, an S-shaped electrode, a zigzag electrode, a nested electrode, a straight parallel type electrode, etc.; the shape of the thin film resistor includes, but is not limited to, an S-type resistor, a Z-type resistor, a straight resistor, and a meander line resistor.
Finally, it should be noted that: the above examples are only illustrative and the utility model includes, but is not limited to, the above examples, which need not and cannot be exhaustive of all embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. All embodiments meeting the requirements of the utility model are within the protection scope of the utility model.
Claims (10)
1. The utility model provides a chip temperature compensation attenuator based on NTC thermal-sensitive ceramic base plate which characterized in that: comprises an NTC thermosensitive ceramic substrate, a thin film resistor layer, a thin film electrode layer and a back insulating protective layer;
the NTC thermosensitive ceramic substrate is a double-sided polished substrate, is a carrier of a chip temperature compensation attenuator, and is also a resistor function body of an NTC thermosensitive resistor of a chip temperature compensation attenuator attenuation network, the NTC thermosensitive resistor consists of an NTC thermosensitive matrix and electrodes, and according to the set NTC thermosensitive substrate sheet resistance, the resistance value of the NTC thermosensitive resistor is determined by the shape of the electrodes and the distance between the electrodes;
preparing a thin film resistor on the upper surface of the NTC thermosensitive ceramic substrate, and preparing a thin film electrode layer on the thin film resistor layer; preparing a back insulating protective layer on the bottom surface of the NTC thermosensitive ceramic substrate;
the film resistor layer consists of a positive temperature coefficient resistor film on the NTC thermosensitive ceramic substrate, and forms a positive temperature coefficient resistor which is a positive temperature coefficient resistor function body of a chip temperature compensation attenuator attenuation network and is also an adhesion barrier layer of the electrode layer;
the thin film electrode layer is of a metal film structure and is positioned on the upper surfaces of the two ends of the thin film resistor layer to form an upper surface thin film electrode;
the back insulating protective layer is an insulating film and is positioned on the back of the NTC thermal sensitive ceramic substrate to form the back insulating protective layer of the NTC thermal sensitive ceramic substrate;
the resistance attenuation network of the chip temperature compensation attenuator consists of an NTC thermistor, a positive temperature coefficient resistor and a thin film electrode;
the surface pattern structure of the chip temperature compensation attenuator is determined by the specific shape and specific combination of the thin film resistor layer and the thin film electrode layer.
2. The chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate of claim 1, wherein: the resistance attenuation network is a pi-type resistance attenuation network or a T-type resistance attenuation network.
3. The chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate of claim 1, wherein: the resistor layer has a structure of an S-type resistor, a Z-type resistor, a straight resistor or a zigzag resistor.
4. The chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate of claim 1, wherein: the thin film resistor layer is a Ni-Co series resistor film, a Ta series resistor film, a Si series resistor film, an Au-Cr series resistor film or a Ni-P series resistor film.
5. The chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate of claim 4, wherein: the material of the resistance film is TaN, niCr, crSi or TiAlN, and the thickness of the film layer is 0.05-1 mu m.
6. The chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate of claim 1, wherein: the electrode film layer has a structure of an S-shaped electrode, a zigzag electrode, a nested electrode or a straight parallel electrode.
7. The chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate of claim 1, wherein: the metal film is made of TiW-Au structure metal film, tiW-Ni-Au structure metal film, tiW-Cu structure metal film or TiN-AL, and the thickness of the electrode layer is 2-4 μm.
8. The chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate of claim 1, wherein: the roughness of the double-sided polished NTC heat-sensitive ceramic substrate is 0.005-0.025 mu m, the thickness is 150-950 mu m, and the B value range is 100-5000K.
9. The chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate of claim 1, wherein: the material of the back insulating protective layer is polyimide film, thick film printed resin film, silicon nitride film or silicon oxide film.
10. The chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate of claim 1, wherein: the surface pattern structure of the chip temperature compensation attenuator is a pi-type network straight-shaped resistor double-straight-line parallel electrode, a pi-type network S-shaped resistor UT-shaped nested parallel electrode, a pi-type network U-shaped resistor double-straight-line broken strip-shaped parallel electrode, a T-type network straight-shaped resistor tri-straight-line parallel electrode, a T-type network straight-shaped resistor cross nested tri-straight-line parallel electrode or a T-type network S-shaped resistor tri-straight-line parallel electrode.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202222563997.4U CN219370716U (en) | 2022-09-27 | 2022-09-27 | Chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202222563997.4U CN219370716U (en) | 2022-09-27 | 2022-09-27 | Chip temperature compensation attenuator based on NTC thermal sensitive ceramic substrate |
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| CN219370716U true CN219370716U (en) | 2023-07-18 |
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