CN219304719U - High-power factor unipolar pulse driving circuit suitable for DBD load - Google Patents

High-power factor unipolar pulse driving circuit suitable for DBD load Download PDF

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CN219304719U
CN219304719U CN202320071514.0U CN202320071514U CN219304719U CN 219304719 U CN219304719 U CN 219304719U CN 202320071514 U CN202320071514 U CN 202320071514U CN 219304719 U CN219304719 U CN 219304719U
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diode
switching tube
dbd
power factor
anode
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唐雄民
谢浩源
黎成辉
赵子豪
张淼
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Guangdong University of Technology
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Abstract

The utility model discloses a high-power factor unipolar pulse driving circuit suitable for a DBD load, which comprises a power factor correction unit, a unipolar intermittent pulse excitation generation unit and a power device driving circuit. The topology disclosed by the utility model not only has the pulse excitation capable of providing high rise rate and intermittent time for the dielectric barrier discharge load, but also can realize the technical indexes of high power factor and low total harmonic distortion.

Description

High-power factor unipolar pulse driving circuit suitable for DBD load
Technical Field
The utility model particularly relates to a high-power factor unipolar pulse driving circuit suitable for a DBD load.
Background
Dielectric Barrier Discharge (DBD), also called silent discharge, is a gas discharge in which an insulating substance is inserted into a discharge space. The DBD load is typically composed of 4 parts, a high voltage electrode, a low voltage electrode (typically a ground electrode), a discharge air gap and a blocking medium. When the voltage between the high voltage electrode and the low voltage electrode exceeds the discharge voltage of the DBD load, a large amount of high energy particles are generated in the discharge air gap. Because of this characteristic, DBD technology has been widely used in the industrial fields of material surface treatment, air purification, water treatment, pneumatic flow control, ultraviolet light generation, ozone synthesis, and the like. Most of high-frequency DBD load power supplies are voltage source type high-frequency power supplies at present, so that a stable direct-current power supply is also obtained in application. There are currently mainly two solutions, the first of which is what can be called active. In this scheme, the input current waveform is controlled to resemble a sinusoidal waveform in phase with the input voltage. The scheme has the advantages of high power factor of the power supply, complex control and high cost. The second may be referred to as a passive scheme. LC filters, LCD rectifiers and valley fill circuits are representative of such schemes. Passive schemes, while having the advantage of high reliability and low cost, have difficulty in achieving high power factors (typically below 0.9) and injecting a large number of harmonics into the grid.
Therefore, it is necessary to design a high power factor unipolar pulse driving circuit suitable for DBD loads.
Disclosure of Invention
The technical problem to be solved by the utility model is to provide the high-power factor unipolar pulse driving circuit suitable for the DBD load, which has a simple topological structure, can provide pulse excitation with high rise rate and intermittent time for the dielectric barrier discharge load, and can realize the technical indexes of high power factor and low total harmonic distortion.
The technical proposal of the utility model is as follows:
a high power factor unipolar pulse drive circuit suitable for DBD loads, comprising: the power supply comprises an alternating current power supply, a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, a seventh diode, a first switching tube, a second switching tube, a filter inductor, a filter capacitor and a step-up transformer;
the first end of the alternating current power supply is respectively connected with the anode of the first diode and the cathode of the third diode;
the second end of the alternating current power supply is respectively connected with the anode of the second diode and the cathode of the fourth diode;
the cathode of the first diode is respectively connected with the cathode of the second diode and the first end of the filter inductor;
the second end of the filter inductor is respectively connected with the second end of the first switching tube and the anode of the fifth diode;
the cathode of the fifth diode is respectively connected with the second end of the filter capacitor, the anode of the sixth diode and the cathode of the seventh diode;
the cathode of the sixth diode is connected with the first end of the primary coil of the step-up transformer;
the second end of the primary coil of the step-up transformer is connected with the second end of the second switching tube;
the first end of the secondary coil of the step-up transformer is respectively connected with the anode of the seventh diode and the high-voltage electrode of the dielectric barrier discharge load;
the anode of the third diode is respectively connected with the anode of the fourth diode, the first end of the first switch tube, the first end of the filter capacitor, the first end of the second switch tube, the second end of the secondary coil of the step-up transformer and the low-voltage electrode of the dielectric barrier discharge load.
Optionally, the first switching tube and the second switching tube share the same driving signal.
Optionally, the same-name ends of the primary coil and the secondary coil of the step-up transformer are not on the same side.
Alternatively, the voltage peak value and the load voltage rise rate of the dielectric barrier discharge load can be achieved by adjusting the leakage reactance value of the step-up transformer.
Alternatively, the intermittent time in the voltage of the dielectric barrier discharge load may be achieved by adjusting the duty cycle of the first switching tube and the second switching tube.
Optionally, the first switching tube and the second switching tube are IGBTs;
the first end of the first switching tube and the first end of the second switching tube are both emitters of the IGBT, and the second end of the first switching tube and the second end of the second switching tube are both collectors of the IGBT.
Optionally, the first switching tube and the second switching tube are NMOS;
the first end of the first switching tube and the first end of the second switching tube are both NMOS sources, and the second end of the first switching tube and the second end of the second switching tube are both NMOS drains.
The beneficial effects are that:
(1) The power factor correction unit and the unipolar intermittent pulse excitation generation unit share a driving signal, so that the control difficulty and cost of a power supply are greatly reduced, and the organic combination of the power supply direct-current voltage generation unit and the unipolar intermittent pulse excitation generation unit is realized;
(2) Pulse excitation with high rising rate and intermittent time is provided to meet the requirement of high-performance discharge of the DBD load, and meanwhile, the technical indexes of high power factor and low total harmonic distortion can be realized;
(3) All power switching devices in the power supply can work in a soft switching state through the control of the duty ratio of the driving pulse.
Drawings
Fig. 1 is a diagram of a high power factor unipolar pulse driving circuit suitable for DBD loading;
FIG. 2 is an equivalent circuit diagram of the unipolar intermittent pulse excitation generating unit provided by the utility model;
FIG. 3 is a diagram of waveforms of operation of the unipolar intermittent pulse excitation generating unit provided by the present utility model;
fig. 4 is an equivalent circuit diagram of 4 working modes in one working cycle of the unipolar intermittent pulse excitation generating unit provided by the utility model;
fig. 5 is an equivalent circuit diagram of the power factor correction unit provided by the utility model;
FIG. 6 is a diagram showing waveforms of the power factor correction unit according to the present utility model;
FIG. 7 is a diagram showing three working states of the power factor correction unit according to the present utility model;
FIG. 8 is a waveform diagram of dielectric barrier discharge load voltage and current experiment at an operating frequency of 30kHz provided by the utility model;
wherein:
u in for the grid voltage, i in For supplying current to the network, diode D 1 -D 4 An uncontrollable bridge is formed, L is inductance, C is capacitance, D 5 -D 7 For fast recovery of diode, L 1 、L 2 Two reactors coupled to each other, M being inductance L 1 And L 2 Mutual inductance between Q 1 And Q 2 I is a power switch tube L For the current flowing through the inductance L, U C For the energy storage voltage on capacitor C, i 1 For flowing through the coupling inductance L 1 I is the current of (i) 2 For flowing through the coupling inductance L 2 I is the current of (i) D7 For flowing through diode D 7 I is the current of (i) DBD Current flowing for DBD load, u DBD Is the voltage on the DBD load.
Detailed Description
The utility model will be described more fully hereinafter with reference to the accompanying drawings and preferred embodiments in order to facilitate an understanding of the utility model, but the scope of the utility model is not limited to the following specific embodiments.
Unless defined otherwise, all technical and scientific terms used hereinafter have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the scope of the present utility model.
Example 1:
fig. 1 is a diagram of a high power factor unipolar pulse driving circuit suitable for DBD loading according to the present utility model, including: alternating current power supply, first diode, second diode, third diode, fourth diode, fifth diode, sixth diode, seventh diode, first switching tube, second switching tube, filter inductance, filter capacitance, step-up transformer, wherein:
the first end of the alternating current power supply is respectively connected with the anode of the first diode and the cathode of the third diode;
the second end of the alternating current power supply is respectively connected with the anode of the second diode and the cathode of the fourth diode;
the cathode of the first diode is respectively connected with the cathode of the second diode and the first end of the filter inductor;
the second end of the filter inductor is respectively connected with the second end of the first switching tube and the anode of the fifth diode;
the cathode of the fifth diode is respectively connected with the second end of the filter capacitor, the anode of the sixth diode and the cathode of the seventh diode;
the cathode of the sixth diode is connected with the first end of the primary coil of the step-up transformer;
the second end of the primary coil of the step-up transformer is connected with the second end of the second switching tube;
the first end of the secondary coil of the step-up transformer is respectively connected with the anode of the seventh diode and the high-voltage electrode of the dielectric barrier discharge load;
the anode of the third diode is respectively connected with the anode of the fourth diode, the first end of the first switch tube, the first end of the filter capacitor, the first end of the second switch tube, the second end of the secondary coil of the step-up transformer and the low-voltage electrode of the dielectric barrier discharge load.
FIG. 2 is an equivalent circuit diagram of the unipolar intermittent pulse excitation generating unit according to the present utility model, and it should be noted that U C Is the voltage of the capacitor C. By introducing a feedback diode D in a conventional flyback circuit 7 And adding a reverse current blocking diode D 6 Generating a unipolar intermittent pulse excitation. The operation of the unit can be briefly described as follows: when the switch tube Q 2 When conducting, the energy stored in the capacitor C passes through L 1 And L 2 The coupling inductance is transferred to the DBD load, and the DBD load resonates with the coupling inductance generating circuit to form a unipolar pulse voltage with high voltage change rate on the DBD load. When the DBD load voltage drops to the level of U C When the values are equal, due to diode D 6 Blocking reverse current and diode D 7 To the feedback action of the switch tube Q 2 When off, the DBD load voltage is clamped at U C And the current through the DBD load is equal to zero, resulting in an intermittent time in the DBD excitation voltage.
Fig. 3 is a waveform diagram of the operation of the unipolar intermittent pulse excitation generating unit provided by the utility model.
Considering that the resistance-capacitance equivalent of the DBD load has great advantages in power supply theory analysis and parameter design and the working frequency of a power supply designed for the DBD load later, the characteristics of the unipolar pulse excitation part are analyzed by adopting a resistance-capacitance series model.
Here is set a first switching tube Q 1 And a second switching tube Q 2 The switching period of (1) is T, the first switching tube Q 1 And a second switching tube Q 2 Is D. In addition, all switching tubes and diodes, i.e. first switches Q 1 Second switch tube Q 2 First diode D 1 Second diode D 2 Third diode D 3 Fourth diode D 4 Fifth diode D 5 Sixth diode D 6 Seventh diode D 7 Are considered ideal switching devices.
Here the coupling inductance L is omitted 1 And L 2 The influence of the internal resistance and the leakage flux thereof on other elements is ignored.
The capacity of the capacitor C is set to be large enough to ensure the voltage U C Constant.
Specifically, one working period of the unipolar intermittent pulse excitation generating unit provided by the utility model can be divided into 4 working modes, namely mode 1 (t 0 -t 1 ) Modality 2 (t) 1 -t 2 ) Modality 3 (t) 2 -t 3 ) Modality 4 (t) 3 -t 4 )。
Fig. 4 is an equivalent circuit diagram of 4 working modes in one working cycle of the unipolar intermittent pulse excitation generating unit provided by the utility model.
As can be taken from fig. 4, the constraint equations for modes 1-4 are respectively:
Figure BDA0004043348000000081
Figure BDA0004043348000000082
Figure BDA0004043348000000083
Figure BDA0004043348000000084
initial condition i of modality 1 1 (t 0 ) =0 and i 2 (t 0 ) Substitution formula (1-4) is available, and the following expression holds when the available mode 1-4 ends:
Figure BDA0004043348000000085
Figure BDA0004043348000000086
Figure BDA0004043348000000091
Figure BDA0004043348000000092
wherein T is 1 -T 4 Duration of modes 1-4, respectively, i 1 (t 1 ) For flowing through inductance L at the end of mode 1 1 I is the current of (i) 2 (t 2 )、i 2 (t 3 ) And i 2 (t 4 ) Current through DBD load at the end of modes 2, 3 and 4, respectively, u DBD (t 2 ) For the voltage on the DBD load at the end of mode 2, k is the coupling inductance L 1 、L 2 Is used for the coupling coefficient of the optical fiber.
Figure BDA0004043348000000093
Figure BDA0004043348000000094
B=u DBD (t 2 )。
Peak voltage analysis of DBD load:
from the modal analysis of the circuit and fig. 3, the peak voltage of the DBD load appears at the end of modality 2. From the first formula of formula (6), DBD load peak voltage U is obtained peak The method comprises the following steps:
U peak =|u DBD (t 2 )|=(1+2kN)U C (9)
in the middle of
Figure BDA0004043348000000095
It should be noted that N is also the coupling reactance L 2 And L is equal to 1 Is provided.
Analysis of the voltage rise rate of the DBD load:
taking into account the non-linearity of the negative polarity pulse voltage rise, the average voltage rise rate is used herein to describe the DBD load voltage change rate, K DBD Can be controlled by the mode 2 load voltage u DBD Absolute value of initial value and end value of (t)Sum of the values divided by the modality 2 duration T 2 The method comprises the following steps:
Figure BDA0004043348000000101
intermittent time adjustment range analysis:
from the above-described modal analysis, it is found that the load currents of the modes 1 and 4 are close to 0, and the required intrinsic recovery time T of the gas between the DBD load electrodes after the end of the discharge phenomenon is considered D Thus, the intermittence time adjusting range T L The method comprises the following steps:
T D <T L <T-T 2 -T 3 (11)
fig. 5 is an equivalent circuit diagram of the power factor correction unit provided by the utility model. It should be noted that the resistor R is here the equivalent resistor of the unipolar pulse excitation generating circuit and the DBD load. The input voltage is constant during one switching period, considering that the switching frequency is much greater than the frequency of the input voltage.
Fig. 6 is a waveform diagram of the power factor correction unit according to the present utility model. As can be seen from fig. 6, the unit is well able to complete the power factor correction and maintain the Uc voltage substantially constant. During each switching cycle, the circuit can be seen as a Boost DC-DC converter, and the circuit has three operating states as shown in FIG. 7.
Switch tube Q 1 When conducting, the current of the input inductor is:
Figure BDA0004043348000000102
during a switching cycle, the energy stored in the inductor L is:
Figure BDA0004043348000000103
the average input power over one switching period is:
Figure BDA0004043348000000104
the average input current is:
Figure BDA0004043348000000111
the equivalent input impedance is:
Figure BDA0004043348000000112
the specific implementation steps of the circuit element parameter determination and the circuit topology control are as follows, wherein reference numerals of the circuit elements refer to fig. 1:
step 1: obtaining equivalent capacitance C of DBD load in off-line mode d Equivalent resistance R d
Step 2: determining a DBD load peak voltage U based on consideration of a safety margin according to a limit voltage of a DBD load withstand voltage peak
Step 3: determination of the DC voltage U from the operating waveform diagram shown in FIG. 6 C Peak value of (2);
step 4: taking into account the inductance L 1 And L 2 The winding is wound on the same iron core, and the range of the k is set as follows: 0.995 to 0.999;
step 5, taking a group of data in interval mode in the range of k and according to the DC voltage source U C Peak value, k value and (9) determining coupling reactance L 2 And L 1 A coil turns ratio N therebetween;
step 6: determining the coupling reactance L according to the rate of rise of the desired voltage (10) 2 And determining the inductance L based on the inductance of the selected core material 2 Turns of (2);
step 7: then according to the turns ratio N and the inductance L 2 Determining the coupling reactance L in relation to the number of turns 1 Turns of (2);
step 8: judging the rationality of k according to the winding mode of the coil, the number of turns of the coil and the material characteristics of the magnetic core, and if the rationality is not good, carrying out the step 5 again until obtaining reasonable k;
step 9: according to the known conditions and T 1 、T 2 、T 3 、T 4 Determining the maximum duty cycle T of the partial circuit max . Taking into account the required intrinsic recovery time T of the gas between the DBD load electrodes after the end of the discharge phenomenon D Obtaining the minimum working period T of the partial circuit min . Taking into account the intrinsic recovery time T required to ensure the gas after the end of the discharge phenomenon, in order to achieve a soft switching D The duty cycle D range of the partial circuit is obtained as:
Figure BDA0004043348000000121
step 10: obtaining average input power of the DBD load during discharging offline;
step 11: according to the input voltage u in Determining average value of input voltage, and determining input impedance R according to average value of average input power and input voltage in
Step 12: according to the input impedance R in The relation with the reactance L and the equation (16) determine the inductance value of the inductance L, and it should be noted that D and T are designed by the parameters of the unipolar pulse excitation generation circuit.
In accordance with the design principles described above, a set of circuit typical parameters are given below:
AC voltage AC:0-250V (Adjustable)
Inductance L:62mH
Coupling inductance L 1 :488.93μH
Coupling inductance L 2 :108.62mH
Coupling coefficient k:0.9995
DBD load equivalent capacitance C d :80pF
DBD load equivalent resistance R d :13Ω
Under the set of parameters, the experimental waveform diagram of the dielectric barrier discharge load voltage and current at the working frequency of 30kHz is shown in figure 8.

Claims (7)

1. A high power factor unipolar pulse drive circuit suitable for DBD loads, comprising: the power supply comprises an alternating current power supply, a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, a seventh diode, a first switching tube, a second switching tube, a filter inductor, a filter capacitor and a step-up transformer;
the first end of the alternating current power supply is respectively connected with the anode of the first diode and the cathode of the third diode;
the second end of the alternating current power supply is respectively connected with the anode of the second diode and the cathode of the fourth diode;
the cathode of the first diode is respectively connected with the cathode of the second diode and the first end of the filter inductor;
the second end of the filter inductor is respectively connected with the second end of the first switching tube and the anode of the fifth diode;
the cathode of the fifth diode is respectively connected with the second end of the filter capacitor, the anode of the sixth diode and the cathode of the seventh diode;
the cathode of the sixth diode is connected with the first end of the primary coil of the step-up transformer;
the second end of the primary coil of the step-up transformer is connected with the second end of the second switching tube;
the first end of the secondary coil of the step-up transformer is respectively connected with the anode of the seventh diode and the high-voltage electrode of the dielectric barrier discharge load;
the anode of the third diode is respectively connected with the anode of the fourth diode, the first end of the first switch tube, the first end of the filter capacitor, the first end of the second switch tube, the second end of the secondary coil of the step-up transformer and the low-voltage electrode of the dielectric barrier discharge load.
2. The high power factor unipolar pulse driver circuit for DBD loading of claim 1, wherein the first switching tube and the second switching tube share the same driving signal.
3. The high power factor unipolar pulse driver circuit of claim 1, wherein the primary and secondary windings of the step-up transformer are not on the same side.
4. The high power factor unipolar pulse driver circuit for DBD loads of claim 1, wherein the voltage peak and load voltage rise rate of the dielectric barrier discharge load is achieved by adjusting the leakage reactance value of the step-up transformer.
5. The high power factor unipolar pulse driver circuit for DBD loads of claim 1, wherein the intermittent time in the voltage of the dielectric barrier discharge load is achieved by adjusting the duty cycle of the first and second switching transistors.
6. The high power factor unipolar pulse driver circuit suitable for DBD loading of any of claims 1-5, wherein the first switching tube and the second switching tube are IGBTs, wherein the first end of the first switching tube and the first end of the second switching tube are emitters of IGBTs, and the second end of the first switching tube and the second end of the second switching tube are collectors of IGBTs.
7. The high power factor unipolar pulse driver circuit of any of claims 1-5, wherein the first and second switching tubes are NMOS, wherein the first and second ends of the first and second switching tubes are NMOS sources, and the second ends of the first and second switching tubes are NMOS drains.
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