CN219016971U

CN219016971U - High-capacity storage main board based on Feiteng platform

Info

Publication number: CN219016971U
Application number: CN202223571203.5U
Authority: CN
Inventors: 刘金凤; 张得文; 杨继永; 李洪升
Original assignee: Jinan Tengyue Electronics Co ltd; Shandong Sheenrun Optics Electronics Co Ltd
Current assignee: Jinan Tengyue Electronics Co ltd; Shandong Sheenrun Optics Electronics Co Ltd
Priority date: 2022-12-26
Filing date: 2022-12-26
Publication date: 2023-05-12
Anticipated expiration: 2032-12-26

Abstract

The utility model provides a large-capacity storage main board based on a Feiteng platform, which comprises a Feiteng CPU chip, an FPGA chip, a PROM chip and at least one memory storage chip; the Feiteng CPU chip is connected with the FPGA chip through the PCIE bus, the FPGA chip is connected with the PROM chip, the PROM chip is provided with a first JTAG interface, and the PROM chip is used for defining at least one I/O pin of the FPGA chip as a memory bus; the FPGA chip is connected with the memory storage chip through an I/O pin defined as a memory bus, and the memory storage chip is used for expanding the storage capacity of the main board. The utility model can enlarge the storage capacity of the main board on the basis of not externally connecting a storage board, can meet the requirement of large-capacity storage, can save the space of product equipment, greatly improves the design efficiency and reduces the design difficulty.

Description

High-capacity storage main board based on Feiteng platform

Technical Field

The utility model relates to the technical field of computers, in particular to a large-capacity storage main board based on a Feiteng platform.

Background

The computer is an automated electronic device that processes input raw data according to programs written in advance by people to obtain desired output information, and uses the information to improve social productivity, quality of life of people, and the like. As the performance of computer products continues to increase, the demand for storage space is also increasing.

The main board is one of the most basic and important components of the computer, plays a role in the whole computer system, the advantages and disadvantages of the main board determine the overall performance of a computer to a certain extent, and under the condition that large-capacity storage is needed, the storage space configured on the main board can not meet the use requirement.

The storage space of the main board is enlarged mainly through the mode of external storage board at present, and this mode both increases the cost, can occupy computer equipment space again, greatly increased the product design degree of difficulty, especially to some small-size computer products, the equipment space of itself is less, does not have sufficient external storage board in space, is difficult to enlarge storage space through this kind of mode.

Disclosure of Invention

In order to solve the problems that in the prior art, the storage space of a main board is small, and the cost and the design difficulty are increased due to the fact that the external storage board is connected with the main board, the utility model provides a large-capacity storage main board based on a Feiteng platform, and the storage capacity of the main board is enlarged on the basis that the external storage board is not connected with the main board.

The utility model comprises the following steps: a Feiteng CPU chip, an FPGA chip, a PROM chip and at least one memory storage chip;

the Feiteng CPU chip is connected with the FPGA chip through the PCIE bus, the FPGA chip is connected with the PROM chip, the PROM chip is provided with a first JTAG interface, and the PROM chip is used for defining at least one I/O pin of the FPGA chip as a memory bus; the FPGA chip is connected to the memory storage chip through I/O pins defined as a memory bus, and the memory storage chip is used to expand the storage capacity of the motherboard.

Preferably, the present utility model further comprises: the bridge chip, the functional interface group and the interface configuration chip;

the Feiteng CPU chip is connected with the bridge chip through the PCIE bus, the bridge chip is connected with the interface configuration chip through the functional interface group, and the functional interface group is provided with a plurality of functional interfaces.

Preferably, the present utility model further comprises: DDR4 connector;

the Feiteng CPU chip is connected with the DDR4 connector through a memory bus; the Feiteng CPU chip is connected with the memory through the memory bus and the DDR4 connector to expand the memory.

Preferably, the present utility model further comprises: an RTC clock chip;

the Feiteng CPU chip is connected with the RTC clock chip, and the RTC clock chip is used for providing clock signals for the Feiteng CPU chip.

Preferably, the present utility model further comprises: an EEPROM chip;

the Feiteng CPU chip is connected with the EEPROM chip, and the EEPROM chip is used for storing the parameter configuration and the network address of the Feiteng CPU chip.

Preferably, the FPGA chip is provided with a second JTAG interface.

Preferably, the present utility model further comprises: the power conversion chip set is respectively connected with the Feiteng CPU chip, the FPGA chip and the bridge chip and supplies power for the Feiteng CPU chip, the FPGA chip and the bridge chip through being connected with a power supply.

Preferably, the FPGA chip is connected to the memory storage chip in a daisy-chain fashion.

Preferably, the Feiteng CPU chip adopts Feiteng D series CPU chips; the FPGA chip adopts a complex denier microelectronic JFKT type FPGA chip; the memory storage chip adopts a long Xin CXDQQAAM-WG memory storage chip; the bridge chip adopts a megacore ZX-type bridge chip.

The utility model has the advantages that the Feiteng CPU chip is connected with a plurality of memory storage chips through the FPGA chip, and the chips are all positioned on one main board, so that the storage capacity of the main board can be enlarged on the basis of not externally connecting a storage board, the requirement of large-capacity storage can be met, the space of product equipment can be saved, the design efficiency is greatly improved, the structural design difficulty of the whole product is reduced, and the utility model is suitable for computer products with large-capacity storage requirement or smaller volume.

Drawings

In order to more clearly illustrate the technical solutions of the present utility model, the drawings that are needed in the description will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present utility model, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a first embodiment of a mass storage motherboard based on a Feiteng platform;

FIG. 2 is a schematic diagram of a second embodiment of a mass storage motherboard based on a Feiteng platform;

FIG. 3 is a schematic diagram of a mass storage motherboard based on a Feiteng platform;

marked in the figure as: 1-Feiteng CPU; a 2-FPGA chip; a 3-PROM chip; 4-a memory storage chip; 5-bridge chip; 6-a set of functional interfaces; 7-interface configuration chip; 8-a first JTAG interface; 9-a second JTAG interface; a 10-DDR4 connector; 11-RTC clock chip; a 12-EEPROM chip; 13-power conversion chip set.

Detailed Description

In order to make the objects, features and advantages of the present utility model more obvious and understandable, the technical solutions of the present utility model will be clearly and completely described below with reference to the drawings in this specific embodiment, and it is apparent that the embodiments described below are only some embodiments of the present utility model, but not all embodiments of the present utility model. All other embodiments, based on the embodiments in this patent, which would be within the purview of one of ordinary skill in the art without the creative effort, are contemplated to be within the scope of protection of this patent.

Example 1

As shown in fig. 1, the present embodiment provides a large-capacity storage motherboard based on a Feiteng platform, which includes a Feiteng CPU chip 1, an FPGA chip 2, a PROM chip 3, and a memory storage chip 4;

wherein, the Feiteng CPU chip 1 adopts Feiteng D2000 series CPU chip, the FPGA chip 2 adopts complex denier microelectronic JF7K325T type FPGA chip, the memory storage chip 4 adopts long Xin CXDQ3A8AM-WG type memory storage chip;

according to the required capacity requirement of the present embodiment, three memory storage chips 4 are provided in the present embodiment, and a designer can set the number of memory storage chips 4 according to the actual required capacity of the product;

the Feiteng CPU chip 1 is connected with the FPGA chip 2 through a PCIE bus of x8, the FPGA chip 2 is connected with the PROM chip 3, the PROM chip 3 is provided with a first JTAG interface 8, a designer can write an FPGA chip configuration program into the PROM chip 3 through the first JTAG interface 8 according to design requirements, and the FPGA chip configuration program stored in the PROM chip 3 can be changed through the first JTAG interface 8.

The CCLK pin of the FPGA chip 2 provides a working clock for the PROM chip 3, the PROM chip 3 sends data from the D0 pin to the DIN pin of the FPGA chip 2 at the rising edge of the CCLK, the FPGA chip configuration program is transmitted to the FPGA chip 2, three I/O pins of the FPGA chip 2 are configured as memory buses, and the three I/O pins are connected with the memory storage chip 4 in a daisy-chain mode so as to enlarge the storage capacity of the main board.

In this embodiment, the FPGA chip configuration program stored in the PROM chip 3 is automatically transferred to the FPGA chip 2 after the motherboard is powered up, and the power failure does not cause data loss, so as to ensure the stability of the extended memory storage space.

Example two

As shown in fig. 2, this embodiment provides a mass storage motherboard based on a flying platform, and further includes a bridge chip 5, a functional interface group 6 and an interface configuration chip 7 on the basis of the first embodiment, where the bridge chip 5 is a megacore ZX-200 bridge chip;

the Feiteng CPU chip 1 is connected with the bridge chip 5 through the PCIE bus of x4, the bridge chip 5 is connected with the interface configuration chip 7 through the function interface group 6, the function interface group 6 is provided with a plurality of function interfaces, such as a USB interface, a network port, a serial port, a display interface and the like, and a designer can expand other main board function interfaces according to actual design requirements.

The embodiment further includes a DDR4 connector 10, the Feiteng CPU chip 1 is connected to the DDR4 connector 10 through a memory bus, and the Feiteng CPU chip 1 is connected to a memory through the memory bus and the DDR4 connector 10 to expand the memory.

The embodiment further comprises an RTC clock chip 11, the flying CPU chip 1 is connected to the RTC clock chip 11, and the RTC clock chip 11 is configured to provide a clock signal to the flying CPU chip 1.

The embodiment also comprises an EEPROM chip 12, wherein the Feiteng CPU chip 1 is connected with the EEPROM chip 12, and the EEPROM chip 12 is used for storing the parameter configuration and the network address of the Feiteng CPU chip 1.

In this embodiment, the FPGA chip 2 is provided with a second JTAG interface 9, and the designer may directly configure the FPGA chip 2 through the second JTAG interface 9, where the second JTAG interface 9 serves as a spare interface of the first JTAG interface 8.

The embodiment also comprises a power conversion chip set which is connected with a power supply to supply power to the Feiteng CPU chip 1, the FPGA chip 2 and the bridge chip 5.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present utility model. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the utility model. Thus, the present utility model is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A mass storage motherboard based on a fly-by platform, comprising: a Feiteng CPU chip (1), an FPGA chip (2), a PROM chip (3) and at least one memory storage chip (4);

the Feiteng CPU chip (1) is connected with the FPGA chip (2) through a PCIE bus, the FPGA chip (2) is connected with the PROM chip (3), the PROM chip (3) is provided with a first JTAG interface (8), and the PROM chip (3) is used for defining at least one I/O pin of the FPGA chip (2) as a memory bus; the FPGA chip (2) is connected with the memory storage chip (4) through an I/O pin defined as a memory bus, and the memory storage chip (4) is used for expanding the storage capacity of the main board.

2. A flying platform based mass storage motherboard as recited in claim 1, further comprising: the device comprises a bridge chip (5), a functional interface group (6) and an interface configuration chip (7);

the Feiteng CPU chip (1) is connected with the bridge chip (5) through a PCIE bus, the bridge chip (5) is connected with the interface configuration chip (7) through the functional interface group (6), and the functional interface group (6) is provided with a plurality of functional interfaces.

3. A flying platform based mass storage motherboard as recited in claim 1 or 2, further comprising: a DDR4 connector (10);

the Feiteng CPU chip (1) is connected with the DDR4 connector (10) through a memory bus; the Feiteng CPU chip (1) is connected with the memory through the memory bus and the DDR4 connector to expand the memory.

4. A flying platform based mass storage motherboard as recited in claim 1 or 2, further comprising: an RTC clock chip (11);

the Feiteng CPU chip (1) is connected with the RTC clock chip (11), and the RTC clock chip (11) is used for providing clock signals for the Feiteng CPU chip (1).

5. A flying platform based mass storage motherboard as recited in claim 1 or 2, further comprising: an EEPROM chip (12);

the Feiteng CPU chip (1) is connected with the EEPROM chip (12), and the EEPROM chip (12) is used for storing the parameter configuration and the network address of the Feiteng CPU chip (1).

6. The mass storage motherboard based on the Feiteng platform according to claim 1 or 2, characterized in that the FPGA chip (2) is provided with a second JTAG interface (9).

7. The mass storage motherboard based on a flying platform as claimed in claim 1 or 2, further comprising a power conversion chipset (13), wherein the power conversion chipset (13) is respectively connected to the flying CPU chip (1), the FPGA chip (2) and the bridge chip (5), and the power conversion chipset (13) is connected to the power supply to supply power to the flying CPU chip (1), the FPGA chip (2) and the bridge chip (5).

8. The mass storage motherboard based on the Feiteng platform according to claim 1 or 2, wherein the FPGA chip (2) is connected to the memory storage chip (4) in a daisy-chain manner.

9. The mass storage motherboard based on the Feiteng platform according to claim 1 or 2, wherein the Feiteng CPU chip (1) is a Feiteng D2000 series CPU chip; the FPGA chip (2) adopts a complex denier microelectronic JF7K325T type FPGA chip; the memory storage chip (4) adopts a long Xin CXDQ3A8AM-WG memory storage chip; the bridge chip (5) adopts a megacore ZX-200 type bridge chip.