CN218995400U - Signal acquisition circuit - Google Patents

Abstract

The application discloses signal acquisition circuit includes: the buffer isolation circuit is used for obtaining a first analog signal output by a testing system of the coagulation analyzer; the photoelectric amplifying circuit is used for obtaining a light source signal, converting the light source signal into an analog signal and amplifying the analog signal to obtain a second analog signal; the analog-to-digital conversion circuit is respectively connected with the buffer isolation circuit and the photoelectric amplification circuit, receives the first analog signal and the second analog signal, converts the first analog signal into a first digital signal, and converts the second analog signal into a second digital signal; the voltage reference circuit is connected with the analog-to-digital conversion circuit and used for converting the voltage into a reference voltage and providing the reference voltage for the analog-to-digital conversion circuit; and the microcontroller is connected with the analog-to-digital conversion circuit and used for reading the first digital signal and/or the second digital signal and outputting the first digital signal and/or the second digital signal.

Description

Signal acquisition circuit

Technical Field

The application relates to the field of signal acquisition, in particular to a signal acquisition circuit.

Background

The signal acquisition circuit board is the core of the test system in the coagulation analyzer. At present, when a testing system in the coagulation analyzer is used for data acquisition, an analog signal converted by an optical signal is directly connected to a microcontroller MCU serial port, and the data acquisition precision is low without intermediate processing.

Disclosure of Invention

In view of this, the present application provides a signal acquisition circuit, which has the following specific scheme:

a signal acquisition circuit comprising:

the buffer isolation circuit is used for obtaining a first analog signal output by a testing system of the coagulation analyzer;

the photoelectric amplifying circuit is used for obtaining a light source signal, converting the light source signal into an analog signal and amplifying the analog signal to obtain a second analog signal;

the analog-to-digital conversion circuit is respectively connected with the buffer isolation circuit and the photoelectric amplification circuit, receives the first analog signal and converts the first analog signal into a first digital signal; receiving the second analog signal and converting the second analog signal into a second digital signal;

the voltage reference circuit is connected with the analog-to-digital conversion circuit and used for converting the voltage into a reference voltage and providing the reference voltage for the analog-to-digital conversion circuit;

and the microcontroller is connected with the analog-to-digital conversion circuit and used for reading the first digital signal and/or the second digital signal and outputting the first digital signal and/or the second digital signal.

Further, the method further comprises the following steps:

the power supply conversion circuit is respectively connected with the buffer isolation circuit, the photoelectric amplification circuit and the microcontroller, and is used for providing power for the buffer isolation circuit, the photoelectric amplification circuit and the microcontroller and converting input voltage into required voltage.

Further, the power conversion circuit includes:

the first conversion circuit comprises a voltage reduction chip and is used for reducing the input voltage to a first direct-current voltage through the voltage reduction chip;

the second conversion circuit comprises a boosting chip and is used for boosting the input voltage to a second direct-current voltage through the boosting chip.

Further, the method further comprises the following steps:

the light source control circuit is connected with the microcontroller and used for obtaining a control instruction output by the microcontroller and controlling an external light source and a power supply output to the signal acquisition circuit based on the control instruction.

Further, the light source control circuit includes:

the adjustable linear constant current source circuit is used for outputting stable voltage and adjustable current;

and the constant current source control circuit is connected with the microcontroller and used for controlling the flicker frequency of the external light source.

Further, the method further comprises the following steps:

and the communication circuit is respectively connected with the power supply conversion circuit, the microcontroller and the external equipment and is used for communicating with the external equipment.

Further, the buffer isolation circuit includes:

a first operational amplifier and a first capacitor,

the first capacitor is connected with a fifth pin of the first operational amplifier.

Further, the photoelectric amplifying circuit includes:

a photocell, a second operational amplifier, a first resistor, a second capacitor, a third capacitor, a fourth capacitor and a fifth capacitor,

the first pin of the second operational amplifier is respectively connected with one end of a third capacitor and one end of a first resistor, the other end of the third capacitor is connected with the other end of the first resistor through a second capacitor, and the other end of the first resistor is connected with a fourth pin of the second operational amplifier; one end of the first resistor is grounded through a second resistor to be simulated, and the other end of the first resistor is grounded through a fifth capacitor to be simulated; the second pin and the third pin of the second operational amplifier are grounded in analog, the fourth pin of the second operational amplifier is grounded in analog through a photocell, and the fifth pin of the second operational amplifier is grounded in analog through a fourth capacitor.

Further, the analog-to-digital conversion circuit includes:

the analog-to-digital conversion chip, sixth electric capacity, seventh electric capacity, eighth electric capacity, ninth electric capacity and third resistance, wherein:

the first pin of the analog-to-digital conversion chip is grounded through an eighth capacitor, the second pin of the analog-to-digital conversion chip is grounded through a sixth capacitor while being connected with a first power supply voltage, the third pin of the analog-to-digital conversion chip is connected with one end of a third resistor, the other end of the third resistor is used as an output end of the analog-to-digital conversion circuit, and one end of the third resistor is simultaneously connected with a seventh capacitor; the fourth pin of the analog-to-digital conversion chip is grounded, the fifth pin of the analog-to-digital conversion chip is grounded, and the tenth pin of the analog-to-digital conversion chip is grounded through a ninth capacitor.

Further, the voltage reference circuit includes:

voltage reference chip, tenth electric capacity and eleventh electric capacity, wherein:

the second pin of the voltage reference chip is grounded to analog ground, the third pin of the voltage reference chip is grounded to analog ground through a tenth capacitor, and the fourth pin of the voltage reference chip outputs a reference voltage and is grounded to analog ground through an eleventh capacitor.

From the above technical solution, the signal acquisition circuit disclosed in the present application includes: the buffer isolation circuit is used for obtaining a first analog signal output by a testing system of the coagulation analyzer; the photoelectric amplifying circuit is used for obtaining a light source signal, converting the light source signal into an analog signal and amplifying the analog signal to obtain a second analog signal; the analog-to-digital conversion circuit is respectively connected with the buffer isolation circuit and the photoelectric amplification circuit, receives the first analog signal and the second analog signal, converts the first analog signal into a first digital signal, and converts the second analog signal into a second digital signal; the voltage reference circuit is connected with the analog-to-digital conversion circuit and used for converting the voltage into a reference voltage and providing the reference voltage for the analog-to-digital conversion circuit; and the microcontroller is connected with the analog-to-digital conversion circuit and used for reading the first digital signal and/or the second digital signal and outputting the first digital signal and/or the second digital signal. According to the scheme, the buffer isolation circuit is used for realizing the high-resistance state of the front-stage circuit and the low-resistance state of the rear-stage circuit, so that the stability and the accuracy in the data acquisition process are ensured; the unstable data are removed through the voltage reference circuit, and the accuracy of the measured data is ensured.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of a signal acquisition circuit disclosed in an embodiment of the present application;

FIG. 2 is a circuit diagram of a buffer isolation circuit according to an embodiment of the present disclosure;

fig. 3 is a circuit diagram of a photoelectric amplifying circuit disclosed in an embodiment of the present application;

fig. 4 is a circuit diagram of an analog-to-digital conversion circuit according to an embodiment of the present disclosure;

FIG. 5 is a circuit diagram of a voltage reference circuit disclosed in an embodiment of the present application;

fig. 6 is a schematic structural diagram of a signal acquisition circuit according to an embodiment of the present disclosure;

FIG. 7 is a circuit diagram of a first conversion sub-circuit according to an embodiment of the present disclosure;

FIG. 8 is a circuit diagram of a second conversion sub-circuit disclosed in an embodiment of the present application;

FIG. 9 is a circuit diagram of a third conversion sub-circuit disclosed in an embodiment of the present application;

FIG. 10 is a circuit diagram of a fourth conversion sub-circuit disclosed in an embodiment of the present application;

FIG. 11 is a circuit diagram of a second conversion circuit according to an embodiment of the present disclosure;

FIG. 12 is a circuit diagram of a light source control circuit according to an embodiment of the present disclosure;

fig. 13 is a circuit diagram of an RS485 communication circuit according to an embodiment of the present disclosure;

fig. 14 is a circuit diagram of an ethernet switching circuit according to an embodiment of the present disclosure;

fig. 15 is a circuit diagram of an ethernet interface circuit disclosed in an embodiment of the present application;

fig. 16 is a schematic structural diagram of an information acquisition circuit according to an embodiment of the present application.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

The application discloses signal acquisition circuit, its structure schematic diagram is as shown in fig. 1, includes:

buffer isolation circuit 11, photoelectric amplification circuit 12, analog-to-digital conversion circuit 13, voltage reference circuit 14 and microcontroller 15.

The buffer isolation circuit 11 is used for obtaining a first analog signal output by a testing system of the coagulation analyzer;

the photoelectric amplifying circuit 12 is configured to obtain a light source signal, convert the light source signal into an analog signal, and amplify the analog signal to obtain a second analog signal;

the analog-to-digital conversion circuit 13 is respectively connected with the buffer isolation circuit and the photoelectric amplification circuit, receives the first analog signal and converts the first analog signal into a first digital signal; receiving a second analog signal, and converting the second analog signal into a second digital signal;

a voltage reference circuit 14 connected to the analog-to-digital conversion circuit for converting the voltage to a reference voltage, and providing the reference voltage to the analog-to-digital conversion circuit;

and the microcontroller 15 is connected with the analog-to-digital conversion circuit and used for reading the first digital signal and/or the second digital signal and outputting the first digital signal and/or the second digital signal.

In order to ensure the stability of data acquisition of a test system in a coagulation analyzer, a buffer isolation circuit, a photoelectric amplification circuit, an analog-to-digital conversion circuit, a voltage reference circuit and a microcontroller are arranged in a signal acquisition circuit board in the scheme to realize accurate data acquisition.

The buffer isolation circuit is in a high-resistance state for the front-stage circuit, in a low-resistance state for the rear-stage circuit, and has the functions of isolating and buffering the front-stage circuit and the rear-stage circuit.

The testing system in the coagulation analyzer outputs an analog signal, the analog signal is input to the signal acquisition circuit board through an interface, in the signal acquisition circuit board, the analog signal is firstly input to the buffer isolation circuit, namely the buffer isolation circuit obtains a first analog signal, the buffer isolation circuit is used for isolation and buffering to determine stability and accuracy in a data acquisition process, and then the first analog signal is input to the analog-to-digital conversion circuit.

The analog-to-digital conversion circuit obtains a first analog signal, converts the first analog signal into a first digital signal, and then outputs the first digital signal. The analog-to-digital conversion circuit may directly transmit the first digital signal to the microcontroller MCU.

In addition, the signal acquisition circuit board may further include: and the photoelectric amplifying circuit can convert the light source signal into an analog signal and amplify the analog signal to obtain a second analog signal. The amplification factor of the analog quantity signal can be adjusted through the resistance value of a specific position in the photoelectric amplifying circuit.

The analog quantity signal output by the photoelectric amplifying circuit is input to the analog-to-digital conversion circuit, the analog-to-digital conversion circuit converts the second analog signal into a second digital signal, and then the analog-to-digital conversion circuit can output the second digital signal to the micro controller MCU.

The microcontroller obtains a first digital signal and/or a second digital signal, which can read the digital signal, and can also send the digital signal to an external device so that the external device can display the digital signal.

The microcontroller controls the serial port to poll and read the data of each channel, and when the microcontroller is connected with the external device, the data of each channel can be displayed through the external device, so that whether abnormal data occur in each channel is determined.

Further, in the signal acquisition circuit disclosed in this embodiment, the signal acquisition circuit may further include: and the voltage reference circuit can convert the voltage into a reference voltage, so that the reference voltage is provided for the analog-to-digital conversion circuit, and the voltage stability in the analog-to-digital conversion circuit is ensured.

In addition, the voltage reference circuit is connected with the analog-to-digital conversion circuit, so that the instability of the light source caused by various factors can be removed through a reference channel of the voltage reference circuit and a software differential algorithm in the analog-to-digital conversion process, and the aim of ensuring the accuracy of measured data can be achieved.

Specifically, the voltage reference circuit can convert +5v voltage into reference voltage +4.096v, and convert the reference voltage +4.096v from analog quantity signal into digital quantity signal, namely convert +5v analog quantity signal into +4.096v signal in digital form, and use the +5v analog quantity signal as the reference voltage source of the analog-digital conversion chip in the analog-digital conversion circuit.

The signal acquisition circuit disclosed in the embodiment can be applied to a test system of the coagulation analyzer UP 5500.

The signal acquisition circuit disclosed in this embodiment includes: the buffer isolation circuit is used for obtaining a first analog signal output by a testing system of the coagulation analyzer; the photoelectric amplifying circuit is used for obtaining a light source signal, converting the light source signal into an analog signal and amplifying the analog signal to obtain a second analog signal; the analog-to-digital conversion circuit is respectively connected with the buffer isolation circuit and the photoelectric amplification circuit, receives the first analog signal and the second analog signal, converts the first analog signal into a first digital signal, and converts the second analog signal into a second digital signal; the voltage reference circuit is connected with the analog-to-digital conversion circuit and used for converting the voltage into a reference voltage and providing the reference voltage for the analog-to-digital conversion circuit; and the microcontroller is connected with the analog-to-digital conversion circuit and used for reading the first digital signal and/or the second digital signal and outputting the first digital signal and/or the second digital signal. According to the scheme, the buffer isolation circuit is used for realizing the high-resistance state of the front-stage circuit and the low-resistance state of the rear-stage circuit, so that the stability and the accuracy in the data acquisition process are ensured; the unstable data are removed through the voltage reference circuit, and the accuracy of the measured data is ensured.

Further, based on the above embodiment, a circuit diagram of a buffer isolation circuit in the signal acquisition circuit disclosed in this embodiment is shown in fig. 2, and includes:

the first operational amplifier U1 and the first capacitor C1.

The first capacitor C1 is connected to the fifth pin v+ of the first operational amplifier U1.

The first pin OUT of the first operational amplifier U1 is connected with the fourth pin AD OUT, the second pin V-of the first operational amplifier U1 is grounded to the analog ground AGND, the fifth pin V+ of the first operational amplifier is grounded to the analog ground AGND through the first capacitor C1, and the third pin +IN of the first operational amplifier U1 receives a first analog signal sent by the test system.

Further, as shown in fig. 3, the circuit diagram of the photoelectric amplifying circuit includes:

the photovoltaic cell DC, the second operational amplifier U2, the first resistor R1, the second resistor R2, the second capacitor C2, the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5.

The first pin OUT of the second operational amplifier U2 is respectively connected with one end of a third capacitor C3 and one end of a first resistor R1, the other end of the third capacitor C3 is connected with the other end of the first resistor R1 through a second capacitor C2, and the other end of the first resistor R1 is connected with a fourth pin-IN of the second operational amplifier U2; one end of the first short lessor 1 is grounded through a second resistor R2 and is grounded through a fifth capacitor C5; the second pin V-and the third pin +IN of the second operational amplifier U2 are connected to analog ground, the fourth pin-IN of the second operational amplifier U2 is connected to analog ground through the photocell DC, and the fifth pin V+ of the second operational amplifier U2 is connected to analog ground AGND through the fourth capacitor C4.

The photoelectric cell can convert the optical signal into a voltage signal, and the voltage signal can be amplified by a certain multiple through an operational amplifier in the photoelectric amplifying circuit.

Further, as shown in fig. 4, the circuit diagram of the analog-to-digital conversion circuit includes:

the analog-to-digital conversion chip U3, the sixth capacitor C6, the seventh capacitor C7, the eighth capacitor C8, the ninth capacitor C9 and the third resistor R3.

The first pin REF of the analog-to-digital conversion chip U3 is grounded through the eighth capacitor C8, the second pin VDD of the analog-to-digital conversion chip U3 is grounded through the sixth capacitor C6 while connected to the first power supply voltage V2.5, the third pin in+ of the analog-to-digital conversion chip U3 is connected to one end of the third resistor R3, and one end of the third resistor R3 is simultaneously connected to the seventh capacitor C7; the fourth pin IN of the analog-to-digital conversion chip U3 is grounded to the virtual ground AGND, the fifth pin of the analog-to-digital conversion chip U3 is grounded, and the tenth pin VIO of the analog-to-digital conversion chip U3 is grounded through the ninth capacitor C9.

The analog-digital conversion chip U3 can be specifically an AD7988-5, is a 16-bit successive approximation type analog-digital converter, adopts a single power supply to supply power, and has an SPI compatible serial interface, so that the signal acquisition circuit board comprising the analog-digital conversion circuit has the characteristics of high data acquisition precision, simple circuit, quick data transmission, difficult packet loss and the like.

Further, as shown in fig. 5, the circuit diagram of the voltage reference circuit includes:

the voltage reference chip U4, the tenth capacitor C10, and the eleventh capacitor C11.

The second pin GND of the voltage reference chip U4 is connected to the analog ground AGND, the third pin VIN of the voltage reference chip U4 is connected to the analog ground AGND through the tenth capacitor C10, and the fourth pin Vout of the voltage reference chip outputs the reference voltage V4.096 and is connected to the analog ground AGND through the eleventh capacitor C11; the third pin Vin of the voltage reference chip U4 is used as an input end to be connected with the analog-to-digital conversion circuit, and the fourth pin Vout of the voltage reference chip U4 is used as an output end to be connected with the analog-to-digital conversion circuit for providing reference voltage for the analog-to-digital conversion circuit.

The voltage reference chip U4 includes an analog input stage AIS and an analog-to-digital converter ADC, and the voltage reference chip U4 may be an AD364, which has a complete data acquisition system and is capable of converting an analog voltage of +5v to a reference voltage in digital form. The method has the advantages that the instability of the light source caused by various factors can be removed by combining a software differential algorithm in the analog-digital conversion process, and the measurement accuracy can be ensured.

The embodiment discloses a signal acquisition circuit, the structure schematic diagram of which is shown in fig. 6, comprising:

the circuit comprises a buffer isolation circuit 61, a photoelectric amplification circuit 62, an analog-to-digital conversion circuit 63, a voltage reference circuit 64, a microcontroller 65 and a power conversion circuit 66.

In addition to the same structure as the previous embodiment, the present embodiment also adds a power conversion circuit 66.

The power conversion circuit is respectively connected with the buffer isolation circuit, the photoelectric amplification circuit and the microcontroller, and is used for providing power for the buffer isolation circuit, the photoelectric amplification circuit and the microcontroller and converting input voltage into required voltage.

The power conversion circuit is used for providing power for each circuit module or chip. The input voltage is converted into the required voltage through the voltage boosting chip or the voltage reducing chip, so that different voltages can be provided for different circuit modules or chips.

Specifically, the power conversion circuit at least comprises a first conversion circuit and a second conversion circuit.

The first conversion circuit comprises a voltage reduction chip and is used for reducing the input voltage to a first direct-current voltage through the voltage reduction chip; the second conversion circuit includes a boost chip for boosting the input voltage to a second direct current voltage by the boost chip.

Either through the first conversion circuit or through the second conversion circuit, the input voltage is converted to the voltage value required by the corresponding module. For example: the power supply voltage required by the first circuit is +5V, the input voltage is converted into +5V voltage through the power supply conversion circuit, and the +5V voltage is input into the first circuit to serve as the power supply voltage of the first circuit; if the power supply voltage required by the second circuit is +12V voltage, the input voltage is converted into +12V voltage by the power supply conversion circuit and is input into the second circuit to be used as the power supply voltage of the second circuit.

The first conversion circuit can reduce the power supply voltage of direct current +24V to the voltage of direct current +5V, direct current +3.3V, direct current +2.5V and direct current +1.8V; the second conversion circuit can boost the +5V direct current power supply to +12V direct current voltage, and the +5V direct current power supply and the +12V direct current power supply are isolated from each other.

Specifically, as shown in fig. 7, the first converting sub-circuit for reducing the +24v dc voltage to +5v dc voltage includes: the first buck chip U5, the first light emitting diode LED1, the first diode D1, the second diode D2, the first inductor L1, the fourth resistor R4, the twelfth capacitor C12 and the thirteenth capacitor C13.

The first pin +vin of the first buck chip U5 is connected to the input +24v dc voltage through the first diode D1, the first pin +vin of the first buck chip U5 is grounded through the twelfth capacitor C12, the third pin GND and the fifth pin ON/OFF of the first buck chip U5 are grounded, the second pin OUTPUT of the first buck chip U5 is grounded through the second diode D2, and is grounded through the first inductor L1 and the thirteenth capacitor C13, the fourth pin FEEDBACK of the first buck chip U5 is grounded through the thirteenth capacitor C13 as an OUTPUT end to OUTPUT +5v voltage, and the fourth pin FEEDBACK of the first buck chip U5 is grounded through the first light emitting diode LED1 and the fourth resistor R4 connected in series.

As shown in fig. 8, a second converting sub-circuit for stepping down a +3.3v dc voltage to a +1.8v dc voltage includes: the second buck chip U6, the second light emitting diode LED2, the fifth resistor R5, the fourteenth capacitor C14, the fifteenth capacitor C15 and the sixteenth capacitor C16.

The third pin Vin of the second buck chip U6 is connected to the input dc voltage, and is grounded through the fourteenth capacitor C14, and is grounded through the second light emitting diode LED2 and the fifth resistor R5 connected in series; the first pin GND of the second buck chip U6 is grounded, and the second pin Vout of the second buck chip U6 is grounded through the fifteenth capacitor C15 and the sixteenth capacitor C16 connected in parallel, and outputs a +1.8v dc voltage as an output terminal.

As shown in fig. 9, a third converting sub-circuit for stepping down a +5.0v dc voltage to a +3.3v dc voltage includes: the third buck chip U7, the second inductor L2, the seventeenth capacitor C17, the eighteenth capacitor C18, the nineteenth capacitor C19, the twentieth capacitor C20 and the twenty first capacitor C21.

The first pin GND of the third buck chip U7 is grounded, the third pin IN of the third buck chip U7 is grounded through a seventeenth capacitor C17 and an eighteenth capacitor C18 that are connected IN parallel, meanwhile, the third pin IN of the third buck chip U7 is grounded through a second inductor L2 and a nineteenth capacitor C19 that are connected IN series, and the second pin OUT and the fourth pin OUT of the third buck chip U7 are connected and grounded through a twentieth capacitor C20 and a twenty first capacitor C21 that are connected IN parallel, and meanwhile, the third pin IN is used as an output end for outputting the converted +3.3v dc voltage.

As shown in fig. 10, a fourth conversion sub-circuit for reducing a +5v dc voltage to a +2.5v dc voltage includes: a fourth buck chip U8, a twenty-second capacitor C22, a twenty-third capacitor C23, a twenty-fourth capacitor C24, and a twenty-fifth capacitor C25.

The first pin GND of the fourth buck chip U8 is grounded, the third pin IN of the fourth buck chip U8 is grounded through a twenty-second capacitor C22 and a twenty-third capacitor C23 which are connected IN parallel, meanwhile, the third pin is connected to the input +5v dc voltage, the second pin OUT of the fourth buck chip U8 is connected to the fourth pin OUT, and is grounded through a twenty-fourth capacitor C24 and a twenty-fifth capacitor C25 which are connected IN parallel, and meanwhile, the output terminal is used for outputting the converted +2.5v dc voltage.

As shown in fig. 11, a circuit diagram of the second conversion circuit includes: boost chip U9, third inductance L3, twenty-sixth capacitance C26, twenty-seventh capacitance C27, and twenty-eighth capacitance C28.

The first pin Vin of the boost chip U9 is grounded through a twenty-sixth capacitor C26, and meanwhile, is connected to +5v dc voltage through a third inductor L3, the second pin GND of the boost chip U9 is grounded, and the fourth pin 0V of the boost chip is connected to the sixth pin +v0 through a twenty-seventh capacitor C27 and a twenty-eighth capacitor C28 that are connected in parallel, and is grounded.

The signal acquisition circuit disclosed in this embodiment includes: the buffer isolation circuit is used for obtaining a first analog signal output by a testing system of the coagulation analyzer; the photoelectric amplifying circuit is used for obtaining a light source signal, converting the light source signal into an analog signal and amplifying the analog signal to obtain a second analog signal; the analog-to-digital conversion circuit is respectively connected with the buffer isolation circuit and the photoelectric amplification circuit, receives the first analog signal and the second analog signal, converts the first analog signal into a first digital signal, and converts the second analog signal into a second digital signal; the voltage reference circuit is connected with the analog-to-digital conversion circuit and used for converting the voltage into a reference voltage and providing the reference voltage for the analog-to-digital conversion circuit; and the microcontroller is connected with the analog-to-digital conversion circuit and used for reading the first digital signal and/or the second digital signal and outputting the first digital signal and/or the second digital signal. According to the scheme, the buffer isolation circuit is used for realizing the high-resistance state of the front-stage circuit and the low-resistance state of the rear-stage circuit, so that the stability and the accuracy in the data acquisition process are ensured; the unstable data are removed through the voltage reference circuit, and the accuracy of the measured data is ensured.

Further, the signal acquisition circuit disclosed in this embodiment may further include: a light source control circuit.

The light source control circuit is connected with the microcontroller and used for obtaining a control instruction output by the microcontroller and controlling an external light source and a power supply output to the signal acquisition circuit based on the control instruction.

Specifically, the light source control circuit can control the on-off of the triode through the serial port of the microcontroller MCU so as to control the power output of the circuit, the current is constant and adjustable, and the light source control circuit can also control the externally connected multipath light sources with various wavelength types through the interface.

Namely, the light source control circuit includes: the adjustable linear constant current source circuit is used for outputting constant voltage and adjustable current, namely, the output current of the adjustable linear constant current source circuit can be adjusted in a certain range through the potentiometer; the constant current source control circuit is connected with the microcontroller, and can control the flicker frequency of the external light source through the microcontroller.

As shown in fig. 12, a circuit diagram of a light source control circuit includes: the LED lamp comprises a first constant current source driving chip U11, a second constant current source driving chip U12, a third constant current source driving chip U13, a fourth constant current source driving chip U15, a first light source interface K1, a second light source interface K2, a third light source interface K3, a fourth light source interface K4, a first triode Q1, a second triode Q2, a third triode Q3, a fourth triode Q4, a first sliding rheostat VR1, a second sliding rheostat VR2, a third sliding rheostat VR3, a fourth sliding rheostat VR4, a twenty-ninth capacitor C29, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16 and a seventeenth resistor R17.

The third pin IN of the first constant current source driving chip U11 is grounded through a twenty-ninth capacitor C29, and meanwhile, the third pin IN of the first constant current source driving chip U11, the third pin IN of the second constant current source driving chip U12, the third pin IN of the third constant current source driving chip U13 and the third pin IN of the fourth constant current source driving chip U14 are respectively communicated;

the second pin OUT of the first constant current source driving chip U11 is connected with the first pin ADJ of the first constant current source driving chip U11 through a sixth resistor R6 and a first sliding rheostat VR1 which are connected in series; the first pin of the first light source interface K1 is connected with one end of the first slide rheostat VR1 connected with the first pin ADJ of the first constant current source driving chip U11, the second pin of the first light source interface K1 is connected with the collector electrode of the first triode Q1, the emitter electrode of the first triode Q1 is grounded, the base electrode of the first triode Q1 is grounded through a seventh resistor R7, and the base electrode of the first triode Q1 is connected with an external light-emitting diode LED through an eighth resistor R8;

correspondingly, a second pin OUT of the second constant current source driving chip U12 is connected with a first pin ADJ of the second constant current source driving chip U12 through a ninth resistor R9 and a second sliding rheostat VR2 which are connected in series; the first pin of the second light source interface K2 is connected with one end of the second slide rheostat VR2 connected with the first pin ADJ of the second constant current source driving chip U12, the second pin of the second light source interface K2 is connected with the collector electrode of the second triode Q2, the emitter electrode of the second triode Q2 is grounded, the base electrode of the second triode Q2 is grounded through a tenth resistor R10, and the base electrode of the second triode Q2 is connected with an external light-emitting diode LED through an eleventh resistor R11;

the second pin OUT of the third constant current source driving chip U13 is connected with the first pin ADJ of the third constant current source driving chip U13 through a twelfth resistor R12 and a third sliding rheostat VR3 which are connected in series; the first pin of the third light source interface K3 is connected with one end of the third slide rheostat VR3 connected with the first pin ADJ of the third constant current source driving chip U13, the second pin of the third light source interface K3 is connected with the collector electrode of the third triode Q3, the emitter electrode of the third triode Q3 is grounded, the base electrode of the third triode Q3 is grounded through a thirteenth resistor R13, and the base electrode of the third triode Q3 is connected with an external light-emitting diode LED through a fourteenth resistor R14;

the second pin OUT of the fourth constant current source driving chip U14 is connected with the first pin ADJ of the fourth constant current source driving chip U14 through a fifteenth resistor R15 and a fourth sliding rheostat VR4 which are connected in series; the first pin of the fourth light source interface K4 is connected with one end of the fourth slide rheostat VR4 connected with the first pin ADJ of the fourth constant current source driving chip U14, the second pin of the fourth light source interface K4 is connected with the collector electrode of the fourth triode Q4, the emitter electrode of the fourth triode Q4 is grounded, the base electrode of the fourth triode Q4 is grounded through a sixteenth resistor R16, and the base electrode of the fourth triode Q4 is connected with an external light emitting diode LED through a seventeenth resistor R17.

As shown in fig. 12, the connection relationship of the light source interface and its internal circuit is indicated by a broken line, such as: the first pin of the first light source interface K11 is connected with one end of the first slide rheostat VR1 connected with the first pin ADJ of the first constant current source driving chip U11, the second pin of the first light source interface K1 is connected with the collector of the first triode Q1, the first pin of the first light source interface K11 is marked 405-1, the corresponding connection point connected with the first pin is marked 405-1, a connection line between two connection points is indicated, the connection line is indicated by a dotted line, the second pin of the first light source interface K11 is marked 405-2, the connection point on the collector of the first triode Q1 connected with the second pin is also marked 405-2, the connection line between the two marked same connection points is indicated by a dotted line.

Correspondingly, the second light source interface, the third light source interface and the fourth light source interface are also indicated by the same labeling mode and connecting mode, and are not described herein again.

Further, the signal acquisition circuit disclosed in this embodiment may further include: a communication circuit.

The communication circuit is respectively connected with the power supply conversion circuit, the microcontroller and the external equipment and is used for communicating with the external equipment.

The communication circuit is composed of an RS485 communication circuit and a serial port-to-Ethernet circuit and is used for communicating with an external CPU or a computer. The RS485 communication circuit is used for converting a signal sent by a UART of the microcontroller into a level of electrical characteristics of RS485 and converting a received signal into a 0-5V standard digital signal from an RS485 standard; one end of the serial port-to-Ethernet circuit is connected with a UART interface of the microcontroller, the other end of the serial port-to-Ethernet circuit is connected with an RJ network interface, and data exchange is realized through a TCP/IP protocol.

The circuit diagram of the RS485 communication circuit is shown in fig. 13, and includes: the RS485 conversion chip U15, a thirty-first capacitor C30, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-third resistor R23 and a twenty-fourth resistor R24.

The third pin DE of the RS485 conversion chip U15 is connected to the second pin RE, the fourth pin D of the RS485 conversion chip U15 is connected to +5v dc voltage through the eighteenth resistor R18, the first pin R of the RS485 conversion chip U15 is connected to +5v dc voltage through the nineteenth resistor R19, the fifth pin GND of the RS485 conversion chip U15 is grounded, the eighth pin VCC of the RS485 conversion chip U15 is connected to +5v dc voltage and is grounded through the thirty-first capacitor C30, the sixth pin a of the RS485 conversion chip U15 is connected to +5v dc voltage through the twentieth resistor R20 and is connected to other chips through the twenty-first resistor R21, the seventh pin B of the RS485 conversion chip U15 is grounded through the twenty-second resistor R22 and is connected to other chips through the twenty-third resistor R23, and in addition, the sixth pin a of the RS485 conversion chip U15 is connected to the seventh pin B through the twenty-fourth resistor R24.

As shown in fig. 14, the circuit diagram of the ethernet switching circuit includes: the Ethernet conversion chip U16, the first crystal Y1, the twenty-fifth resistor R25, the thirty-first capacitor C31, the thirty-second capacitor C32 and the thirty-third capacitor C33.

The RST1 pin of the ethernet conversion chip U16 is grounded through a thirty-first capacitor C31, the X1 pin of the ethernet conversion chip U16 is grounded through a thirty-second capacitor C32, the X1 pin of the ethernet conversion chip U16 is grounded through a first crystal Y1 and a thirty-third capacitor C33 which are connected in series, the XO pin of the ethernet conversion chip U16 is grounded through the thirty-third capacitor C33, and the RSETE pin of the ethernet conversion chip U16 is grounded through a twenty-fifth resistor R25.

Further, as shown in fig. 15, the circuit diagram of the ethernet interface circuit includes: the Ethernet interface chip U17, the fourth inductance L4, the twenty-sixth resistance R26, the twenty-seventh resistance R27, the twenty-eighth resistance R28, the twenty-ninth resistance R29, the thirty-first resistance R30, the thirty-first resistance R31, the thirty-fourth capacitance C34, the thirty-fifth capacitance C35, the thirty-sixth capacitance C36 and the thirty-seventh capacitance C37.

The TD+ pin of the Ethernet interface chip U17 is connected to the TD-pin through a twenty-sixth resistor R26 and a twenty-seventh resistor R27, meanwhile, the TD+ pin is grounded through a twenty-sixth resistor R26 and a thirty-fourth capacitor C34, the RD+ pin of the Ethernet interface chip U17 is connected with the RD-pin through a twenty-eighth resistor R28 and a twenty-ninth resistor R29, the RD+ pin is grounded through a twenty-eighth resistor R28 and a thirty-fifth capacitor C35, the TCT pin of the Ethernet interface chip U17 is communicated with the RCT pin, the SHIL ED pin of the Ethernet interface chip U17 is grounded, the LED (G) A pin of the Ethernet interface chip U17 is connected with +3.3V direct current voltage through a thirty-first resistor R30, and the LED (Y) A pin of the Ethernet interface chip U17 is connected with +3.3V direct current voltage through a thirty-first resistor R31; in addition, the +3.3v dc voltage is grounded through the fourth inductor L4 and the thirty-sixth capacitor C36 and the thirty-seventh capacitor C37 connected in parallel.

The ethernet interface circuit, the ethernet conversion circuit and the RS485 communication circuit are connected to form a communication circuit, for example, the connection line of the D pin of the RS485 conversion chip U15 in fig. 13 is labeled TXD1, then it is connected to the TXD1 pin of the ethernet conversion chip U16 in fig. 14, the connection line of the R pin in fig. 13 is labeled RXD1, then it is connected to the RXD1 pin of the ethernet conversion chip U16 in fig. 14, the connection line of the td+ pin of the ethernet interface chip U17 in fig. 15 is labeled TXP, then it is connected to the TXP pin of the ethernet conversion chip U16 in fig. 14, the connection line of the TD-pin of the ethernet interface chip U17 in fig. 15 is labeled TXN, then it is connected to the TXN pin of the ethernet conversion chip U16 in fig. 14, the connection line of the rd+ pin of the ethernet interface chip U17 in fig. 15 is labeled RXP, then it is connected to the p pin of the ethernet conversion chip U16 in fig. 14, and the connection line of the rxrd+ pin of the ethernet interface chip U17 in fig. 15 is labeled RXN of the ethernet interface chip U16 in fig. 14. In addition, the connection line of the LED (Y) K pin of the ethernet interface chip U17 in fig. 15 is marked with an ACT, and then it is connected to the ACT pin of the ethernet conversion chip U16 in fig. 14, and the connection line of the LED (G) K pin of the ethernet interface chip U17 in fig. 15 is marked with a LINK, and then it is connected to the LINK pin of the ethernet conversion chip U16 in fig. 14.

The block diagram of the information acquisition circuit disclosed in this embodiment may be as shown in fig. 16, and includes: buffer isolation circuit 161, analog-to-digital conversion circuit 162, microcontroller 163, voltage reference circuit 164, photo-amplifying circuit 165, power conversion circuit 166, light source control circuit 167 and communication circuit 168.

The number of the analog-to-digital conversion circuits can be 1 or a plurality of analog-to-digital conversion circuits.

The test system inputs analog quantity to a signal acquisition circuit board, the signal acquisition circuit board comprises a signal acquisition circuit, the analog quantity of the test system is input to a buffer isolation circuit in the signal acquisition circuit, the buffer isolation circuit plays a role in isolating and buffering front and rear-stage circuits, then the analog signal is converted into a digital signal through an analog-to-digital conversion circuit, and then the digital signal is input to a microcontroller, and the microcontroller outputs the digital signal;

the photoelectric amplifying circuit can obtain optical signals and output analog signals to the analog-to-digital conversion circuit, the analog-to-digital conversion circuit converts the optical signals into digital signals and outputs the digital signals to the microcontroller, and the microcontroller reads the digital signals and outputs the digital signals to the external equipment for display.

In the process of carrying out analog-to-digital conversion on the analog-to-digital conversion circuit, the voltage reference circuit is used for adjusting the voltage source of the analog-to-digital conversion circuit and converting +5V voltage into +4.096V reference voltage so as to eliminate instability of the light source caused by various factors and ensure the accuracy of measured data.

In addition, the power supply conversion circuit can provide power for each circuit module or chip, and converts the input voltage into the required voltage, so that the purpose of providing different voltages for different circuit modules or chips is achieved.

The light source control circuit is used for obtaining a control instruction output by the microcontroller and controlling an external light source and a power supply output to the signal acquisition circuit based on the control instruction.

The communication circuit is used for communicating with external equipment and is provided with an RS485 interface and an Ethernet interface, and a communication mode can be selected according to actual use conditions.

Therefore, the signal acquisition circuit disclosed by the embodiment achieves the effects of isolating and buffering the front-stage circuit and the rear-stage circuit in a high-resistance state and a low-resistance state of the front-stage circuit through the buffer isolation circuit, and ensures the stability and the accuracy in the data acquisition process; in addition, the AD7988-5 analog-to-digital conversion chip is adopted, and a single power supply is adopted for power supply, so that the SPI compatible serial interface is provided, and the signal acquisition circuit has the characteristics of high data acquisition precision, simple circuit, difficult packet loss in data transmission and the like; in addition, in the analog-to-digital conversion process, unstable factors are removed through a reference voltage circuit, so that the accuracy of measured data is ensured; the communication circuit is provided with an RS485 interface and an Ethernet interface, and can select a communication mode according to actual conditions.

In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A signal acquisition circuit, comprising:

the buffer isolation circuit is used for obtaining a first analog signal output by a testing system of the coagulation analyzer;

the photoelectric amplifying circuit is used for obtaining a light source signal, converting the light source signal into an analog signal and amplifying the analog signal to obtain a second analog signal;

the analog-to-digital conversion circuit is respectively connected with the buffer isolation circuit and the photoelectric amplification circuit, receives the first analog signal and converts the first analog signal into a first digital signal; receiving the second analog signal and converting the second analog signal into a second digital signal;

the voltage reference circuit is connected with the analog-to-digital conversion circuit and used for converting the voltage into a reference voltage and providing the reference voltage for the analog-to-digital conversion circuit;

and the microcontroller is connected with the analog-to-digital conversion circuit and used for reading the first digital signal and/or the second digital signal and outputting the first digital signal and/or the second digital signal.

2. The circuit of claim 1, further comprising:

the power supply conversion circuit is respectively connected with the buffer isolation circuit, the photoelectric amplification circuit and the microcontroller, and is used for providing power for the buffer isolation circuit, the photoelectric amplification circuit and the microcontroller and converting input voltage into required voltage.

3. The circuit of claim 2, wherein the power conversion circuit comprises:

the first conversion circuit comprises a voltage reduction chip and is used for reducing the input voltage to a first direct-current voltage through the voltage reduction chip;

the second conversion circuit comprises a boosting chip and is used for boosting the input voltage to a second direct-current voltage through the boosting chip.

4. The circuit of claim 1, further comprising:

the light source control circuit is connected with the microcontroller and used for obtaining a control instruction output by the microcontroller and controlling an external light source and a power supply output to the signal acquisition circuit based on the control instruction.

5. The circuit of claim 4, wherein the light source control circuit comprises:

the adjustable linear constant current source circuit is used for outputting stable voltage and adjustable current;

and the constant current source control circuit is connected with the microcontroller and used for controlling the flicker frequency of the external light source.

6. The circuit of claim 2, further comprising:

and the communication circuit is respectively connected with the power supply conversion circuit, the microcontroller and the external equipment and is used for communicating with the external equipment.

7. The circuit of claim 1, wherein the buffer isolation circuit comprises:

a first operational amplifier and a first capacitor,

the first capacitor is connected with a fifth pin of the first operational amplifier.

8. The circuit of claim 1, wherein the photo amplification circuit comprises:

a photocell, a second operational amplifier, a first resistor, a second capacitor, a third capacitor, a fourth capacitor and a fifth capacitor,

the first pin of the second operational amplifier is respectively connected with one end of a third capacitor and one end of a first resistor, the other end of the third capacitor is connected with the other end of the first resistor through a second capacitor, and the other end of the first resistor is connected with a fourth pin of the second operational amplifier; one end of the first resistor is grounded through a second resistor to be simulated, and the other end of the first resistor is grounded through a fifth capacitor to be simulated; the second pin and the third pin of the second operational amplifier are grounded in analog, the fourth pin of the second operational amplifier is grounded in analog through a photocell, and the fifth pin of the second operational amplifier is grounded in analog through a fourth capacitor.

9. The circuit of claim 1, wherein the analog-to-digital conversion circuit comprises:

the analog-to-digital conversion chip, sixth electric capacity, seventh electric capacity, eighth electric capacity, ninth electric capacity and third resistance, wherein:

the first pin of the analog-to-digital conversion chip is grounded through an eighth capacitor, the second pin of the analog-to-digital conversion chip is grounded through a sixth capacitor while being connected with a first power supply voltage, the third pin of the analog-to-digital conversion chip is connected with one end of a third resistor, the other end of the third resistor is used as an output end of the analog-to-digital conversion circuit, and one end of the third resistor is simultaneously connected with a seventh capacitor; the fourth pin of the analog-to-digital conversion chip is grounded, the fifth pin of the analog-to-digital conversion chip is grounded, and the tenth pin of the analog-to-digital conversion chip is grounded through a ninth capacitor.

10. The circuit of claim 1, wherein the voltage reference circuit comprises:

voltage reference chip, tenth electric capacity and eleventh electric capacity, wherein:

the second pin of the voltage reference chip is grounded to analog ground, the third pin of the voltage reference chip is grounded to analog ground through a tenth capacitor, and the fourth pin of the voltage reference chip outputs a reference voltage and is grounded to analog ground through an eleventh capacitor.

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