CN109688037B - M-Bus master station circuit - Google Patents
M-Bus master station circuit Download PDFInfo
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- CN109688037B CN109688037B CN201910064316.XA CN201910064316A CN109688037B CN 109688037 B CN109688037 B CN 109688037B CN 201910064316 A CN201910064316 A CN 201910064316A CN 109688037 B CN109688037 B CN 109688037B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
- H03K19/01806—Interface arrangements
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- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C19/00—Electric signal transmission systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40208—Bus networks characterized by the use of a particular bus standard
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Abstract
The invention discloses an M-Bus master station circuit, which comprises: the master station data transmission circuit is used for performing level conversion and current driving on a signal of a host transmitting end to obtain a first transmission output Vo1; the voltage signal matching circuit is used for carrying out signal matching on the first transmission output Vo1 output by the master station data transmission circuit to obtain a second transmission output Vo2; the drive compensation circuit is used for sampling the current output by the second transmission output Vo2, amplifying the current by using the operational amplifier, driving the triode to carry out current compensation on the second transmission output Vo2, and outputting the current to the +bus end on the M-Bus, wherein the other output of the drive compensation circuit is connected to the overload alarm circuit; the master station receiving circuit is used for converting signals on the M-Bus plus Bus and the Bus into signals of a master station receiving end; and the overload alarm circuit is used for outputting alarm signals when the load on the M-Bus plus Bus and the load on the M-Bus plus Bus are overlarge.
Description
Technical Field
The invention relates to the technical field of M-Bus communication, in particular to an M-Bus master station circuit.
Background
M-Bus (Meter-Bus) is a data Bus structure for realizing data exchange for Meter products such as instruments and meters. M-Bus has many applications in building and industrial energy consumption data collection. Its information transmission capacity is specially defined for its application, and it has the characteristics of using low-cost cable and can be transmitted for long distance. The reaction time of the M-Bus for each query is 0.1 to 0.5 seconds, which is completely sufficient for the task it is to accomplish. The M-Bus is also characterized in that the M-Bus can adapt to the fluctuation of the power grid voltage.
The main device of the M-Bus master station circuit in the prior art is an operational amplifier, the high level output of the push-pull output of the operational amplifier is close to the operational amplifier working voltage, the high level output of the driving supplementary circuit of the circuit is also close to the operational amplifier working voltage, the receiving circuit and the overload detection circuit use a comparator, and the common mode input voltage of the comparator is lower than the working voltage of the comparator, so when the load (slave equipment) on the M-Bus is light, the current flowing through the +bus line in the circuit is small, the voltage drop on the resistor on the +bus line is also small, and the voltage signals for the receiving circuit and the overload detection circuit are close to the operational amplifier working voltage, so that the problem occurs.
The current M-Bus master station circuit has the following general problems:
1. the problem of communication accuracy and stability under various load conditions is solved, particularly when the load (slave devices) on the M-bus is very small, the data host sent by the host receives error data, meanwhile, the slave also receives the error data, the data sent by the slave also receives the error data, and the host also receives the error data; i.e., little load (slave devices) is placed on the M-bus, this circuit presents a serious problem in that communication between the master and the slave is not possible.
2. The problem of communication line overload alarm accuracy under various load conditions is that an overload alarm circuit also operates abnormally, particularly when the load (slave) on the M-bus is small.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention aims to provide an M-Bus master station circuit, so that a master-slave machine can normally communicate and normally work no matter the load (slave machine equipment) on an M-Bus is light or heavy, and the circuit can give an alarm in time when the load is overloaded.
In order to achieve the above object, the present invention provides an M-Bus master station circuit, comprising:
the master station data transmission circuit is used for carrying out level conversion and current driving on a master station transmitting end signal MCU_TXD_MBUS to obtain a first transmission output Vo1;
the voltage signal matching circuit is used for carrying out signal matching on the first transmission output Vo1 output by the master station data transmission circuit to obtain a second transmission output Vo2;
the driving compensation circuit is used for sampling the current output by the second transmission output Vo2, amplifying the current by using an operational amplifier, driving a triode to perform current compensation on the second transmission output Vo2, and outputting the current to a +bus end on an M-Bus, and the other output B1 of the driving compensation circuit is connected to the overload alarm circuit;
the master station receiving circuit is used for converting signals on M-Bus buses plus Bus and Bus into a master station receiving end signal MCU_RXD_MBUS;
and the overload alarm circuit is used for outputting alarm signals when the load on the M-Bus and the load on the-Bus are overlarge.
Preferably, the master station data transmission circuit comprises a triode level shifter, an operational amplifier U24 and a peripheral circuit thereof, the triode level shifter comprises triodes Q19 and Q20 and a peripheral circuit thereof, a host transmitting end signal MCU_TXD_MBUS is connected to a base electrode of the triode Q19 through a resistor, a collector electrode of the triode Q19 is connected to a base electrode of the triode Q20 through a resistor, emitters of the triodes Q19 and Q20 are grounded through resistors respectively, collectors are connected to a power supply through resistors respectively, a collector electrode of the triode Q20 is connected to a non-inverting input end of the operational amplifier U24, an inverting input end of the operational amplifier U24 is grounded through a resistor, and a resistor-capacitor network is connected across an output end of the operational amplifier U24, namely between a first transmitting output Vo1 and the inverting input end.
Preferably, the voltage signal matching circuit includes a plurality of diodes D30, D31, D32, D33, D36, D37 connected in series-parallel, the first transmission output Vo1 is connected to anodes of the diodes D36, D30 and cathodes of the diodes D37, D33, the cathode of the diode D30 is connected to the anode of the diode D31, the cathode of the diode D31 is connected to the anode of the diode D32, and the cathode of the diode D32 and the anode of the diode D32 constitute the second transmission output Vo2; the cathode of the diode D36 is connected with the power supply +15V, and the anode of the diode D37 is grounded.
Preferably, the driving compensation circuit includes a sampling sub-circuit, a compensation triode Q21, an operational amplifier U25 and peripheral circuits thereof, and drives the compensation triode Q21 through a low-power consumption single-power-supply operational amplifier U25 to realize current compensation, when the load on the M-Bus is larger, the +bus line current in the M-Bus master station circuit is increased, the voltage drop at two ends of the resistor R328 is detected to be increased, two ends of the sampling resistor are connected into an inverting input end and an non-inverting input end of the operational amplifier U25, when the signal of the inverting input end of the operational amplifier U25 is larger than the signal of the non-inverting input end, the operational amplifier U25 outputs a low level, so that the driving compensation triode Q21 is driven to be turned on, and the driving compensation of the M-Bus is realized.
Preferably, when the M-Bus master station side transmits a logic high level signal mcu_txd_mbus, the emitter and collector of the triode Q19 are fully turned on, the base of the triode Q20 is pulled to a low level, so that both ends of the emitter and collector of the triode Q20 are turned off, the signal of the non-inverting input terminal of the operational amplifier U24 is larger than the signal of the inverting input terminal, the operational amplifier U24 outputs a high level close to the working voltage of the operational amplifier U24, the output Vo1 of the operational amplifier U24 is reduced by three diodes of the voltage signal matching circuit, and is driven and compensated by the driving compensation circuit to be transmitted to the +bus terminal on the M-Bus, and the M-Bus terminal is matched to generate a corresponding voltage signal, namely the pass number voltage on the M-Bus.
Preferably, when the M-Bus master station side transmits a logic low level signal mcu_txd_mbus, at this time, the emitter and collector ends of the triode Q19 of the master station data transmission circuit are turned off, the base of the triode Q20 is pulled to a high level by a pull-up resistor, so that the emitter and collector ends of the triode Q20 are turned on, the signal of the non-inverting input end of the operational amplifier U24 is not greater than the signal of the inverting input end, the low level signal is output by the operational amplifier U24, and is reduced by the three diodes of the voltage signal matching circuit 20 and is transmitted to the +bus end on the M-Bus through the driving compensation circuit, and the corresponding voltage signal is generated by the cooperation of the M-Bus end, namely, the null voltage on the M-Bus.
Preferably, the master station receiving circuit comprises a clipping circuit, a comparator U23B and a peripheral circuit thereof, wherein the +BUS end of the M-Bus Bus is connected to the non-inverting input end of the comparator U23B through a resistor R241, and is connected to the inverting input end of the comparator U23B through a cascaded Schottky diode D23 and a resistor R242, the diode D24 and the diode D25 are connected in anti-parallel to form the clipping circuit and are connected between the non-inverting input end and the inverting input end of the comparator U23B in a bridging manner, the inverting input end of the comparator U23B is grounded through a large resistor R243 and a large capacitor C103, the non-inverting input end of the comparator U23B is connected to the output end of the comparator U23B through a small capacitor C104, a power supply VCC is connected to the output end of the comparator U23B through a resistor R245 and a diode D26, and the output end of the comparator U23B is connected to the master station receiving end MCU_RXD_MBUS.
Preferably, when the M-Bus master station side is in the receiving state, the receiving signal of the M-Bus master station side should be logic high, that is, a preset voltage is provided for the M-Bus, a voltage difference is generated by a current change of the M-Bus, and the data receiving is realized by detecting the voltage change.
Preferably, when the M-Bus generates a null current, the +bus terminal on the M-Bus generates a signal lower than the supply voltage of the M-Bus, the signal outputs a high level through the master station receiving circuit, and the power supply of the M-Bus master station side pulls the signal to a voltage value matched with the signal through a pull-up resistor, so that the receiving end of the M-Bus master station side receives a logic signal "1".
Preferably, when the M-Bus generates a mark current, the +bus terminal on the M-Bus generates a signal lower than that of a space current, and the signal outputs a low level through the master station receiving circuit, that is, the output voltage signal is the reference ground of the circuit, so that the receiving end of the M-Bus master station receives a logic signal "0".
Compared with the prior art, the M-Bus master station circuit has the advantages that the master station data transmission circuit is utilized to conduct level conversion and current driving on a host machine transmitting end signal MCU_TXD_MBUS to obtain a first transmitting output Vo1, the voltage signal matching circuit is utilized to conduct signal matching on the first transmitting output Vo1 output by the master station data transmission circuit to obtain a second transmitting output Vo2, the driving compensation circuit is utilized to sample current output by the second transmitting output Vo2, the operational amplifier is utilized to amplify the current output by the second transmitting output Vo2, the operational amplifier is utilized to drive the triode to conduct current compensation on the second transmitting output Vo2 and then output the current compensation to a +bus end on an M-Bus, the master station receiving circuit is utilized to convert signals on the M-Bus +bus and the Bus to a host machine receiving end signal MCU_RXD_MBUS, and the overload alarm circuit is utilized to output alarm signals when the load on the M-Bus and the Bus is overlarge, and the master-slave can communicate and work normally when the load on the Meter-Bus is light or heavy.
Drawings
FIG. 1 is a system architecture diagram of an M-Bus master station circuit of the present invention;
FIG. 2 is a detailed circuit diagram of the master station data transmission circuit 10 according to an embodiment of the present invention;
FIG. 3 is a detailed circuit diagram of the voltage signal matching circuit 20 according to an embodiment of the present invention;
FIG. 4 is a detailed circuit diagram of the driving compensation circuit 30 according to an embodiment of the present invention;
FIG. 5 is a detailed circuit diagram of the master station receiving circuit 40 according to an embodiment of the present invention;
fig. 6 is a detailed circuit diagram of overload alarm circuit 50 in an embodiment of the present invention.
Detailed Description
Other advantages and effects of the present invention will become readily apparent to those skilled in the art from the following disclosure, when considered in light of the accompanying drawings, by describing embodiments of the present invention with specific embodiments thereof. The invention may be practiced or carried out in other embodiments and details within the scope and range of equivalents of the various features and advantages of the invention.
FIG. 1 is a system architecture diagram of an M-Bus master station circuit of the present invention. As shown in fig. 1, an M-Bus master station circuit of the present invention includes: a master station data transmission circuit 10, a voltage signal matching circuit 20, a drive compensation circuit 30, a master station reception circuit 40, and an overload alarm circuit 50.
The master station data transmitting circuit 10 is composed of a triode level shifter, an operational amplifier and peripheral circuits thereof, and is used for performing level conversion and current driving on a signal MCU_TXD_MBUS of a host transmitting end to obtain a first transmitting output Vo1; the voltage signal matching circuit 20 is composed of a plurality of diodes connected in series and parallel, and is used for performing signal matching on the first transmission output Vo1 output by the master station data transmission circuit 10 to obtain a second transmission output Vo2; the driving compensation circuit 30 is composed of a sampling sub-circuit, a compensation triode, an operational amplifier and peripheral circuits thereof, and is used for sampling the current output by the second transmission output Vo2, amplifying the current by the operational amplifier and then driving the triode to perform current compensation on the second transmission output Vo2; the master station receiving circuit 40 is composed of a limiting circuit, an operational amplifier and peripheral circuits thereof, and is used for converting signals on the M-Bus and the BUS into master station receiving end signals MCU_RXD_MBUS; the overload alarm circuit 50 is composed of a filter network, an operational amplifier and peripheral circuits thereof, and is used for outputting an alarm signal when the load on the M-Bus bus+BUS and the-BUS is overlarge.
The host transmit side signal mcu_txd_mbus (i.e., the mcu_txd_mbus is connected to the transmit side of the host) is connected to the host data transmit circuit, the first transmit output Vo1 of the output of the host data transmit circuit is connected to the voltage signal match circuit 20, the second transmit output Vo2 of the output of the voltage signal match circuit 20 is connected to the drive compensation circuit 30, the output of the drive compensation circuit 30, i.e., the M-Bus + Bus signal, is connected to the host receive circuit 40 and converted into the host receive side signal mcu_rxd_mbus (i.e., the mcu_rxd_mbus is connected to the receive side of the host), and the other output +b1 thereof is connected to the overload alarm circuit 50 and outputs an alarm signal when the load on the M-Bus + Bus, -Bus is excessive.
Fig. 2 is a detailed circuit diagram of the master station data transmission circuit 10 according to an embodiment of the present invention. The signal MCU TXD_MBUS at the transmitting end of the host is connected to the base electrode of the NPN triode Q19 through a resistor R312, the collector electrode of the NPN triode Q19 is connected to the base electrode of the NPN triode Q20 through a resistor R315, the emitters of the NPN triode Q19 and Q20 are respectively grounded through resistors R314 and R317, the collectors of the NPN triode Q19 and Q20 are respectively connected with a power supply +15V through resistors R313 and R316, and the collector electrode of the NPN triode Q20 is connected to the non-inverting input end (5 pins) of an operational amplifier U24 (OPA 564 AIDWPR); the inverting input end (6 pins) of the operational amplifier U24 (OPA 564 AIDWPR) is grounded through a resistor R323, and the resistor-capacitor networks R324 and C110 are connected across the output end of the operational amplifier U24, namely the first transmission output Vo1 (15 pins and 16 pins) and the inverting input end; capacitors C107, C108 and C109 are filter capacitors and are connected between the power supply +15V and the ground; the other resistive devices are connected to the respective circuits as required by the operational amplifier U24 (OPA 564 AIDWPR).
Fig. 3 is a detailed circuit diagram of the voltage signal matching circuit 20 according to an embodiment of the present invention. Wherein the first transmission output Vo1 of the master station data transmission circuit 10 is connected to the anodes of the diodes D36, D30 and the cathodes of the diodes D37, D33, the cathode of D30 is connected to the anode of the diode D31, the cathode of D31 is connected to the anode of the diode D32, and the cathode of the diode D32 and the anode of the diode D32 constitute the second transmission output Vo2; the cathode of the diode D36 is connected with the power +15V, and the anode of the diode D37 is grounded.
Fig. 4 is a detailed circuit diagram of the driving compensation circuit 30 according to an embodiment of the present invention. The first sampling resistor R328, the diode D34, the resistors R330, R334, the capacitor C116, the diode D35, the resistors R331, R335, and the capacitor C117 form a sampling sub-circuit, the second transmission output Vo2 of the voltage signal matching circuit 20 is connected to the +bus end of the M-Bus through the first sampling resistor R328 and the second sampling resistor R329, the anode of the diode D34 is connected to one end of the first sampling resistor R328, that is, the second transmission output Vo2, the anode of the diode D35 is connected to the other end of the first sampling resistor R328, one end of the second sampling resistor R329, and the collector of the compensation triode Q21 to form a second sampling output +b1 node, the cathode of the diode D34 is connected to the resistor R334, the resistor R333, and one end of the capacitor C116 through the resistor R331, one end of the capacitor C117 and the non-inverting input (3 pin) of the operational amplifier U25, the other ends of the resistors R334, R and C117 are connected to the inverting input pin 113 of the other end of the capacitor C25, and the inverting pin of the inverting amplifier (input pin 6, the inverting pin 6 and the inverting pin of the output pin of the capacitor C25) of the diode D34; the output end of the operational amplifier U25 is connected to the base electrode of the compensation triode Q21 through a resistor R332, a power supply +15V is connected to resistors R326 and R327 and one end of a capacitor C112 through diodes D27, D28 and D29 which are connected in series, the other end of the resistor R326 is connected to the emitter electrode of the compensation triode Q21, and the other ends of the resistor R327 and the capacitor C112 are connected to the base electrode of the compensation triode Q21; the other end of the second sampling resistor R329 is the +BUS end of the M-Bus, the filter capacitor C115 is connected between the +BUS end of the M-Bus and the ground, the cathode of the diode D38 is connected with the +BUS end of the M-Bus, and the anode of the diode D38 is connected with the-BUS end of the M-Bus; the capacitances C117 and C116 are both large capacitances, C117 being an order of magnitude greater than C116.
Fig. 5 is a detailed circuit diagram of the master station receiving circuit 40 according to an embodiment of the present invention. The +bus end of the M-Bus is connected to the non-inverting input end (3 pin) of the comparator U23B through a resistor R241, and is connected to the inverting input end (2 pin) of the comparator U23B through a cascaded Schottky diode D23 and a resistor R242, a limiting circuit formed by reversely parallel connection of a diode D24 and a diode D25 is connected across the non-inverting input end and the inverting input end of the comparator U23B, the inverting input end of the comparator U23B is grounded through a large resistor R243 and a large capacitor C103, the non-inverting input end of the comparator U23B is connected to the output end (1 pin) of the comparator U23B through a small capacitor C104, C123 is a filter capacitor, a power supply VCC (power supply of a host end) is connected to the output end of the comparator U23B through a resistor R245 and a diode D26, and the output end of the comparator U23B is connected to the host receiving end MCU RXD_MBUS.
Fig. 6 is a detailed circuit diagram of overload alarm circuit 50 in an embodiment of the present invention. The +BUS end of the M-Bus is connected to one end of a large capacitor C100 and one end of a resistor R235 through a resistor R234, the other end of the resistor R235 is connected with the non-inverting input end (5 pins) of a comparator U23A, the second sampling output +B1 is connected to one end of a large capacitor C101 and one end of a resistor R237 and the inverting input end (6 pins) of the comparator U23A through a resistor R236, and the other end of the large capacitor C100, the large capacitor C101 and one end of the resistor R237 are grounded; the small capacitor C102 is connected across the output (pin 7) and the non-inverting input of the comparator U23A, and the power supply VCC (power supply at the host) is connected to the output of the comparator U23A through the resistor R239 and the light emitting diode LED-1 and the resistor R240.
In the invention, a negative power supply (-15V) is connected with the-BUS end of the M-Bus Bus, namely the invention uses a positive and negative 15V dual power supply to supply power. It should be noted that the device values and models in fig. 2-6 are typical values and typical models, and equivalent transformation may be adopted to implement, for example, Q19 and Q20 may be completely replaced by 2 PNP transistors to implement level shift, which is not limited by the present invention.
The working principle of the present invention is described below with reference to fig. 2 to 6:
1. description of electrical parameters of specific embodiments of the invention:
according to EN1434-3 data exchange and interface and CJ/T188-2004 user Meter data Transmission technical Condition, the M-bus Master station has the following electrical characteristics:
and (3) transmitting: mark voltage: 24V-36V (CJ-T188-2004:20.8-42V),
null sign voltage: mark voltage-12V (CJ-T188-2004: mark voltage-10V);
and (3) receiving: mark current: the current of the blank is less than or equal to 1.5 mA: 11-20mA;
2. the master station side transmits:
1) The M-bus master station side transmits logic high level through TXD, the emitter (E pole) and collector (C pole) of the triode Q19 of the master station data transmission circuit 10 are completely conducted, the base (B pole) of the triode Q20 is pulled to low level, so that the emitter (E pole) and collector (C pole) of the triode Q20 are cut off, the signal of the non-inverting input end of the operational amplifier U24 (OPA 564 AIDWPR) is larger than the signal of the inverting input end, and the operational amplifier U24 (OPA 564 AIDWPR) outputs high level close to the operational amplifier working voltage (+ 15V); the signal is reduced by about 1.8V through the three diodes of the voltage signal matching circuit 20, and is transmitted to the +bus end on the M-Bus by the driving compensation circuit 30, and is matched with the M-Bus end to generate a voltage signal of +28v, namely the mark voltage on the M-Bus.
2) The M-Bus master station side transmits logic low level through TXD, the emitter (E pole) and collector (C pole) of the triode Q19 of the master station data transmission circuit 10 are cut off, the base (B pole) of the triode Q20 is pulled to high level by a pull-up resistor, so that the emitter (E pole) and collector (C pole) of the triode Q20 are conducted, the signal of the non-inverting input end of the operational amplifier U24 (OPA 564 AIDWPR) is not more than the signal of the inverting input end, and the operational amplifier U24 (OPA 564 AIDWPR) outputs low level (reference ground of an operational amplifier working power supply); the low level signal is transmitted to the +bus end on the M-Bus by the three diode warp-knitted driving compensation circuit 30 of the voltage signal matching circuit 20, and is matched with the M-Bus end to generate a voltage signal of-15V, namely the blank voltage on the M-Bus.
3. The master station side receives: when the M-Bus master station side is in a receiving state, the TXD signal of the M-Bus master station side should be logic high, namely a +28V voltage is provided for the M-Bus; because of the current change of the M-Bus, a voltage difference change is generated, and the data receiving is realized by detecting the voltage change.
1) When the M-Bus generates a null current, i.e. 1.5mA is generated on two lines of the M-Bus, the +bus end on the M-Bus generates a signal lower than the power supply voltage of the M-Bus due to the existence of a resistor on the +bus line, the signal passes through the master station receiving circuit 40, the signal of the non-inverting input end of the comparator U23B is greater than the signal of the inverting input end, the comparator U23B outputs a high level, and the power supply of the M-Bus master station side pulls the signal to a voltage value matched with the signal through a pull-up resistor, so that the receiving end of the M-Bus master station side receives a logic signal '1'.
2) When the M-Bus generates a mark current, i.e. when the two lines of the M-Bus generate 11mA current, the +bus end on the M-Bus generates a lower signal than when the space current exists due to the existence of the resistor on the +bus line, the signal passes through the master station receiving circuit 40, the signal of the non-inverting input end of the comparator U23B suddenly decreases, and the signal of the inverting input end is not greater than the signal of the inverting input end due to the energy storage effect of the device, so that the comparator U23B outputs a low level, i.e. the output voltage signal is the reference ground of the circuit, and the receiving end of the M-Bus master station receives the logic signal "0".
4. Drive compensation
The driving compensation circuit of the M-Bus is realized by driving a Darlington power transistor Q21 (TIP 127) through a low-power-consumption single-power-supply operational amplifier U25 (TLE 2021), when the load on the M-Bus is large, the +bus line current in the M-Bus main station circuit is increased, the voltage drop at two ends of the resistor is increased through resistance detection, two ends of a sampling resistor are connected into an inverting input end and a non-inverting input end of the operational amplifier U25 (TLE 2021), and when the signal of the inverting input end of the operational amplifier U25 (TLE 2021) is larger than the signal of the non-inverting input end, the operational amplifier U25 (TLE 2021) outputs a low level, so that the transistor Q21 (TIP 127) is driven, and the transistor Q21 (TIP 127) is conducted, so that the driving compensation of the M-Bus is realized.
5. Overload indication
The over-current detection on the M-Bus is carried out by sampling the current of the +bus line in the main station circuit through the resistor, then the voltage signals at two ends of the resistor are connected into the comparator U23A for judgment, when the load on the M-Bus is overloaded, the current of the +bus line in the main station circuit is very large, and when the voltage drop at two ends of the resistor, namely the signal of the inverting input end of the comparator U23A is larger than the signal of the non-inverting input end through the resistor detection, the comparator U23A outputs a low level, so that the LED indicator lamp is lightened, and the overload of the M-Bus is prompted.
Therefore, the M-Bus master station circuit obtains the first transmission output Vo1 by carrying out level conversion and current driving on the signal MCU_TXD_MBUS of the master station transmitting end by utilizing the master station data transmitting circuit, obtains the second transmission output Vo2 by carrying out signal matching on the first transmission output Vo1 output by the master station data transmitting circuit by utilizing the voltage signal matching circuit, and utilizes the driving compensation circuit to sample the current output by the second transmission output Vo2, amplifies the current by utilizing the operational amplifier and then drives the triode to carry out current compensation on the second transmission output Vo2 and then outputs the current compensation to the +bus end on the M-Bus, and utilizes the master station receiving circuit to convert the signal on the M-Bus +bus and the Bus into the signal MCU_RXD_MBUS of the master station receiving end and output an alarm signal when the load on the M-Bus is overlarge by utilizing the overload alarm circuit, so that the master and slave devices can normally communicate and work in time when the load on the Meter-Bus is light or heavy, and the master and slave devices can normally alarm in time.
The master station circuit of the M-bus can be used for meter reading, has large market capacity, is stable and reliable in communication through actual measurement under various load conditions, and is very effective to adapt to the master station circuit of the M-bus.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, the scope of the invention is to be indicated by the appended claims.
Claims (10)
1. An M-Bus master station circuit comprising:
the master station data transmission circuit is used for carrying out level conversion and current driving on a master station transmitting end signal MCU_TXD_MBUS to obtain a first transmission output Vo1;
the voltage signal matching circuit is used for performing signal matching processing on the first transmission output Vo1 output by the master station data transmission circuit to obtain a second transmission output Vo2;
the driving compensation circuit is used for sampling the current output by the second transmission output Vo2, amplifying the current by using an operational amplifier, driving a triode to perform current compensation on the second transmission output Vo2, and outputting the current to a +bus end on an M-Bus, and the other output B1 of the driving compensation circuit is connected to the overload alarm circuit;
the master station receiving circuit is used for converting signals on M-Bus buses plus Bus and Bus into a master station receiving end signal MCU_RXD_MBUS;
the overload alarm circuit is used for outputting alarm signals when the load on the M-Bus plus Bus and the load on the M-Bus minus Bus are overlarge; the +BUS end of the M-Bus is connected to one end of a large capacitor C100 and one end of a resistor R235 through a resistor R234, the other end of the resistor R235 is connected with the non-inverting input end of a comparator U23A, and the second sampling output +B1 is connected to one end of a large capacitor C101 and one end of a resistor R237 and the inverting input end of the comparator U23A through a resistor R236, and the other end of the large capacitor C100, the large capacitor C101 and one end of the resistor R237 are grounded; a small capacitor C102 is connected across the output and non-inverting input of the comparator U23A, and a power supply VCC is connected to the output of the comparator U23A through a resistor R239 and a light emitting diode LED-1, and a resistor R240.
2. The M-Bus master circuit of claim 1, wherein: the master station data transmission circuit comprises a triode level shifter, an operational amplifier U24 and a peripheral circuit thereof, wherein the triode level shifter comprises triodes Q19 and Q20 and the peripheral circuit thereof, a host transmitting end signal MCU_TXD_MBUS is connected to a base electrode of the triode Q19 through a resistor, a collector electrode of the triode Q19 is connected to a base electrode of the triode Q20 through a resistor, emitters of the triodes Q19 and Q20 are respectively grounded through resistors, collectors are respectively connected with a power supply through resistors, a collector electrode of the triode Q20 is connected to a non-inverting input end of the operational amplifier U24, an inverting input end of the operational amplifier U24 is grounded through a resistor, and a resistor-capacitor network is connected between an output end of the operational amplifier U24, namely a first transmission output Vo1 and the inverting input end.
3. An M-Bus master circuit as defined in claim 2, wherein: the voltage signal matching circuit comprises a plurality of diodes D30, D31, D32, D33, D36 and D37 which are connected in series and parallel, the first transmission output Vo1 is connected to the anodes of the diodes D36 and D30 and the cathodes of the diodes D37 and D33, the cathode of the diode D30 is connected to the anode of the diode D31, the cathode of the diode D31 is connected to the anode of the diode D32, and the cathode of the diode D32 and the anode of the diode D32 form the second transmission output Vo2; the cathode of the diode D36 is connected with the power supply +15V, and the anode of the diode D37 is grounded.
4. A M-Bus master circuit as claimed in claim 3, wherein: the driving compensation circuit comprises a sampling sub-circuit, a compensation triode Q21, an operational amplifier U25 and a peripheral circuit thereof, wherein the low-power consumption single-power-supply operational amplifier U25 drives the compensation triode Q21 to realize current compensation, when the load on an M-Bus is large, the current of a +bus line in the M-Bus master station circuit is increased, through resistance detection, the voltage drop at two ends of a resistor R328 is increased, two ends of the sampling resistor R328 are connected into an inverting input end and a non-inverting input end of the operational amplifier U25, when the signal of the inverting input end of the operational amplifier U25 is larger than the signal of the non-inverting input end, the operational amplifier U25 outputs a low level, so that the driving compensation triode Q21 is driven to be conducted, and the driving compensation of the M-Bus is realized.
5. The M-Bus master circuit of claim 4, wherein: when the M-Bus master station side sends a logic high-level signal MCU_TXD_MBUS, the emitter and the collector of the triode Q19 are fully conducted, the base of the triode Q20 is pulled to a low level, so that the two ends of the emitter and the collector of the triode Q20 are cut off, the signal of the non-inverting input end of the operational amplifier U24 is larger than the signal of the inverting input end, the operational amplifier U24 outputs a high level close to the working voltage of the operational amplifier U24, the output Vo1 of the operational amplifier U24 is reduced by the three diodes of the voltage signal matching circuit, and the driving compensation circuit drives and compensates the +bus end on the M-Bus, and the M-Bus end is matched to generate a corresponding voltage signal, namely the mark-up voltage on the M-Bus.
6. The M-Bus master circuit of claim 5, wherein: when the M-Bus master station side transmits a logic low level signal MCU_TXD_MBUS, at the moment, the two ends of the emitter and the collector of a triode Q19 of the master station data transmission circuit are cut off, the base electrode of the triode Q20 is pulled to a high level by a pull-up resistor, so that the two ends of the emitter and the collector of the triode Q20 are conducted, the signal of the non-inverting input end of an operational amplifier U24 is not larger than the signal of the inverting input end, the operational amplifier U24 outputs a low level, the low level signal is reduced by three diodes of the voltage signal matching circuit and is transmitted to the +bus end on the M-Bus through the driving compensation circuit, and the M-Bus end is matched to generate a corresponding voltage signal, namely the blank voltage on the M-Bus.
7. The M-Bus master circuit of claim 4, wherein: the master station receiving circuit comprises a limiting circuit, a comparator U23B and a peripheral circuit thereof, wherein the +BUS end of the M-Bus is connected to the non-inverting input end of the comparator U23B through a resistor R241, and is connected to the inverting input end of the comparator U23B through a Schottky diode D23 and a resistor R242 which are connected in cascade, the diode D24 and the D25 are connected in parallel in an anti-phase manner to form the limiting circuit, the limiting circuit is connected between the non-inverting input end and the inverting input end of the comparator U23B in a bridging manner, the inverting input end of the comparator U23B is grounded through a large resistor R243 and a large capacitor C103, the non-inverting input end of the comparator U23B is connected to the output end of the comparator U23B through a small capacitor C104, a power supply VCC is connected to the output end of the comparator U23B through a resistor R245 and a diode D26, and the output end of the comparator U23B is connected to the master station receiving end MCU RXD_MBUS.
8. The M-Bus master circuit of claim 7, wherein: when the M-Bus master station side is in a receiving state, a receiving signal of the M-Bus master station side is logic high, namely a preset voltage is provided for the M-Bus, the current change of the M-Bus generates a voltage difference change, and data receiving is realized by detecting the voltage change.
9. The M-Bus master circuit of claim 8, wherein: when the M-Bus generates a null current, a +bus end on the M-Bus generates a signal lower than the power supply voltage of the M-Bus, the signal outputs high level through the master station receiving circuit, and the power supply of the M-Bus master station side pulls the signal to a voltage value matched with the signal through a pull-up resistor, so that the receiving end of the M-Bus master station side receives a logic signal '1'.
10. The M-Bus master circuit of claim 9, wherein: when the M-Bus generates a mark current, the +bus end on the M-Bus generates a signal lower than that of a space current, and the signal outputs a low level through the master station receiving circuit, namely the output voltage signal is the reference ground of the circuit, so that the receiving end of the M-Bus master station receives a logic signal '0'.
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