CN218975459U

CN218975459U - Back contact battery and photovoltaic module

Info

Publication number: CN218975459U
Application number: CN202222209385.5U
Authority: CN
Inventors: 张小帅; 张云海; 鲁伟明; 李华
Original assignee: Taizhou Longi Solar Technology Co Ltd
Current assignee: Taizhou Longi Solar Technology Co Ltd
Priority date: 2022-08-22
Filing date: 2022-08-22
Publication date: 2023-05-05
Anticipated expiration: 2032-08-22

Abstract

The utility model discloses a back contact battery and a photovoltaic module, and relates to the technical field of solar cells. So as to prevent the formation of an edge PN junction, inhibit the generation of electric leakage between one of the first doped semiconductor layer and the second doped semiconductor layer and the side surface of the semiconductor substrate, and improve the electrical performance of the back contact battery. The back contact battery includes: the semiconductor device includes a semiconductor substrate, a first doped semiconductor layer, and a second doped semiconductor layer. The semiconductor substrate has opposite first and second sides. The second face has a middle region and an edge isolation region extending outwardly from the middle region. The intermediate region is divided into first and second regions alternately arranged along a direction parallel to the second face. The surface of the edge isolation region is recessed inwardly relative to the surface of the first region. A first doped semiconductor layer is formed on the first region. The second doped semiconductor layer is formed in or on the second region. The second doped semiconductor layer is of opposite conductivity type to the first doped semiconductor layer.

Description

Back contact battery and photovoltaic module

Technical Field

The utility model relates to the technical field of solar cells, in particular to a back contact cell and a photovoltaic module.

Background

The back contact cell refers to a solar cell in which the emitter and the metal contact are both on the back of the cell and the front is not shielded by the metal electrode. Compared with a solar cell with a shielding front surface, the back contact cell has higher short-circuit current and photoelectric conversion efficiency, and is one of the technical directions for realizing the high-efficiency crystalline silicon cell at present.

However, after the conventional back contact battery is manufactured, the back contact battery generally has an edge PN junction, which is liable to cause leakage, resulting in a reduction in electrical performance of the back contact battery.

Disclosure of Invention

The utility model aims to provide a back contact battery and a photovoltaic module, which are used for preventing an edge PN junction from being formed, inhibiting electric leakage between one of a first doped semiconductor layer and a second doped semiconductor layer and the side surface of a semiconductor substrate, and improving the electrical property of the back contact battery.

In a first aspect, the present utility model provides a back contact battery comprising: the semiconductor device includes a semiconductor substrate, a first doped semiconductor layer, and a second doped semiconductor layer.

The semiconductor substrate has opposite first and second sides. The second face has a middle region and an edge isolation region extending outwardly from the middle region. The intermediate region is divided into first and second regions alternately arranged along a direction parallel to the second face. The surface of the edge isolation region is recessed inwardly relative to the surface of the first region. The first doped semiconductor layer is formed on the first region. The second doped semiconductor layer is formed in or on the second region. The second doped semiconductor layer is of opposite conductivity type to the first doped semiconductor layer.

With the above technical solution, in the process of forming the first doped semiconductor layer on the first region on the second surface of the semiconductor substrate and forming the second doped semiconductor layer in the second region (or on the second region), the doping element of one of the first doped semiconductor layer and the second doped semiconductor layer is doped to the side surface of the semiconductor substrate due to the plating around, so that the side surface of the semiconductor substrate is formed to form a heavily doped layer of the corresponding conductivity type. In the above case, since the first doped semiconductor layer and the second doped semiconductor layer are opposite in conductivity type, the other of the first doped semiconductor layer and the second doped semiconductor layer is opposite in conductivity type to the heavily doped layer formed on the side of the semiconductor substrate. Based on this, when the surface of the edge isolation region is recessed inward relative to the surface of the first region, the edge isolation region can isolate the other of the first doped semiconductor layer and the second doped semiconductor layer from the heavily doped layer formed on the side surface of the semiconductor substrate, so that an edge PN junction is prevented from being formed between the other of the first doped semiconductor layer and the second doped semiconductor layer and the heavily doped layer, and further, leakage generated between the other of the first doped semiconductor layer and the second doped semiconductor layer and the side surface of the semiconductor substrate is inhibited, the photoelectric conversion efficiency of the back contact battery is improved, and the electrical performance of the back contact battery is improved.

In addition, when the second doped semiconductor layer is formed on the second region, the surface of the edge isolation region is recessed inwards relative to the surface of the first region, so that the problem that in the prior art, in the process of patterning the second doped semiconductor material layer for forming the second doped semiconductor layer by adopting a single-sided wet chemical treatment mode, part of the second doped semiconductor material layer remains on the part of the first doped semiconductor layer, which is close to the edge region, due to the fact that water in the sprayed water film flows to the edge region of the second surface along the side surface of the semiconductor substrate, and edge PN junction leakage occurs can be solved, the photoelectric conversion efficiency of the back contact battery is improved, and the electrical performance of the back contact battery is improved.

In one possible implementation, in the case where the second doped semiconductor layer is formed in the second region, the second doped semiconductor layer is of the same conductivity type as the semiconductor substrate.

Under the above technical scheme, in an actual manufacturing process, a doping process such as plasma implantation, diffusion or doping source coating is generally adopted to dope doping elements in the corresponding doping source into the second region, so as to form a second doped semiconductor layer with a certain doping concentration in the second region. Based on the above, under the condition that the doping concentration of the second doped semiconductor layer is certain, compared with the conductivity type of the second doped semiconductor layer which is different from the conductivity type of the semiconductor substrate, when the conductivity type of the second doped semiconductor layer is the same as that of the semiconductor substrate, the second doped semiconductor layer can be obtained by directly doping elements of corresponding types into the second region with the same conductivity type through the doping process, and the second doped semiconductor layer with opposite conductivity type is not required to be formed after the part of the semiconductor substrate positioned in the second region is compensated, so that the doping concentration and the doping difficulty of the conductive particles of corresponding types can be reduced, and the back contact battery provided by the utility model is beneficial to be obtained.

In one possible implementation, the surface of the edge isolation region is recessed from 0.5 μm to 8 μm inward relative to the surface of the first region. In this case, the depth of the surface of the edge isolation region recessed inward relative to the surface of the first region is moderate, so that the other of the first doped semiconductor layer and the second doped semiconductor layer can be isolated from the heavily doped layer by the edge isolation region, and the excessive thinning of the portion of the semiconductor substrate located in the edge isolation region due to the large depth of the surface of the edge isolation region recessed inward relative to the surface of the first region can be prevented, the risk of hidden cracking of the thinned semiconductor substrate is reduced, the probability of light being absorbed after entering the portion of the semiconductor substrate corresponding to the edge isolation region can be increased, and the photoelectric conversion efficiency of the back contact battery is further improved.

In one possible implementation, the surface of the second region is concave relative to the surface of the first region.

Under the condition that the second doped semiconductor layer is formed in the second region, when the surface of the second region is concave inwards relative to the surface of the first region, the first doped semiconductor layer can be staggered with at least part of the second doped semiconductor layer, so that electric leakage between the first doped semiconductor layer and the second doped semiconductor layer with opposite conductivity types can be prevented. Under the condition that the second doped semiconductor layer is formed in the second region, conductive particles possibly diffuse into the part, close to the first doped semiconductor layer, of the first region when the conductive particles are doped into the first doped semiconductor layer, so that when the surface of the second region is concave inwards relative to the surface of the first region, the second doped semiconductor layer can be staggered with the first doped semiconductor layer and the part, close to the first doped semiconductor layer, of the first region respectively, so that electric leakage is prevented from being generated between the second doped semiconductor layer and the parts, close to the first doped semiconductor layer, of the first region respectively, and the photoelectric conversion efficiency of the back contact battery is further improved.

In one possible implementation, the surface of the second region is recessed from 0.5 μm to 8 μm inward relative to the surface of the first region. In this case, the depth of the surface of the second region recessed inward relative to the surface of the first region is moderate, so that the second doped semiconductor layer and the portion of the first region close to the first doped semiconductor layer can be staggered, and the excessive thinning of the portion of the semiconductor substrate located in the second region due to the large depth of the surface of the second region recessed inward relative to the surface of the first region can be prevented, the risk of occurrence of hidden cracks after the thinning of the semiconductor substrate is reduced, the probability of absorption of light after entering the portion of the semiconductor substrate corresponding to the second region can be increased, and the photoelectric conversion efficiency of the back contact battery can be further improved.

In one possible implementation, the surface of the edge isolation region is flush with the surface of the second region. In this case, the portions of the semiconductor substrate located in the edge isolation region and the second region may be simultaneously processed in the same operation step so that the surfaces of both regions may be recessed inward to improve the back contact cell manufacturing efficiency. And under the condition that the surface of the edge isolation region is flush with the surface of the second region, the surface of the junction between the edge isolation region and the second region is relatively flat, so that the compactness of the surface passivation layer at the junction between the edge isolation region and the second region can be at least improved, the passivation effect of the surface passivation layer on the junction can be at least improved, and the photoelectric conversion efficiency of the back contact battery is further improved.

In one possible implementation, the width of the edge isolation region is 0.1mm to 0.5mm. Under the condition, the width of the edge isolation region is moderate, so that the situation that the edge PN junction is difficult to prevent from leaking due to the fact that the width of the edge isolation region is small can be prevented, the range of the first region and the second region is small due to the fact that the width of the edge isolation region is large can be prevented, further, the fact that the first doped semiconductor layer formed on the first region and the second doped semiconductor layer formed in the second region or on the second region have a large forming range is guaranteed, electrons and holes generated in each region of the semiconductor substrate are conducted out in time by the first doped semiconductor layer and the second doped semiconductor layer, the carrier recombination rate is reduced, and the photoelectric conversion efficiency of the back contact battery is further improved.

In one possible implementation, the back contact battery further includes a first tunneling passivation layer formed between the first doped semiconductor layer and the semiconductor substrate.

Under the condition of adopting the technical scheme, the first doped semiconductor layer and the first tunneling passivation layer can form a tunneling passivation contact structure. The first tunneling passivation layer in the tunneling passivation contact structure allows majority carriers to tunnel into the first doped semiconductor layer and simultaneously blocks minority carriers from passing through, so that the majority carriers are transmitted through the first doped semiconductor layer and collected by the corresponding electrode, the recombination rate of carriers of different conductivity types at the surface of the first region is reduced, excellent interface passivation and selective collection of the carriers are realized, and the photoelectric conversion efficiency of the back contact battery is further improved.

In one possible implementation, in case the second doped semiconductor layer is formed on the second region, the back contact cell further comprises a second tunneling passivation layer formed at least between the second doped semiconductor layer and the semiconductor substrate. The beneficial effects of the back contact battery in this case may be referred to the foregoing beneficial effect analysis that the back contact battery further includes the first tunneling passivation layer, and will not be described herein.

In one possible implementation, the back contact battery further includes a surface passivation layer overlying the edge isolation region, the first doped semiconductor layer, and the second doped semiconductor layer.

Under the condition of adopting the technical scheme, the surface passivation layer can passivate one side of the edge isolation region, the first doped semiconductor layer and the second doped semiconductor layer, which is far away from the semiconductor substrate, so that the carrier recombination rate of one side of the edge isolation region, the first doped semiconductor layer and the second doped semiconductor layer, which is far away from the semiconductor substrate, is reduced, and the photoelectric conversion efficiency of the back contact battery is further improved. In addition, because the dielectric constant of air is smaller than that of the surface passivation layer, when the surface passivation layer also covers the edge isolation region, the insulation effect between the other one of the first doped semiconductor layer and the second doped semiconductor layer and the semiconductor substrate is better, and the edge PN junction leakage is prevented.

In one possible implementation, the first surface is a regular pyramid-shaped surface or an inverted pyramid-shaped surface.

Under the condition of adopting the technical scheme, as the suede structure has the light trapping effect, the first surface of which is the surface of the regular pyramid suede or the inverted pyramid suede can refract more light into the semiconductor substrate, so that the photoelectric conversion efficiency of the back contact battery can be further improved.

In one possible implementation manner, the surfaces of the second area and the edge isolation area are polished surfaces, regular pyramid-shaped texture surfaces or inverted pyramid-shaped texture surfaces.

Under the condition of adopting the technical scheme, the second surface of the semiconductor substrate corresponds to the backlight surface of the back contact battery, and the polished surface has relatively good reflection characteristics, so that under the condition that the surfaces of the second region and the edge isolation region are polished surfaces, light rays can be at least partially reflected back into the semiconductor substrate after reaching the surfaces of the second region and the edge isolation region and are reused by the semiconductor substrate, and the photoelectric conversion efficiency of the back contact battery is further improved. When the surfaces of the second area and the edge isolation area are the regular pyramid suede or the inverted pyramid suede, more light can be refracted into the semiconductor substrate from the backlight surface of the back contact battery, and the photoelectric conversion efficiency of the back contact battery can be further improved. Therefore, the surface morphology of the second region and the edge isolation region in the back contact battery provided by the utility model has various alternatives, and the applicability of the back contact battery provided by the utility model in different application scenes can be improved.

In one possible implementation, the intermediate region further has an intermediate isolation region between each first region and an adjacent second region.

Under the condition of adopting the technical scheme, the first doped semiconductor layer formed on the first area and the second doped semiconductor layer formed in or on the second area are opposite in conductivity type, so that the adjacent first doped semiconductor layer and second doped semiconductor layer can be laterally separated by the middle isolation area under the condition that the second surface is provided with the middle isolation area between each first area and each second area, and the recombination of carriers with different conductivity types at the lateral interface of the first doped semiconductor layer and the second doped semiconductor layer is restrained, so that the generation of electric leakage at the lateral interface of the first doped semiconductor layer and the second doped semiconductor layer is prevented, and the photoelectric conversion efficiency of the back contact battery is further improved.

In one possible implementation, the surface of the middle isolation region is concave inward relative to the surface of the first region. In this case, the first doped semiconductor layer and the second doped semiconductor layer opposite in conductivity type can be further isolated by physical insulation such as an air gap or a surface passivation layer at the inward recessed portion of the middle isolation region, further suppressing recombination of carriers different in conductivity type at the lateral interface of the first doped semiconductor layer and the second doped semiconductor layer.

In one possible implementation, in a case where the second doped semiconductor layer is formed in the second region, the back contact battery further includes: and a first electrode formed on the second doped semiconductor layer. The material of the first electrode includes a doping element doped in the second doped semiconductor layer.

Under the condition of adopting the technical scheme, because the material of the first electrode comprises the doping element doped in the second doping semiconductor layer, the second doping semiconductor layer can be formed only in a certain range where the second area contacts with the first electrode by taking the first electrode as a doping source in the actual manufacturing process of the back contact battery provided by the utility model, and the second doping semiconductor layer is prevented from being contacted with the first doping semiconductor layer to cause electric leakage. Meanwhile, the process of forming a mask layer for forming the second doped semiconductor layer only in the second region can be saved, and the manufacturing process of the back contact battery can be simplified.

In a second aspect, the present utility model also provides a photovoltaic module comprising the back contact cell provided by the first aspect and various implementations thereof.

The advantages of the second aspect and various implementations of the present utility model may be referred to for analysis of the advantages of the first aspect and various implementations of the first aspect, and will not be described here again.

Drawings

The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description serve to explain the utility model and do not constitute a limitation on the utility model. In the drawings:

FIG. 1 is a schematic longitudinal cross-sectional view of a first structure of a semiconductor substrate according to an embodiment of the present utility model;

FIG. 2 is a schematic longitudinal cross-sectional view of a second structure of a semiconductor substrate according to an embodiment of the present utility model;

FIG. 3 is a schematic top view of a second surface of a semiconductor substrate according to an embodiment of the present utility model;

fig. 4 is a schematic longitudinal sectional view of a first structure of a back contact battery according to an embodiment of the present utility model;

fig. 5 is a schematic longitudinal sectional view of a second structure of a back contact battery according to an embodiment of the present utility model;

fig. 6 is a schematic longitudinal sectional view of a third structure of a back contact battery according to an embodiment of the present utility model;

fig. 7 is a schematic longitudinal sectional view of a first structure of a back contact battery according to an embodiment of the present utility model.

Reference numerals:

1 is a semiconductor substrate, 2 is a first surface, 3 is a second surface, 4 is a middle region, 5 is an edge isolation region, 6 is a first region, 7 is a second region, 8 is a middle isolation region, 9 is a first doped semiconductor layer, 10 is a second doped semiconductor layer, 11 is a first tunneling passivation layer, 12 is a second tunneling passivation layer, 13 is a surface passivation layer, 14 is a passivation anti-reflection layer, 15 is a first electrode, and 16 is a second electrode.

Detailed Description

In order to make the technical problems, technical schemes and beneficial effects to be solved more clear, the utility model is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.

It will be understood that when an element is referred to as being "mounted" or "disposed" on another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise. The meaning of "a number" is one or more than one unless specifically defined otherwise.

In the description of the present utility model, it should be understood that the directions or positional relationships indicated by the terms "upper", "lower", "front", "rear", "left", "right", etc., are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present utility model.

In the description of the present utility model, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.

Currently, solar cells are increasingly used as new energy alternatives. Among them, a photovoltaic solar cell is a device that converts solar light energy into electric energy. Specifically, the solar cell generates carriers by utilizing the photovoltaic principle, and then the carriers are led out by using the electrodes, so that the electric energy can be effectively utilized.

When the positive electrode and the negative electrode of the solar cell are positioned on the back surface of the solar cell, the solar cell is a back contact cell. Existing back contact cells include metal wrap through (metal wrap through, abbreviated MWT) cells, interdigitated back contact (Interdigitated back contact, abbreviated IBC) cells, and the like. The IBC battery has the greatest characteristics that the emitter and the metal contact are positioned on the back surface of the battery, and the front surface is free from the influence of shielding of the metal electrode, so that the IBC battery has higher short-circuit current Isc. Meanwhile, the back side of the IBC cell may allow a wider metal gate line to reduce the series resistance Rs, so that the fill factor FF may be increased. In addition, the battery with the front surface free of shielding is high in conversion efficiency and attractive in appearance. Meanwhile, the assembly of the all back electrode is easier to assemble, so that the IBC battery is one of the technical directions for realizing the efficient crystalline silicon battery at present.

Specifically, the IBC cell generally includes a semiconductor substrate, a first doped semiconductor layer, and a second doped semiconductor layer. Wherein the first doped semiconductor layer and the second doped semiconductor layer are alternately formed on the same side of the semiconductor substrate along a direction parallel to the surface of the semiconductor substrate. And, the second doped semiconductor layer and the first doped semiconductor layer are opposite in conductivity type. The process of forming the P-type semiconductor layer and the N-type semiconductor layer will be described below by taking the example of forming the P-type semiconductor layer first: and covering a layer of P-type semiconductor material for manufacturing the P-type semiconductor layer on the back surface of the semiconductor substrate. And patterning the P-type semiconductor material, wherein only the part of the P-type semiconductor material located on the corresponding region of the back surface of the semiconductor substrate (such as the part of the P-type semiconductor material located on the first region) is reserved, so as to obtain the P-type semiconductor layer. Then, a layer of N-type semiconductor material is formed to cover the P-type semiconductor layer and the back surface of the semiconductor substrate, and patterning treatment is carried out on the N-type semiconductor material, wherein only the part of the N-type semiconductor material located on the corresponding area of the back surface of the semiconductor substrate (such as the part of the N-type semiconductor material located on the second area) is reserved, so that the N-type semiconductor layer is obtained.

In the actual manufacturing process, the N-type semiconductor material is usually subjected to patterning treatment by wet chemical treatment. In addition, because the etching selection between the N-type semiconductor material and the main body material of the semiconductor substrate is relatively low, the front surface of the semiconductor substrate is covered with a water film in the patterning process, so that the front surface of the semiconductor substrate is prevented from being influenced by the patterning process. However, water may flow along the sidewalls of the semiconductor substrate to the edge of the back surface of the semiconductor substrate during the spraying of the water film on the front surface of the semiconductor substrate, so that the portion of the solution performing the patterning process at the edge isolation region of the back surface of the semiconductor substrate is diluted while the portion of the solution at the middle region of the back surface of the semiconductor substrate is unaffected. Based on the above, the etching rate of the N-type semiconductor material by the portion of the solution located in the middle region of the back surface of the semiconductor substrate for performing the patterning process is greater than the etching rate of the N-type semiconductor material by the portion of the solution located in the edge isolation region of the back surface of the semiconductor substrate, so that after the portion of the N-type semiconductor material located in the corresponding region of the back surface of the semiconductor substrate is completely removed, the N-type semiconductor material remains in the edge isolation region of the back surface of the semiconductor substrate, resulting in easy leakage due to formation of the edge PN junction, and reduced electrical performance of the back contact cell.

As shown in fig. 4 to 7, an embodiment of the present utility model provides a back contact battery including: a semiconductor substrate 1, a first doped semiconductor layer 9 and a second doped semiconductor layer 10. As shown in fig. 4 to 7, the semiconductor substrate 1 has a first surface 2 and a second surface 3 opposite to each other. The second face 3 has a central region 4, and an edge isolation region 5 extending outwardly from the central region 4. The intermediate region 4 is divided into first regions 6 and second regions 7 alternately arranged in a direction parallel to the second face 3. The surface of the edge isolation region 5 is recessed inwardly relative to the surface of the first region 6. The first doped semiconductor layer 9 is formed on the first region 6. The second doped semiconductor layer 10 is formed in the second region 7 or on the second region 7. The second doped semiconductor layer 10 is of opposite conductivity type to the first doped semiconductor layer 9.

Specifically, the semiconductor substrate may be a semiconductor substrate such as a silicon substrate, a silicon germanium substrate, or a germanium substrate. The semiconductor substrate may be an N-type semiconductor substrate or a P-type semiconductor substrate in terms of conductivity type. In addition, the first surface of the semiconductor substrate corresponds to the light receiving surface of the back contact battery. The second face of the semiconductor substrate corresponds to the backlight face of the back contact cell. Based on this, in terms of structure, as shown in fig. 1, the first face 2 of the semiconductor substrate 1 may be an inverted pyramid-shaped suede. Alternatively, as shown in fig. 2, the first face 2 of the semiconductor substrate 1 may be a regular pyramid-shaped textured face. Of course, the first surface may be any other surface besides inverted or regular pyramid surface. As shown in fig. 1 and fig. 2, the first surface 2 with the textured surface can refract more light into the semiconductor substrate 1 due to the light trapping effect of the textured structure, so that the photoelectric conversion efficiency of the back contact battery can be further improved. Based on this, the surface morphology of the first surface 2 may be set according to the requirements of different application scenarios, which is not specifically limited herein.

As for the surface morphology of the second surface of the semiconductor substrate, the configuration may be set according to actual requirements, so long as the configuration can be applied to the back contact battery provided by the embodiment of the present utility model. For example: the second surface can be a polished surface, and also can be a suede surface with a shape such as a positive pyramid shape or an inverted pyramid shape.

In addition, as shown in fig. 1 to 3, the second face 3 of the semiconductor substrate 1 has a middle region 4, and an edge isolation region 5 extending outward from the middle region 4. The boundary between the intermediate region 4 and the edge isolation region 5 is a virtual boundary. The shapes and specifications of the intermediate region 4 and the edge isolation region 5 may be set according to the shape and specification of the semiconductor substrate, and actual requirements, and are not particularly limited herein. For example: in the case where the semiconductor substrate is a cylindrical semiconductor substrate, the intermediate region may be a circular intermediate region. At this time, the edge isolation region is a circular ring-shaped edge isolation region. Also for example: as shown in fig. 3, in the case where the semiconductor substrate 1 is a tetragonal semiconductor substrate, the intermediate region 4 may be a rectangular intermediate region. At this time, the edge isolation region 5 is a square-shaped annular edge isolation region.

In addition, the geometric center of the middle area may be coincident with the geometric center of the second surface, or may be staggered. When the shape of the middle region 4 and the surface shape of the second surface 3 are identical, as shown in fig. 3, the geometric center of the middle region 4 coincides with the center of the second surface 3, so that the widths of the portions of the edge isolation region 5 are approximately equal, and the distances between the edges of the first region 6 and the second region 7 and the side edges of the semiconductor substrate 1 are approximately equal.

Wherein, as shown in fig. 1 to 3, the above-mentioned intermediate region 4 may be divided into first regions 6 and second regions 7 alternately arranged along a direction parallel to the second face 3. The boundary between the first region 6 and the second region 7 is a virtual boundary. The shape and specification of the first and

second regions

6 and 7, and whether the surfaces of the first and

second regions

6 and 7 are flush may be set according to actual needs, and are not particularly limited herein. For example: as shown in fig. 3, in the case where the intermediate region 4 is a rectangular intermediate region, the first region 6 and the second region 7 may each be rectangular regions.

As shown in fig. 4, the surface of the edge isolation area 5 is recessed inward with respect to the surface of the first area 6, and the depth of the inward recess may be set according to practical requirements, so long as the application can be applied to the embodiment of the present utility model.

It should be noted that, the surface topography of the edge isolation area, the first area, and the second area of the second surface may be set according to actual requirements. The surface topography of the three regions may be the same or different.

For example: the surface of the first region may be a polished surface, a regular pyramid-shaped texture, or an inverted pyramid-shaped texture.

For example: the surfaces of the second area and the edge isolation area may be polished surfaces, regular pyramid-shaped texture surfaces or inverted pyramid-shaped texture surfaces. Wherein the second doped semiconductor layer may be formed on the second region in the case where the surfaces of the second region and the edge isolation region are polished surfaces. At this time, since the second surface of the semiconductor substrate corresponds to the backlight surface of the back contact battery, and the polished surface has relatively good reflection characteristics, in the case that the surfaces of the second region and the edge isolation region are polished surfaces, light can be at least partially reflected back into the semiconductor substrate after reaching the surfaces of the second region and the edge isolation region, and reused by the semiconductor substrate, thereby further improving the photoelectric conversion efficiency of the back contact battery. In addition, in the case where the surfaces of the second region and the edge isolation region are polished surfaces, the second doped semiconductor layer may also be formed in the second region. At this time, the surfaces of the edge isolation region and the second doped semiconductor layer are flat polished surfaces, so that the compactness of the surface passivation layer on the edge isolation region and the second doped semiconductor layer can be improved, and the passivation effect of the surface passivation layer on the edge isolation region and the second doped semiconductor layer can be improved. And in the case where the surfaces of the second region and the edge isolation region are the regular pyramid-shaped textured surface or the inverted pyramid-shaped textured surface, the second doped semiconductor layer may be formed in the second region. At this time, the second area and the edge isolation area with the surface being the regular pyramid suede or the inverted pyramid suede can enable more light to be refracted into the semiconductor substrate from the backlight surface of the back contact battery, and the photoelectric conversion efficiency of the back contact battery can be further improved. In addition, in the case where the surfaces of the second region and the edge isolation region are the regular pyramid-shaped textured surface or the inverted pyramid-shaped textured surface, the second doped semiconductor layer may be formed on the second region. At this time, under the condition that the width of the second region is fixed, compared with the second region with the polished surface, the surface area of the second region with the surface being the regular pyramid suede or the inverted pyramid suede is larger, so that the contact area between the second doped semiconductor layer and the part of the semiconductor substrate located in the second region can be increased, the collection of carriers of the corresponding conductivity type by the second doped semiconductor layer is facilitated, the short-circuit current of the back contact battery is increased, and further the photoelectric conversion efficiency of the back contact battery is facilitated to be improved. Therefore, the surface morphology of the second region and the edge isolation region in the back contact battery provided by the utility model has various alternatives, and the applicability of the back contact battery provided by the utility model in different application scenes can be improved.

For the first doped semiconductor layer, the specific conductivity type and doping concentration of the first doped semiconductor layer may be set according to practical requirements, so long as the first doped semiconductor layer can be applied to the back contact battery provided by the embodiment of the present utility model. For example: the first doped semiconductor layer may be an N-type semiconductor layer doped with N-type conductive particles such as phosphorus. Also for example: the first doped semiconductor layer may be a P-type semiconductor layer doped with boron or the like. The conductivity type of the first doped semiconductor layer may be the same as or opposite to the conductivity type of the semiconductor substrate.

Further, the first doped semiconductor layer may be amorphous, microcrystalline, single crystalline, polycrystalline, nanocrystalline, or the like in terms of an internal arrangement form from the object. The material of the first doped semiconductor layer may be a semiconductor material such as silicon, silicon germanium, doped silicon carbide, gallium arsenide, or the like. From the passivation aspect, the first doped semiconductor layer may be a hydrogenated doped layer.

For the above-described second doped semiconductor layer, the conductivity type of the second doped semiconductor layer may be set with reference to the conductivity type of the first doped semiconductor layer. Specifically, when the first doped semiconductor layer is a P-type doped semiconductor layer, the second doped semiconductor layer is an N-type doped semiconductor layer. In contrast, when the first doped semiconductor layer is an N-type doped semiconductor layer, the second doped semiconductor layer is a P-type doped semiconductor layer. In addition, the doping concentration of the second doped semiconductor layer and the specific formation position of the second doped semiconductor layer may be set according to actual requirements, which is not specifically limited herein. In the case where the second doped semiconductor layer 10 is formed on the second region 7 as shown in fig. 5 and 6, the material of the second doped semiconductor layer 10 may refer to the material of the first doped semiconductor layer 9 described above, and will not be described herein.

The following description will be given for the formation of the first doped semiconductor layer and the second doped semiconductor layer by taking the example that the first doped semiconductor layer is formed first and the doping element in the first doped semiconductor layer is doped to the side surface of the semiconductor substrate as an example:

first, a process such as chemical vapor deposition or plasma chemical vapor deposition is generally adopted to form an intrinsic semiconductor layer covered on the second surface, and the intrinsic semiconductor layer is doped with conductive particles of a corresponding type by an in-situ or ex-situ doping method to form a first doped semiconductor material layer. Meanwhile, a wrap-around doped semiconductor layer is formed on the side surface and the first surface of the semiconductor substrate due to the wrap-around plating. Then, a patterning process is required to be performed on the first doped semiconductor material layer, so that only a portion of the first doped semiconductor material layer located on the first region is remained, and the first doped semiconductor layer is obtained. And performing the first surface detour plating treatment to remove the detour plating doped semiconductor layer formed on the first surface. And the side surface of the semiconductor substrate, especially the part of the side surface of the semiconductor substrate close to the edge of the second surface, still remains with the plating-around doped semiconductor layer. Based on this, after forming a second doped semiconductor layer of opposite conductivity type to the first doped semiconductor layer in or on the second region, or after forming the first doped semiconductor layer and before forming the second doped semiconductor layer, a portion of the semiconductor substrate located in the edge isolation region is selectively etched such that a surface of the edge isolation region is recessed inward with respect to a surface of the first region, so that the second doped semiconductor layer and the plating-around doped semiconductor layer remaining on a side surface of the semiconductor substrate can be isolated by physical insulation such as an air gap or a surface passivation layer located at the edge isolation region, preventing an edge portion of the second doped semiconductor layer from forming an edge PN junction with the remaining plating-around doped semiconductor layer.

As is apparent from the above, in forming the first doped semiconductor layer on the first region provided on the second surface of the semiconductor substrate and forming the second doped semiconductor layer in the second region (or on the second region), the doping element of one of the first doped semiconductor layer and the second doped semiconductor layer is doped to the side surface of the semiconductor substrate due to the plating around, thereby forming a heavily doped layer of the corresponding conductivity type on the side surface of the semiconductor substrate. In the above case, since the first doped semiconductor layer and the second doped semiconductor layer are opposite in conductivity type, the other of the first doped semiconductor layer and the second doped semiconductor layer is opposite in conductivity type to the heavily doped layer formed on the side of the semiconductor substrate. Based on this, when the surface of the edge isolation region is recessed inward relative to the surface of the first region, the edge isolation region can isolate the other of the first doped semiconductor layer and the second doped semiconductor layer from the heavily doped layer formed on the side surface of the semiconductor substrate, so that an edge PN junction is prevented from being formed between the other of the first doped semiconductor layer and the second doped semiconductor layer and the heavily doped layer, and further, leakage generated between the other of the first doped semiconductor layer and the second doped semiconductor layer and the side surface of the semiconductor substrate is inhibited, the photoelectric conversion efficiency of the back contact battery is improved, and the electrical performance of the back contact battery is improved.

In addition, when the second doped semiconductor layer is formed on the second region, the surface of the edge isolation region is recessed inwards relative to the surface of the first region, so that the problem that in the prior art, in the process of patterning the second doped semiconductor material layer formed by single-sided wet chemical treatment, part of the second doped semiconductor material layer remains on the part of the first doped semiconductor layer, which is close to the edge region, due to the fact that water in the sprayed water film flows to the second surface edge region along the side surface of the semiconductor substrate, edge PN junction leakage occurs, the photoelectric conversion efficiency of the back contact battery is improved, and the electrical property of the back contact battery is improved.

In one possible implementation, as shown in fig. 4, in the case where the second doped semiconductor layer 10 is formed within the second region 7, the second doped semiconductor layer 10 is of the same conductivity type as the semiconductor substrate 1.

For example: in the case that the second doped semiconductor layer is formed in the second region, if the semiconductor substrate is an N-type semiconductor substrate, the second doped semiconductor layer is an N-type doped semiconductor layer.

Also for example: in the case that the second doped semiconductor layer is formed in the second region, if the semiconductor substrate is a P-type semiconductor substrate, the second doped semiconductor layer is a P-type doped semiconductor layer.

Note that, when the second doped semiconductor layer and the semiconductor substrate have the same conductivity type, the second doped semiconductor layer and the semiconductor substrate may have the same or different kinds of doping elements.

For example: the semiconductor substrate may be a P-type semiconductor substrate doped with boron. The second doped semiconductor layer may be a P-type semiconductor layer doped with boron or a P-type semiconductor layer doped with aluminum or gallium.

Also for example: the semiconductor substrate may be an N-type semiconductor substrate doped with phosphorus. The second doped semiconductor layer may be an N-type semiconductor layer doped with phosphorus or an N-type semiconductor layer doped with antimony.

In one possible implementation, as shown in fig. 4 to 7, the surface of the above-mentioned edge isolation region 5 is recessed from 0.5 μm to 8 μm inward with respect to the surface of the first region 6. For example: the surface of the edge isolation region may be recessed 0.5 μm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm or 8 μm relative to the surface of the first region.

With the above technical solution, as shown in fig. 4 to 7, the depth of the surface of the edge isolation region 5 recessed inward relative to the surface of the first region 6 is moderate, so that the probability that light is absorbed after entering the portion of the semiconductor substrate 1 corresponding to the edge isolation region 5 can be increased while the other of the first doped semiconductor layer 9 and the second doped semiconductor layer 10 is isolated from the heavily doped layer by the edge isolation region 5, and further, the photoelectric conversion efficiency of the back contact battery can be improved.

Of course, the depth of the surface of the edge isolation region that is recessed inward with respect to the surface of the first region may be set to other suitable values according to the actual application scenario, which is not specifically limited herein.

In one possible implementation, as shown in fig. 7, the surface of the second region 7 is concave inward with respect to the surface of the first region 6. In this case, in the case where the second doped semiconductor layer 10 is formed in the second region 7, when the surface of the second region 7 is recessed inward with respect to the surface of the first region 6, the first doped semiconductor layer 9 may be staggered at least with a portion of the second doped semiconductor layer 10, which is advantageous in preventing leakage between the first doped semiconductor layer 9 and the second doped semiconductor layer 10, which are opposite in conductivity type. In the case that the second doped semiconductor layer 10 is formed in the second region 7, since the conductive particles may diffuse into the portion of the first region 6 adjacent to the first doped semiconductor layer 9 when the conductive particles of the corresponding type are doped into the first doped semiconductor layer 9, when the surface of the second region 7 is recessed inward relative to the surface of the first region 6, the second doped semiconductor layer 10 may be respectively staggered with the first doped semiconductor layer 9 and the portion of the second doped semiconductor layer 10 adjacent to the first doped semiconductor layer 9 relative to the surface of the first region 6, so as to facilitate preventing electric leakage between the second doped semiconductor layer 10 and the portions of the first doped semiconductor layer 9 and the first region 6 adjacent to the first doped semiconductor layer 9, thereby further improving the photoelectric conversion efficiency of the back contact battery.

The specific depth of the surface of the second area that is recessed inward relative to the surface of the second area may be set according to actual requirements, and is not specifically limited herein. Illustratively, the surface of the second region may be recessed from 0.5 μm to 8 μm inwardly relative to the surface of the first region. At this time, the depth of the surface of the second region recessed inwards relative to the surface of the first region is moderate, so that the second doped semiconductor layer and the part of the first region, which is close to the first doped semiconductor layer, can be staggered, and meanwhile, the excessive thinning of the part of the semiconductor substrate, which is positioned in the second region, due to the fact that the depth of the surface of the second region recessed inwards relative to the surface of the first region is large can be prevented, the risk of hidden cracking of the semiconductor substrate after thinning is reduced, the probability of absorbing light after entering the part of the semiconductor substrate, which corresponds to the second region, can be increased, and the photoelectric conversion efficiency of the back contact battery is further improved.

In addition, the second face has a surface of both the second region and the edge isolation region recessed inwardly from a surface of the first region. Wherein, along the thickness direction of the semiconductor substrate, the surfaces of the second region and the edge isolation region may be flush. Alternatively, the surfaces of the second region and the edge isolation region may be staggered. When the surfaces of the two regions are staggered, the surface of the second region may be concave inward relative to the surface of the edge isolation region, or the surface of the edge isolation region may be concave inward relative to the surface of the second region. Specifically, the height difference between the surfaces of the second region and the edge isolation region may be set according to the actual application scenario, which is not particularly limited herein.

It will be appreciated that when the surface of the edge isolation region 5 is flush with the surface of the second region 7 as shown in fig. 7, the portions of the semiconductor substrate 1 located in the edge isolation region 5 and the second region 7 may be treated simultaneously in the same operation step so that the surfaces of both regions may be recessed inward to improve the back contact cell manufacturing efficiency. In addition, under the condition that the surface of the edge isolation region 5 is flush with the surface of the second region 7, the surface of the junction between the edge isolation region 5 and the second region 7 is relatively flat, so that the compactness of the surface passivation layer 13 at the junction between the edge isolation region 5 and the second region 7 can be at least improved, the passivation effect of the surface passivation layer 13 on the junction can be at least improved, and the photoelectric conversion efficiency of the back contact battery can be further improved.

In one possible implementation, the width of the edge isolation region is 0.1mm to 0.5mm. For example: the width of the edge isolation region may be 0.1nm, 0.2nm, 0.3nm, 0.4nm, or 0.5nm.

Under the condition of adopting the technical scheme, the width of the edge isolation region is moderate, so that the situation that the edge PN junction is difficult to prevent from leaking due to the fact that the width of the edge isolation region is small can be prevented, the range of the first region and the second region is small due to the fact that the width of the edge isolation region is large can be prevented, further, the fact that the first doped semiconductor layer formed on the first region and the second doped semiconductor layer formed in the second region or on the second region have a large forming range is ensured, electrons and holes generated in each region of the semiconductor substrate are led out in time by the first doped semiconductor layer and the second doped semiconductor layer, the carrier recombination rate is reduced, and the photoelectric conversion efficiency of the back contact battery is further improved.

Of course, the width of the edge isolation area may be set to other suitable values according to the actual application scenario, which is not specifically limited herein.

In one possible implementation, as shown in fig. 4 to 7, the above-mentioned back contact cell further comprises a first tunneling passivation layer 11 formed between the first doped semiconductor layer 9 and the semiconductor substrate 1. In this case, the first doped semiconductor layer 9 and the first tunneling passivation layer 11 may constitute a tunneling passivation contact structure. The first tunneling passivation layer 11 in the tunneling passivation contact structure allows majority carriers to tunnel into the first doped semiconductor layer 9 while blocking minority carriers from passing through, so that the majority carriers are transmitted through the first doped semiconductor layer 9 and collected by the corresponding electrode, the recombination rate of carriers of different conductivity types at the surface of the first region 6 is reduced, excellent interface passivation and selective collection of the carriers are realized, and the photoelectric conversion efficiency of the back contact cell is further improved.

Specifically, the thickness and the material of the first tunneling passivation layer may be set according to the actual application scenario, so long as the first tunneling passivation layer can be applied to the embodiment of the present utility model. For example: the thickness of the first tunneling passivation layer may be 0.5nm to 5nm. The material of the first tunneling passivation layer may be any material with tunneling passivation function, such as silicon oxide, aluminum oxide, titanium oxide, hafnium oxide, gallium oxide, tantalum pentoxide, niobium pentoxide, silicon nitride, silicon carbonitride, aluminum nitride, titanium carbide nitride, etc.

In one possible implementation manner, as shown in fig. 5 and 6, in the case where the second doped semiconductor layer 10 is formed on the second region 7, the back contact battery further includes at least the second tunneling passivation layer 12 formed between the second doped semiconductor layer 10 and the semiconductor substrate 1, so that the second tunneling passivation layer 12 and the second doped semiconductor layer 10 form a tunneling passivation contact structure, the recombination rate of carriers of different conductivity types at the surface of the second region 7 is reduced, excellent interface passivation and selective collection of carriers are achieved, and the photoelectric conversion efficiency of the back contact battery is further improved. The thickness and the material of the second tunneling passivation layer 12 may refer to those of the first tunneling passivation layer 11 described above, and will not be described herein.

In one possible implementation, as shown in fig. 4 to 7, the above-mentioned back contact cell further comprises a surface passivation layer 13 covering the edge isolation region 5, the first doped semiconductor layer 9 and the second doped semiconductor layer 10. In this case, the surface passivation layer 13 may passivate the side of the edge isolation region 5, the first doped semiconductor layer 9 and the second doped semiconductor layer 10 facing away from the semiconductor substrate 1, so as to reduce the carrier recombination rate of the side of the edge isolation region 5, the first doped semiconductor layer 9 and the second doped semiconductor layer 10 facing away from the semiconductor substrate 1, and further improve the photoelectric conversion efficiency of the back contact cell. In addition, since the dielectric constant of air is smaller than that of the surface passivation layer 13, when the surface passivation layer 13 also covers the edge isolation region 5, the insulation effect between the other of the first doped semiconductor layer 9 and the second doped semiconductor layer 10 and the semiconductor substrate 1 is better, which is more beneficial to preventing the edge PN junction from leaking.

Specifically, the thickness and the material of the surface passivation layer may be set according to the actual application scenario, so long as the surface passivation layer can be applied to the embodiment of the present utility model. For example: the surface passivation layer can be made of one or more of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide and amorphous silicon.

In one possible implementation, as shown in fig. 6, the above-mentioned intermediate regions 4 may also have a middle isolation region 8 interposed between each first region 6 and the adjacent second region 7. In this case, since the first doped semiconductor layer 9 formed on the first region 6 is opposite to the second doped semiconductor layer 10 formed in the second region 7 or on the second region 7 in conductivity type, in the case that the second face 3 further has the middle isolation region 8 interposed between each of the first region 6 and the second region 7, the middle isolation region 8 can laterally separate the adjacent first doped semiconductor layer 9 and second doped semiconductor layer 10, suppress recombination of carriers different in conductivity type at the lateral interface of the first doped semiconductor layer 9 and the second doped semiconductor layer 10, facilitate prevention of occurrence of electric leakage at the lateral interface of the two, and further improve the photoelectric conversion efficiency of the back contact cell. Specifically, the shape and specification of the middle isolation region 8 may be set according to actual requirements, and are not particularly limited herein.

Specifically, the shape and specification of the middle isolation region may be set according to actual requirements, which are not particularly limited herein. In addition, along the thickness direction of the semiconductor substrate, the surface of the middle isolation region may be flush with the surface of the first region, or may be recessed inward with respect to the surface of the first region. When the surface of the middle isolation region is concave inwards relative to the surface of the first region, the height difference between the surface of the middle isolation region and the surface of the edge isolation region may be set according to actual requirements, and is not specifically limited herein.

It will be appreciated that when the surface of the middle isolation region is recessed inwardly relative to the surface of the first region, the first doped semiconductor layer and the second doped semiconductor layer of opposite conductivity types may also be isolated by physical insulation such as an air gap or a surface passivation layer at the inwardly recessed portion of the middle isolation region to further inhibit recombination of carriers of different conductivity types at the lateral interface of the first doped semiconductor layer and the second doped semiconductor layer.

In one possible implementation, as shown in fig. 7, in the case where the second doped semiconductor layer 10 is formed within the second region 7, the back contact cell further includes: a first electrode 15 formed on the second doped semiconductor layer 10. The material of the first electrode 15 includes a doping element doped in the second doped semiconductor layer 10.

For example: in the case that the doping element in the second doped semiconductor layer is antimony, the material of the first electrode includes antimony. Also for example: in the case that the doping element in the second doped semiconductor layer is aluminum, the material of the first electrode includes aluminum. For another example: in the case that the doping element in the second doped semiconductor layer is gallium, the material of the first electrode includes gallium.

In another possible implementation, as shown in fig. 4 to 7, the back contact battery further includes a second electrode 16 in ohmic contact with the first doped semiconductor layer 9, and a first electrode 15 in ohmic contact with the second doped semiconductor layer 10, so as to collect carriers respectively extracted from the first doped semiconductor layer 9 and the second doped semiconductor layer 10 through the second electrode 16 and the first electrode 15. The materials of the first electrode 15 and the second electrode 16 may be conductive materials such as silver, aluminum, copper, and nickel.

In one possible implementation, as shown in fig. 4 to 7, the back contact battery further includes a passivation anti-reflection layer 14 covering the first surface to passivate the first surface and reduce the recombination rate of carriers at the first surface. In addition, the passivation anti-reflection layer 14 can also reduce the surface reflectivity of the first surface, so that more light can be refracted into the semiconductor substrate 1, and the photoelectric conversion efficiency of the back contact battery is further improved.

The thickness and the material of the passivation anti-reflection layer can be set according to the actual application scene, and are not particularly limited herein. For example: the passivation and antireflection layer can be made of silicon nitride, silicon oxynitride, aluminum oxide and the like.

The embodiment of the utility model also provides a photovoltaic module, which comprises the back contact battery provided by the embodiment.

The beneficial effects of the photovoltaic module provided by the embodiment of the present utility model may refer to the beneficial effect analysis of the back contact battery provided by the above embodiment, and will not be described herein.

The foregoing is merely illustrative of the present utility model, and the present utility model is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present utility model. Therefore, the protection scope of the present utility model shall be subject to the protection scope of the claims.

Claims

1. A back contact battery, comprising:

a semiconductor substrate having opposite first and second sides; the second face having a middle region, and an edge isolation region extending outwardly from the middle region; the middle region is divided into first and second regions alternately arranged along a direction parallel to the second face; the surface of the edge isolation region is recessed inwardly relative to the surface of the first region;

a first doped semiconductor layer formed on the first region;

and a second doped semiconductor layer formed in or on the second region; the second doped semiconductor layer is of opposite conductivity type to the first doped semiconductor layer.

2. The back contact battery of claim 1, wherein the second doped semiconductor layer is the same conductivity type as the semiconductor substrate in the case where the second doped semiconductor layer is formed within the second region.

3. The back contact cell of claim 1 or 2, wherein a surface of the edge isolation region is recessed inward from 0.5 μιη to 8 μιη relative to a surface of the first region.

4. The back contact battery of claim 1 or 2, wherein a surface of the second region is recessed inwardly relative to a surface of the first region; and/or the number of the groups of groups,

the surface of the second region is recessed inward from 0.5 μm to 8 μm relative to the surface of the first region.

5. The back contact cell of claim 1 or 2, wherein a surface of the edge isolation region is flush with a surface of the second region; and/or the number of the groups of groups,

the edge isolation region has a width of 0.1mm to 0.5mm.

6. The back contact cell of claim 1, further comprising a first tunneling passivation layer formed between the first doped semiconductor layer and the semiconductor substrate; and/or the number of the groups of groups,

in the case where the second doped semiconductor layer is formed on the second region, the back contact cell further includes a second tunneling passivation layer formed at least between the second doped semiconductor layer and the semiconductor substrate.

7. The back contact cell of claim 1 or 2, further comprising a surface passivation layer overlying the edge isolation region, the first doped semiconductor layer, and the second doped semiconductor layer.

8. The back contact cell of claim 1 or 2, wherein the first face is a regular or inverted pyramidal face; and/or the number of the groups of groups,

the surfaces of the second area and the edge isolation area are polished surfaces, regular pyramid texture surfaces or inverted pyramid texture surfaces.

9. The back contact battery of claim 1 or 2, wherein the intermediate region further has an intermediate isolation region between each of the first regions and an adjacent second region.

10. The back contact battery of claim 9, wherein a surface of the middle isolation region is recessed inward relative to a surface of the first region.

11. A photovoltaic module comprising a back contact cell according to any one of claims 1 to 10.