CN220041872U

CN220041872U - Back contact battery and photovoltaic module

Info

Publication number: CN220041872U
Application number: CN202320823357.4U
Authority: CN
Inventors: 颜长; 陈晨; 李华
Original assignee: Taizhou Longi Solar Technology Co Ltd
Current assignee: Taizhou Longi Solar Technology Co Ltd
Priority date: 2023-04-13
Filing date: 2023-04-13
Publication date: 2023-11-17
Anticipated expiration: 2033-04-13

Abstract

The utility model discloses a back contact battery and a photovoltaic module, and relates to the technical field of solar cells. At least the surface passivation layer can not form a stable conductive channel between the N-type region and the P-type region through the isolation layer, so that electric leakage is inhibited. The back contact battery includes: semiconductor substrate, surface passivation layer and isolation layer. The semiconductor substrate has opposite first and second sides. The second face has N-type and P-type regions alternately spaced apart along a direction parallel to the second face, and isolation regions between each N-type region and the corresponding P-type region. The surface passivation layer is formed at least on the N-type region and the P-type region. The surface passivation layer includes a strongly charged dielectric layer in contact with at least the N-type region and the P-type region. An isolation layer is formed on the isolation region. The isolation layer is at least one of a neutral dielectric layer and a weakly charged dielectric layer. The isolation layer is used for isolating at least a part of the semiconductor substrate corresponding to the isolation region from the surface passivation layer.

Description

Back contact battery and photovoltaic module

Technical Field

The utility model relates to the technical field of solar cells, in particular to a back contact cell and a photovoltaic module.

Background

Back contact cells, i.e. back contact cells, wherein interdigitated back contact solar cells are also referred to as IBC cells. IBC is known as Interdigitated back contact interdigitated back contact. The IBC battery has the biggest characteristics that the emitter and the metal contact are positioned on the back of the battery, and the front is free from the influence of shielding of the metal electrode, so that the IBC battery has higher short-circuit current Jsc, and meanwhile, the back can allow a wider metal grid line to reduce the series resistance Rs so as to improve the filling factor FF; and the front-face non-shielding battery is high in conversion efficiency and attractive in appearance, and meanwhile, the assembly of the all-back electrode is easier to assemble. IBC batteries are one of the current technical directions for realizing efficient crystalline silicon batteries.

However, the existing back contact battery has a leakage problem, resulting in a decrease in the electrical performance of the back contact battery.

Disclosure of Invention

The utility model aims to provide a back contact battery and a photovoltaic module, which are used for isolating at least a part of a semiconductor substrate corresponding to an isolation region from a surface passivation layer comprising a dielectric layer with strong charges through an isolation layer, so that the surface passivation layer cannot form a stable conductive channel between an N-type region and a P-type region, and electric leakage is inhibited.

In a first aspect, the present utility model provides a back contact battery. The back contact battery includes: semiconductor substrate, surface passivation layer and isolation layer.

The semiconductor substrate has opposite first and second sides. The second face has N-type and P-type regions alternately spaced apart along a direction parallel to the second face, and isolation regions between each N-type region and the corresponding P-type region. The surface passivation layer is formed at least on the N-type region and the P-type region. The surface passivation layer includes a strongly charged dielectric layer in contact with at least the N-type region and the P-type region. An isolation layer is formed on the isolation region. The isolation layer is at least one of a neutral dielectric layer and a weakly charged dielectric layer. The isolation layer is used for isolating at least a part of the semiconductor substrate corresponding to the isolation region from the surface passivation layer.

Under the condition of adopting the technical scheme, the surface passivation layer included in the back contact battery is at least formed on the N-type region and the P-type region of the back surface of the semiconductor substrate. And the surface passivation layer comprises a strongly charged dielectric layer in contact with at least the N-type region and the P-type region. Based on the method, the high-charge dielectric layer has the advantages of higher surface hydrogen content, higher fixed charge density and the like, so that the passivation effect of the high-charge dielectric layer on one side of the backlight is better, the recombination rate of carriers on the surfaces of the N-type region and the P-type region can be reduced, and the photoelectric conversion efficiency of the back contact battery is improved. In addition, the fixed charge density in the neutral dielectric layer and the weakly charged dielectric layer is lower than in the strongly charged dielectric layer, and neither can form a conductive path at the interface itself in contact with the semiconductor substrate. Based on the above, when the back contact battery further comprises an isolation layer formed on the isolation region, and the isolation layer is at least one of a neutral dielectric layer and a weakly charged dielectric layer, the existence of the isolation layer can isolate at least a part of the semiconductor substrate corresponding to the isolation region from the surface passivation layer, so that the surface passivation layer is prevented from being contacted with a part of the semiconductor substrate corresponding to the isolation region to form a stable conductive channel capable of transmitting carriers between the N-type region and the P-type region, the carrier recombination rate between the N-type region and the P-type region is reduced, the risk of occurrence of a hot spot problem of the back contact battery is reduced while electric leakage is suppressed, and the electric performance of the back contact battery is facilitated to be improved.

As a possible implementation manner, the fixed charge density of the weakly charged dielectric layer is less than or equal to 10 ¹¹ cm ^-2 。

Under the condition of adopting the technical scheme, the fixed charge density of the medium layer with weak charge is in the range, so that the conductive channel is prevented from being formed between the isolation layer and the part of the semiconductor substrate corresponding to the isolation region easily due to the fact that the fixed charge density in the medium layer with weak charge is large, the N-type region and the P-type region can be prevented from being directly conducted through the isolation layer, and the back contact battery is ensured to have high photoelectric conversion efficiency.

As one possible implementation manner, the fixed charge density of the dielectric layer with strong charge is greater than or equal to 10 ¹² cm ^-2 。

Under the condition of adopting the technical scheme, the fixed charge density of the medium layer with strong charges is in the range, so that poor field passivation effect of the medium layer with strong charges on an N-type region and a P-type region caused by low electric field strength formed at the interface where the medium layer with strong charges contacts a semiconductor substrate due to low fixed charge density of the medium layer with strong charges can be prevented, the surface carrier recombination rate of the N-type region and the P-type region is reduced, and further the back contact battery is ensured to have high photoelectric conversion efficiency.

As a possible implementation, the electrically neutral dielectric layer is a thermally grown silicon dioxide layer.

Under the condition of adopting the technical scheme, the thermally grown silicon dioxide layer is a common neutral dielectric layer, and has good passivation effect. Based on the above, when the electrically neutral dielectric layer is a thermally grown silicon dioxide layer, the manufacturing difficulty of the back contact battery can be reduced, and meanwhile, the passivation can be performed on the part of the semiconductor substrate corresponding to the isolation region, so that the recombination rate of carriers on the surface of the isolation region is reduced, and the photoelectric conversion efficiency of the back contact battery is further improved.

As a possible implementation manner, the weakly charged dielectric layer is at least one of a silicon oxynitride layer and a silicon carbide layer. Under the condition, the weakly charged dielectric layer has various alternative schemes, so that the method is beneficial to selecting a proper scheme according to the requirements of different practical application scenes, and improves the applicability of the back contact battery provided by the utility model under different application scenes.

As a possible implementation manner, the dielectric layer with strong charge is at least one of an alumina layer, a silicon nitride layer and a zirconia layer.

Under the condition of adopting the technical scheme, the aluminum oxide layer and the zirconium oxide layer are dielectric layers with electronegative fixed charges, and the silicon nitride layer is a dielectric layer with electropositive fixed charges. In addition, the principle of field passivation on the backlight side of the semiconductor substrate through the dielectric layer with strong charges is that an electric field is formed at the interface of the dielectric layer with strong charges, and the concentration of free electrons or holes at the interface is reduced through the electric field, so that the aim of reducing the carrier recombination rate is fulfilled. Based on the above, in the case that the dielectric layer with strong charges is at least one of an alumina layer, a silicon nitride layer and a zirconia layer, the dielectric layer with proper materials can be selected according to the doping type and other requirements of the semiconductor substrate in the practical application scene, so that the surface passivation layer has higher passivation effect, and meanwhile, the applicability of the back contact battery provided by the utility model in different application scenes can be improved.

As one possible implementation, the thickness of the isolation layer is 1nm or more and 100nm or less.

Under the condition of adopting the technical scheme, the thickness of the isolation layer is in the range, so that when the dielectric layer with strong charge is formed on the isolation layer, the part of the dielectric layer with strong charge corresponding to the isolation region can be prevented from inducing a conductive channel due to the small thickness of the isolation layer, and the part of the semiconductor substrate corresponding to the isolation region can be ensured to be isolated from the surface passivation layer through the isolation layer. Meanwhile, the waste of materials caused by the larger thickness of the isolation layer can be prevented, and the manufacturing cost is reduced. And, it is also possible to prevent the influence on the formation of other structures such as an electrode structure, the subsequent operation such as interconnection, and the like.

As a possible implementation manner, the surface passivation layer covers the N-type region, the P-type region and the isolation layer.

Under the condition of adopting the technical scheme, because the isolation layer is formed on the isolation region and the second surface of the semiconductor substrate is provided with the N-type region, the P-type region and the isolation region, when the surface passivation layer covers the N-type region, the P-type region and the isolation layer, the surface passivation layer covers the whole second surface. At this time, after the passivation material for manufacturing the surface passivation layer is covered on the second surface, the surface passivation layer can be obtained without patterning at least part of the passivation material, so that the manufacturing process of the back contact battery can be simplified, the manufacturing difficulty of the back contact battery can be reduced, and the manufacturing cost of the back contact battery can be reduced.

As one possible implementation manner, the semiconductor substrate includes: the semiconductor device comprises a semiconductor substrate, a first passivation layer, an N-type semiconductor layer, a second passivation layer and a P-type semiconductor layer. The first passivation layer and the N-type semiconductor layer are sequentially stacked on a portion of the semiconductor substrate corresponding to the N-type region along the thickness direction of the semiconductor substrate. The second passivation layer and the P-type semiconductor layer are sequentially stacked on a portion of the semiconductor substrate corresponding to the P-type region along a thickness direction of the semiconductor substrate.

Under the condition of adopting the technical scheme, the first passivation layer and the N-type semiconductor layer formed on the part of the semiconductor substrate corresponding to the N-type region can form a passivation contact structure, and the second passivation layer and the P-type semiconductor layer formed on the part of the semiconductor substrate corresponding to the P-type region can also form a passivation contact structure, and the passivation contact structure can realize excellent interface passivation and selective collection of carriers, so that the photoelectric conversion efficiency of the back contact battery provided by the utility model can be further improved.

As a possible implementation manner, the isolation layer is at least located between the N-type semiconductor layer and the P-type semiconductor layer.

Under the condition of adopting the technical scheme, the isolation layer is at least one of a neutral dielectric layer and a weak charge dielectric layer, and the neutral dielectric layer and the weak charge dielectric layer have good insulating properties. Based on the above, when the isolation layer is at least located between the N-type semiconductor layer and the P-type semiconductor layer, the isolation layer can isolate the N-type semiconductor layer from the P-type semiconductor layer, so that the recombination rate of transverse carriers between the N-type semiconductor layer and the P-type semiconductor layer is reduced, and the photoelectric conversion efficiency of the back contact battery is further improved.

As a possible implementation manner, the semiconductor substrate further includes an intrinsic semiconductor layer thereon. The intrinsic semiconductor layer is located between the isolation layer and the semiconductor substrate.

Under the condition of adopting the technical scheme, the surface of the corresponding part of the semiconductor substrate can be passivated through the intrinsic semiconductor layer, so that the recombination rate of carriers at the area is reduced, and the photoelectric conversion efficiency of the back contact battery is further improved.

As a possible implementation, the semiconductor base further includes a third passivation layer located between the intrinsic semiconductor layer and the semiconductor substrate. The first passivation layer, the second passivation layer and the third passivation layer are integrally formed.

Under the condition of adopting the technical scheme, after the corresponding passivation materials covered on the second surface of the semiconductor substrate are formed in the actual manufacturing process, the first passivation layer, the second passivation layer and the third passivation layer can be obtained at the same time without patterning the corresponding passivation materials, thereby being beneficial to simplifying the manufacturing process of the back contact battery. And the third passivation layer can also passivate the surface of the semiconductor substrate corresponding to the isolation region, so that the carrier recombination rate of the surface of the semiconductor substrate corresponding to the isolation region is reduced, and the photoelectric conversion efficiency of the back contact battery is further improved.

In a second aspect, the present utility model further provides a photovoltaic module, which includes the solar cell provided in the first aspect and various implementations thereof.

The advantages of the second aspect and various implementations of the present utility model may be referred to for analysis of the advantages of the first aspect and various implementations of the first aspect, which are not described here in detail.

Drawings

The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description serve to explain the utility model and do not constitute a limitation on the utility model. In the drawings:

fig. 1 is a schematic view of a longitudinal cross-section of a structure of a back contact battery provided in the related art;

fig. 2 is a schematic longitudinal sectional view of a first structure of a back contact battery according to an embodiment of the present utility model;

fig. 3 is a schematic longitudinal cross-sectional view of a first structure of a semiconductor substrate in an embodiment of the utility model;

fig. 4 (1) and (2) are schematic longitudinal sectional views of two structures of a semiconductor substrate in an embodiment of the present utility model;

fig. 5 is a schematic longitudinal cross-sectional view of a second structure of a semiconductor substrate in an embodiment of the utility model;

fig. 6 is a schematic longitudinal cross-sectional view of a third structure of a semiconductor substrate in an embodiment of the utility model;

fig. 7 is a schematic longitudinal cross-sectional view of a fourth structure of a semiconductor substrate in an embodiment of the utility model;

fig. 8 is a schematic longitudinal sectional view of a second structure of a back contact battery according to an embodiment of the present utility model;

fig. 9 is a schematic longitudinal sectional view of a third structure of a back contact battery according to an embodiment of the present utility model;

fig. 10 is a schematic longitudinal sectional view of a fourth structure of a back contact battery according to an embodiment of the present utility model;

fig. 11 is a schematic longitudinal sectional view of a fifth structure of a back contact battery according to an embodiment of the present utility model.

Reference numerals: 1 is a semiconductor substrate, 2 is a first surface, 3 is a second surface, 4 is an N-type region, 5 is a P-type region, 6 is an isolation region, 7 is a surface passivation layer, 8 is a dielectric layer with strong charges, 9 is an isolation layer, 10 is a semiconductor substrate, 11 is a first passivation layer, 12 is an N-type semiconductor layer, 13 is a second passivation layer, 14 is a P-type semiconductor layer, 15 is an intrinsic semiconductor layer, 16 is a third passivation layer, 17 is a fourth passivation layer, 18 is a light facing surface passivation layer, 19 is a positive electrode, and 20 is a negative electrode.

Detailed Description

In order to make the technical problems, technical schemes and beneficial effects to be solved more clear, the utility model is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.

It will be understood that when an element is referred to as being "mounted" or "disposed" on another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise. The meaning of "a number" is one or more than one unless specifically defined otherwise.

In the description of the present utility model, it should be understood that the directions or positional relationships indicated by the terms "upper", "lower", "front", "rear", "left", "right", etc., are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present utility model.

In the description of the present utility model, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.

A solar cell is a semiconductor device that can convert light energy into electric energy. Higher energy conversion efficiency has been the goal pursued by the solar cell industry. For the conventional solar cell, an emitter contact electrode and a base contact electrode are respectively arranged on the front side and the back side of the solar cell. Because the front surface of the solar cell is a light receiving surface, the coverage of the emitter contact electrode positioned on the front surface can cause a part of incident sunlight to be reflected and shielded by the emitter contact electrode, so that a part of optical loss is caused, and the photoelectric conversion efficiency of the solar cell is reduced.

In view of the above technical problems, a back contact solar cell is proposed in the industry, which is a solar cell in which an emitter contact electrode and a base contact electrode are both disposed on the back surface (non-light-receiving surface), so that the light-receiving surface of the back contact solar cell is not shielded by any metal electrode, and thus the short-circuit current of the back contact solar cell can be effectively increased. Meanwhile, the back surface of the back contact solar cell can tolerate a wider metal grid line to reduce the series resistance, so that the filling factor of the back contact solar cell can be improved.

In addition, the conventional back contact battery generally adopts a dielectric layer made of materials such as aluminum oxide, silicon nitride, silicon oxynitride or silicon dioxide as a surface passivation layer on one side of the backlight surface, so as to reduce the surface recombination rate on one side of the backlight surface of the back contact battery and improve the photoelectric conversion efficiency of the back contact battery. In addition, compared with a neutral dielectric layer made of thermally grown silicon dioxide and the like and a weakly charged dielectric layer made of silicon oxynitride and the like, the strongly charged dielectric layer made of aluminum oxide or silicon nitride and the like has the advantages of high surface hydrogen content, high fixed charge density and the like, so that the passivation effect of the strongly charged dielectric layer on the backlight surface side is better.

However, as shown in fig. 1, the dielectric layer 8 with strong charge has a large amount of fixed charges, and can induce a stable conductive channel at the interface between itself and the semiconductor substrate, so that the N-type region and the P-type region on the backlight side and originally isolated by the isolation region in the back contact cell are communicated, and thus leakage is easily caused, and the electrical performance of the back contact cell is reduced.

In order to solve the technical problems described above, in a first aspect, an embodiment of the present utility model provides a back contact battery. As shown in fig. 2, the back contact battery provided in the embodiment of the present utility model includes: a semiconductor substrate 1, a surface passivation layer 7 and an isolation layer 9.

As shown in fig. 2, the semiconductor substrate 1 has a first surface 2 and a second surface 3 opposite to each other. The second face 3 has N-type regions 4 and P-type regions 5 alternately spaced apart along a direction parallel to the second face 3, and isolation regions 6 between each N-type region 4 and the corresponding P-type region 5. A surface passivation layer 7 is formed at least on the N-type region 4 and the P-type region 5. The surface passivation layer 7 comprises a strongly charged dielectric layer 8 in contact with at least the N-type region 4 and the P-type region 5. An isolation layer 9 is formed on the isolation region 6. The isolation layer 9 is at least one of a neutral dielectric layer and a weakly charged dielectric layer. The isolation layer 9 serves at least to isolate the portion of the semiconductor substrate 1 corresponding to the isolation region 6 from the surface passivation layer 7.

Specifically, the specific structure of the semiconductor substrate may be set according to the actual application scenario, which is not specifically limited herein.

As illustrated in fig. 3, the semiconductor base 1 may include a semiconductor substrate 10, an N-type semiconductor layer 12, and a P-type semiconductor layer 14. Wherein the N-type semiconductor layers 12 and the P-type semiconductor layers 14 are alternately spaced apart on a side of the semiconductor substrate 10 corresponding to the second surface 3 in a direction parallel to the second surface 3. In this case, the N-type region 4 on the second surface 3 of the semiconductor substrate 1 is a region where the N-type semiconductor layer 12 is located, and the P-type region 5 on the second surface 3 of the semiconductor substrate 1 is a region where the P-type semiconductor layer 14 is located.

Specifically, the semiconductor substrate may be a semiconductor material substrate such as a silicon substrate, a silicon germanium substrate, or a germanium substrate. The semiconductor substrate may be an intrinsic conductive substrate, an N-type conductive substrate, or a P-type conductive substrate in terms of conductivity type. Preferably, the semiconductor substrate is an N-type conductive substrate or a P-type conductive substrate. Compared with the intrinsic conductive substrate, the N-type conductive substrate or the P-type conductive substrate has higher conductivity, is beneficial to reducing the series resistance of the back contact battery and improves the efficiency of the back contact battery. In terms of structure, as shown in part (1) of fig. 4, the first surface 2 of the semiconductor substrate 10 may be textured to improve the light trapping effect of the light-facing surface of the back contact battery, thereby improving the light utilization rate of the back contact battery. Of course, as shown in part (2) of fig. 4, the first face 2 of the semiconductor substrate 10 may also be planar. As for the second surface 3 of the semiconductor substrate 10, it may be a flat surface or a textured surface, and is not particularly limited herein.

As for the N-type semiconductor layer and the P-type semiconductor layer, as shown in fig. 3, the N-type semiconductor layer 12 and the P-type semiconductor layer 14 may be both formed within the semiconductor substrate 10. Alternatively, at least one of the N-type semiconductor layer and the P-type semiconductor layer is formed on the second face of the semiconductor substrate.

When the N-type semiconductor layer is formed on a portion of the semiconductor substrate corresponding to the N-type region, the material of the N-type semiconductor layer may be at least any semiconductor material as long as it can be applied to the back contact battery provided by the present utility model. For example: the material of the N-type semiconductor layer may be at least one of polycrystalline silicon, amorphous silicon, and microcrystalline silicon. In addition, when the P-type semiconductor layer is formed on a portion of the semiconductor substrate corresponding to the P-type region, the material of the P-type semiconductor layer may be at least any semiconductor material as long as it can be applied to the back contact battery provided in the present utility model. For example: the material of the P-type semiconductor layer may be at least one of polycrystalline silicon, amorphous silicon, and microcrystalline silicon.

Next, in a practical application process, as shown in fig. 5, when the N-type semiconductor layer 12 is formed on a portion of the semiconductor substrate 10 corresponding to the N-type region 4, the semiconductor base 1 may further include a first passivation layer 11 between the semiconductor substrate 10 and the N-type semiconductor layer 12. The first passivation layer 11 and the N-type semiconductor layer 12 may form a passivation contact structure to achieve excellent interface passivation and selective collection of electrons, so that the photoelectric conversion efficiency of the back contact battery provided by the utility model may be further improved.

Specifically, the material of the first passivation layer may be determined according to the material of the N-type semiconductor layer and the actual application scenario, which is not specifically limited herein. For example: in the case where the material of the N-type semiconductor layer is polysilicon, the material of the first passivation layer may be one or more of silicon oxide, aluminum oxide, titanium oxide, hafnium oxide, gallium oxide, tantalum pentoxide, niobium pentoxide, silicon nitride, silicon carbonitride, aluminum nitride, titanium nitride, and titanium carbonitride. Also for example: in the case where the material of the N-type semiconductor layer is amorphous silicon and/or microcrystalline silicon, the material of the first passivation layer is intrinsic amorphous silicon.

In addition, the thickness of the first passivation layer may be set according to actual requirements, which is not particularly limited herein.

As shown in fig. 6, when the P-type semiconductor layer 14 is formed on a portion of the semiconductor substrate 10 corresponding to the P-type region 5, the semiconductor base 1 may further include a second passivation layer 13 between the semiconductor substrate 10 and the P-type semiconductor layer 14. The second passivation layer 13 and the P-type semiconductor layer 14 can form a passivation contact structure to realize excellent interface passivation and selective collection of holes, so that the photoelectric conversion efficiency of the back contact battery provided by the utility model can be further improved.

Specifically, the material of the second passivation layer may refer to the material of the first passivation layer described above, and will not be described herein. In addition, the thickness of the second passivation layer is not particularly limited in the present utility model.

As shown in fig. 7, when the N-type semiconductor layer 12 is formed on a portion of the semiconductor substrate 10 corresponding to the N-type region 4 and the P-type semiconductor layer 14 is formed on a portion of the semiconductor substrate 10 corresponding to the P-type region 5, the above-described semiconductor base 1 may further include a first passivation layer 11 between the N-type semiconductor layer 12 and the semiconductor substrate 10, and a second passivation layer 13 between the P-type semiconductor layer 14 and the semiconductor substrate 10. At this time, the semiconductor substrate 1 includes: a semiconductor substrate 10, a first passivation layer 11, an N-type semiconductor layer 12, a second passivation layer 13, and a P-type semiconductor layer 14. The first passivation layer 11 and the N-type semiconductor layer 12 are sequentially stacked on a portion of the semiconductor substrate 10 corresponding to the N-type region 4 in the thickness direction of the semiconductor substrate 10. The second passivation layer 13 and the P-type semiconductor layer 14 are sequentially stacked on a portion of the semiconductor substrate 10 corresponding to the P-type region 5 in the thickness direction of the semiconductor substrate 10. In this case, the first passivation layer 11 and the N-type semiconductor layer 12, and the second passivation layer 13 and the P-type semiconductor layer 14 may respectively constitute corresponding passivation contact structures to achieve excellent interface passivation and selective collection of carriers, so that the photoelectric conversion efficiency of the back contact battery provided by the present utility model may be further improved.

In particular, in this case, the materials and thicknesses of the first passivation layer and the second passivation layer may be referred to as above, and will not be described herein. In addition, in this case, as shown in fig. 7, the semiconductor substrate 1 does not include a structure between the N-type semiconductor layer 12 and the P-type semiconductor layer 14. Alternatively, as shown in fig. 8 and 9, the semiconductor substrate 1 may further include an intrinsic semiconductor layer 15 thereon. The intrinsic semiconductor layer 15 is located between the isolation layer 9 and the semiconductor substrate 10. In this case, the surface of the corresponding portion of the semiconductor substrate 10 may be passivated by the intrinsic semiconductor layer 15, reducing the recombination rate of carriers at the region, and further improving the photoelectric conversion efficiency of the back contact cell.

The material of the intrinsic semiconductor layer may be any semiconductor material as long as the intrinsic semiconductor layer can be applied to the back contact battery provided by the embodiment of the present utility model. For example, the material of the intrinsic semiconductor layer may be the same as that of at least one of the N-type semiconductor layer and the P-type semiconductor layer.

Next, as shown in fig. 9, the above-mentioned semiconductor base may further include a third passivation layer 16 between the intrinsic semiconductor layer 15 and the semiconductor substrate 10. And the first passivation layer 11, the second passivation layer 13 and the third passivation layer 16 are integrally formed. In this case, after forming the corresponding passivation material covering the second surface of the semiconductor substrate 10 in an actual manufacturing process, the first passivation layer 11, the second passivation layer 13, and the third passivation layer 16 can be simultaneously obtained without patterning the corresponding passivation material, which is advantageous in simplifying the manufacturing process of the back contact battery. In addition, the third passivation layer 16 can passivate the surface of the semiconductor substrate 10 corresponding to the isolation region, so as to reduce the carrier recombination rate of the surface of the semiconductor substrate 10 corresponding to the isolation region and further improve the photoelectric conversion efficiency of the back contact battery.

For the above surface passivation layer, the surface passivation layer 7 may include only one strongly charged dielectric layer 8, as shown in fig. 2, from the structural aspect. Alternatively, as shown in fig. 9 to 11, the surface passivation layer 7 may further include a fourth passivation layer 17 formed on the above-mentioned strongly-charged dielectric layer 8. The fourth passivation layer 17 may be any dielectric layer of a material different from the strongly charged dielectric layer 8 described above.

In terms of the formation location, as shown in fig. 2, the surface passivation layer 7 may be formed only on the N-type region 4 and the P-type region 5. Alternatively, as shown in fig. 9 to 11, the surface passivation layer 7 may cover the N-type region, the P-type region, and the isolation layer 9. In this case, since the isolation layer 9 is formed on the isolation region and the second face of the semiconductor substrate has the N-type region, the P-type region, and the isolation region, when the surface passivation layer 7 is covered on the N-type region, the P-type region, and the isolation layer 9, the surface passivation layer 7 is covered on the entire second face. At this time, after the passivation material for manufacturing the surface passivation layer 7 is covered on the second surface, the surface passivation layer 7 can be obtained without patterning at least part of the passivation material, so that the manufacturing process of the back contact battery can be simplified, the manufacturing difficulty of the back contact battery can be reduced, and the manufacturing cost of the back contact battery can be reduced.

In addition, the material and thickness of the surface passivation layer may be set according to the actual application scenario, and are not particularly limited herein.

The formation position of the isolation layer may be determined according to the specific structure of the semiconductor substrate, so long as the isolation layer can isolate at least a portion of the semiconductor substrate corresponding to the isolation region from the surface passivation layer. For example: as shown in fig. 9, in the case where the semiconductor substrate further includes the above-mentioned intrinsic semiconductor layer 15, the isolation layer 9 may be formed on the intrinsic semiconductor layer 15. Also for example: as shown in fig. 10 and 11, the above-described isolation layer 9 may also be formed directly on a portion of the semiconductor substrate 10 corresponding to the isolation region.

In addition, as shown in fig. 10 and 11, when the semiconductor substrate does not include the intrinsic semiconductor layer 15, the isolation layer 9 may be located at least between the N-type semiconductor layer 12 and the P-type semiconductor layer 14. In this case, the isolation layer 9 is at least one of a neutral dielectric layer and a weakly charged dielectric layer, and the above neutral dielectric layer and the weakly charged dielectric layer have good insulating properties. Based on this, when the isolation layer 9 is at least located between the N-type semiconductor layer 12 and the P-type semiconductor layer 14, the isolation layer 9 can isolate the N-type semiconductor layer 12 from the P-type semiconductor layer 14, so as to reduce the lateral carrier recombination rate between the N-type semiconductor layer 12 and the P-type semiconductor layer 14, and further improve the photoelectric conversion efficiency of the back contact cell.

The isolation layer may be a neutral dielectric layer alone, or the isolation layer may be a weak charge dielectric layer alone, or the isolation layer may be composed of a neutral dielectric layer and a weak charge dielectric layer together. When the isolation layer is formed by the neutral dielectric layer and the weak charge dielectric layer, the neutral dielectric layer and the weak charge dielectric layer and the arrangement manner between them can be determined according to the actual application scenario, and are not specifically limited herein. For example: in the isolation layer, the neutral dielectric layer and the weakly charged dielectric layer may be sequentially arranged in the thickness direction of the semiconductor substrate. Also for example: in the isolation layer, the neutral dielectric layer and the weakly charged dielectric layer may be sequentially arranged in a direction parallel to the second surface.

In the case of the above-described technical solution, as shown in fig. 2 and fig. 9 to 11, the back contact battery includes the surface passivation layer 7 formed at least on the N-type region 4 and the P-type region 5 provided on the second surface 3 of the semiconductor substrate 1. And, the surface passivation layer 7 includes a strongly charged dielectric layer 8 in contact with at least the N-type region 4 and the P-type region 5. Based on the above, the strong-charge dielectric layer 8 has the advantages of higher surface hydrogen content, higher fixed charge density and the like, so that the passivation effect of the strong-charge dielectric layer 8 on one side of the backlight is better, the recombination rate of carriers on the surfaces of the N-type region 4 and the P-type region 5 can be reduced, and the photoelectric conversion efficiency of the back contact battery is improved. In addition, the fixed charge density in the neutral dielectric layer and the weakly charged dielectric layer is lower than in the strongly charged dielectric layer 8, and both cannot form a conductive path at the interface itself in contact with the semiconductor substrate 1. Based on this, when the back contact battery further includes the isolation layer 9 formed on the isolation region 6, and the isolation layer 9 is at least one of a neutral dielectric layer and a weakly charged dielectric layer, the presence of the isolation layer 9 can isolate at least the portion of the semiconductor substrate 1 corresponding to the isolation region 6 from the surface passivation layer 7, thereby preventing the surface passivation layer 7 from contacting the portion of the semiconductor substrate 1 corresponding to the isolation region 6 to form a stable conductive channel between the N-type region 4 and the P-type region 5, which can allow carriers to be transferred, reduce the carrier recombination rate between the N-type region 4 and the P-type region 5, inhibit electric leakage, and simultaneously reduce the risk of hot spot problem of the back contact battery, thereby facilitating improvement of the electrical performance of the back contact battery.

From the above, it can be seen that the fixed charge density of the medium layer with strong charge is higher, and the fixed charge density of the medium layer with weak charge is lower, and the specific fixed charge densities of the two may be determined according to the practical application scenario. In addition, specific materials of the medium layer with strong charge, the medium layer with neutral charge and the medium layer with weak charge can be set according to practical application scenes, and are not particularly limited herein.

Exemplary, the weak charge dielectric layer has a fixed charge density of 10 or less ¹¹ cm ^-2 . For example: the fixed charge density of the weakly charged dielectric layer was 10 ¹¹ cm ^-2 、8×10 ¹⁰ cm ^-2 、6×10 ¹⁰ cm ^-2 Or 5X 10 ¹⁰ cm ^-2 Etc. In this case, the fixed charge density of the weakly charged dielectric layer is within the above range, which can prevent the formation of a conductive channel between the isolation layer and the portion of the semiconductor substrate corresponding to the isolation region due to the relatively high fixed charge density in the weakly charged dielectric layer, thereby ensuring that the N-type region and the P-type region can be prevented from being directly conducted through the isolation layer and ensuring that the back contact battery has relatively high photoelectric conversion efficiency.

Exemplary, the fixed charge density of the dielectric layer with strong charge is greater than or equal to 10 ¹² cm ^-2 . For example: the fixed charge density of the dielectric layer with strong charge is 10 ¹² cm ^-2 、5×10 ¹² cm ^-2 、7×10 ¹² cm ^-2 Or 9X 10 ¹² cm ^-2 Etc. In this case, the fixed charge density of the strongly charged dielectric layer is within the above range, so that the field passivation effect of the N-type region and the P-type region is not good due to the fact that the electric field intensity formed at the interface where the N-type region and the P-type region are in contact with the semiconductor substrate is low due to the fact that the fixed charge density of the strongly charged dielectric layer is low, the surface carrier recombination rate of the N-type region and the P-type region is reduced, and further the back contact battery is guaranteed to have high photoelectric conversion efficiency.

Illustratively, the electrically neutral dielectric layer may be a thermally grown silicon dioxide layer. In this case, the thermally grown silicon dioxide layer is a common electrically neutral dielectric layer, while the thermally grown silicon dioxide layer has good passivation. Based on the above, when the electrically neutral dielectric layer is a thermally grown silicon dioxide layer, the manufacturing difficulty of the back contact battery can be reduced, and meanwhile, the passivation can be performed on the part of the semiconductor substrate corresponding to the isolation region, so that the recombination rate of carriers on the surface of the isolation region is reduced, and the photoelectric conversion efficiency of the back contact battery is further improved.

Illustratively, the weakly charged dielectric layer is at least one of a silicon oxynitride layer and a silicon carbide layer. Under the condition, the weakly charged dielectric layer has various alternative schemes, so that the method is beneficial to selecting a proper scheme according to the requirements of different practical application scenes, and improves the applicability of the back contact battery provided by the utility model under different application scenes.

In particular, in this case, when the weakly charged dielectric layer is formed by the silicon oxynitride layer and the silicon carbide layer together, the dimensions of the silicon oxynitride layer and the silicon carbide layer, and the arrangement manner therebetween may be set according to actual requirements. For example: in the weakly charged dielectric layer, the silicon oxynitride layer and the silicon carbide layer may be sequentially arranged in the thickness direction of the semiconductor substrate. Alternatively, the silicon oxynitride layer and the silicon carbide layer may be sequentially arranged in a direction parallel to the second face.

Illustratively, the strongly charged dielectric layer is at least one of an aluminum oxide layer, a silicon nitride layer, and a zirconium oxide layer. In this case, the alumina layer and the zirconia layer are dielectric layers having negative fixed charges, and the silicon nitride layer is a dielectric layer having positive fixed charges. In addition, the principle of field passivation on the backlight side of the semiconductor substrate through the dielectric layer with strong charges is that an electric field is formed at the interface of the dielectric layer with strong charges, and the concentration of free electrons or holes at the interface is reduced through the electric field, so that the aim of reducing the carrier recombination rate is fulfilled. Based on the above, in the case that the dielectric layer with strong charges is at least one of an alumina layer, a silicon nitride layer and a zirconia layer, the dielectric layer with proper materials can be selected according to the doping type and other requirements of the semiconductor substrate in the practical application scene, so that the surface passivation layer has higher passivation effect, and meanwhile, the applicability of the back contact battery provided by the utility model in different application scenes can be improved.

Specifically, in this case, when the dielectric layer with strong charge is at least two of an alumina layer, a silicon nitride layer and a zirconia layer, the size and arrangement manner of the dielectric layers with strong charge in the dielectric layers with strong charge may be set according to actual requirements, which is not specifically limited herein.

In the practical application process, the thickness of the isolation layer influences the isolation effect of the isolation layer. Specifically, within a certain range, the smaller the thickness of the isolation layer, the worse the isolation effect it has. Based on the method, the thickness of the isolation layer can be determined according to the requirement of the isolation effect on the isolation layer in the practical application scene.

The thickness of the isolation layer is 1nm or more and 100nm or less. For example: the thickness of the isolation layer may be 1nm, 10n, 30nm, 60nm, 90nm, 100nm, or the like. In this case, the thickness of the isolation layer is within the above range, so that when the highly charged dielectric layer is further formed on the isolation layer, the portion of the highly charged dielectric layer corresponding to the isolation region due to the smaller thickness of the isolation layer is prevented from still being able to induce the conductive path, and the portion of the semiconductor substrate corresponding to the isolation region is ensured to be isolated from the surface passivation layer by the isolation layer. Meanwhile, the waste of materials caused by the larger thickness of the isolation layer can be prevented, and the manufacturing cost is reduced. And, it is also possible to prevent the influence on the formation of other structures such as an electrode structure, the subsequent operation such as interconnection, and the like.

As a possible implementation manner, as shown in fig. 9 to 11, the semiconductor substrate further includes a light facing passivation layer 18 formed on the first surface of the semiconductor substrate, so as to reduce a recombination rate of carriers on the first surface side of the semiconductor substrate, and further improve a photoelectric conversion efficiency of the back contact battery. Specifically, the material of the light-facing passivation layer 18 may include at least any passivation material such as silicon dioxide, silicon nitride, and aluminum oxide. The thickness of the light-facing passivation layer 18 can be set according to practical requirements.

As a possible implementation, as shown in fig. 9 to 11, the above-mentioned back contact battery further includes a positive electrode 19 and a negative electrode 20 disposed on the side of the second face of the semiconductor substrate so as to conduct out the collected carriers. Wherein a positive electrode 19 is formed on the P-type region and a negative electrode 20 is formed on the N-type region. The materials of positive electrode 19 and negative electrode 20 may be conductive materials of silver, aluminum, or copper.

The foregoing is merely illustrative of the present utility model, and the present utility model is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present utility model. Therefore, the protection scope of the present utility model shall be subject to the protection scope of the claims.

Claims

1. A back contact battery, comprising:

a semiconductor substrate having opposite first and second sides; the second face is provided with N-type regions and P-type regions which are alternately distributed at intervals along the direction parallel to the second face, and isolation regions positioned between each N-type region and the corresponding P-type region;

the surface passivation layer is formed on at least the N-type region and the P-type region; the surface passivation layer comprises a dielectric layer with strong charge, which is at least in contact with the N-type region and the P-type region;

an isolation layer formed on the isolation region; the isolation layer is at least one of a neutral dielectric layer and a weakly charged dielectric layer; the isolation layer is used for isolating at least a part of the semiconductor substrate corresponding to the isolation region from the surface passivation layer.

2. The back contact battery of claim 1, wherein the weak charge dielectric layer has a fixed charge density of 10 or less ¹¹ cm ^-2 The method comprises the steps of carrying out a first treatment on the surface of the And/or the number of the groups of groups,

the fixed charge density of the medium layer with strong charge is more than or equal to 10 ¹² cm ^-2 。

3. The back contact battery of claim 1, wherein the electrically neutral dielectric layer is a thermally grown silicon dioxide layer; and/or the number of the groups of groups,

the medium layer with weak charge is at least one of a silicon oxynitride layer and a silicon carbide layer; and/or the number of the groups of groups,

the dielectric layer with strong charge is at least one of an alumina layer, a silicon nitride layer and a zirconia layer.

4. The back contact battery of claim 1, wherein the thickness of the separator is 1nm or more and 100nm or less.

5. The back contact battery of claim 1, wherein the surface passivation layer overlies the N-type region, the P-type region, and the isolation layer.

6. The back contact battery of any one of claims 1-5, wherein the semiconductor substrate comprises: a semiconductor substrate;

sequentially stacking a first passivation layer and an N-type semiconductor layer, which are arranged on a part of the semiconductor substrate corresponding to the N-type region, along the thickness direction of the semiconductor substrate;

and sequentially stacking a second passivation layer and a P-type semiconductor layer which are arranged on a part of the semiconductor substrate corresponding to the P-type region along the thickness direction of the semiconductor substrate.

7. The back contact battery of claim 6, wherein the isolation layer is located at least between the N-type semiconductor layer and the P-type semiconductor layer.

8. The back contact battery of claim 6, wherein the semiconductor substrate further comprises an intrinsic semiconductor layer thereon; the intrinsic semiconductor layer is located between the isolation layer and the semiconductor substrate.

9. The back contact battery of claim 8, wherein the semiconductor base further comprises a third passivation layer between the intrinsic semiconductor layer and the semiconductor substrate; the first passivation layer, the second passivation layer and the third passivation layer are integrally formed.

10. A photovoltaic module comprising a back contact cell according to any one of claims 1 to 9.