CN218919981U - Low-resistance nonpolar direct current access circuit - Google Patents
Low-resistance nonpolar direct current access circuit Download PDFInfo
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- CN218919981U CN218919981U CN202222861114.8U CN202222861114U CN218919981U CN 218919981 U CN218919981 U CN 218919981U CN 202222861114 U CN202222861114 U CN 202222861114U CN 218919981 U CN218919981 U CN 218919981U
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Abstract
The utility model discloses a low-resistance nonpolar direct current access circuit which is provided with an input positive electrode, an input negative electrode, an output positive electrode, an output negative electrode, a first PMOS tube reverse connection protection circuit, a first NMOS tube reverse connection protection circuit, a second PMOS tube reverse connection protection circuit and a second NMOS tube reverse connection protection circuit. When the input is connected positively, the current flows to the first PMOS tube reverse connection protection circuit through the input positive electrode, then reaches the output positive electrode, passes through the load, and then returns to the input negative electrode through the first NMOS tube reverse connection protection circuit. When the input is reversely connected, the current flows to the second PMOS tube reverse connection protection circuit through the input negative electrode (namely reversely connected with the input positive electrode), then reaches the output positive electrode, passes through the load, and returns to the input positive electrode (namely reversely connected with the input negative electrode) through the second NMOS tube reverse connection protection circuit. Therefore, no matter the input end is connected in the positive and reverse directions, the positive electrode and the negative electrode of the output end are unchanged, the non-polar power supply access function is realized, and the advantages of low power consumption, small impedance, small voltage drop and small loss are realized.
Description
Technical Field
The utility model relates to the technical field of direct current reverse connection protection circuits, in particular to a low-resistance nonpolar direct current access circuit.
Background
In dc circuits or electrical systems, the dc input circuit is connected in reverse, which can lead to burning of the circuit or electrical component, for which purpose, a reverse input protection circuit is provided in both dc circuits or electrical systems. The reverse connection input protection circuit for the direct current power supply in the prior art mainly comprises: diode or MOS tube reverse connection protection circuit, diode bridge type rectifier circuit, etc.
The current diode or MOS tube reverse connection protection circuit is generally composed of a single diode or a single MOS tube, when a power supply is in reverse connection, the circuit is not electrified, so that the circuit or an electric element is effectively prevented from being damaged, but when the power supply is in forward connection, the voltage drop of the diode or the MOS tube is large, and therefore the electric energy loss is large. The diode bridge rectifier circuit can also play a role in reverse connection input protection, so that when the direct current power supply is input in a non-polar state, the output polarity is unchanged, and the circuit can work, but the voltage drop of the diode bridge rectifier circuit is larger than that of a diode or a single MOS tube reverse connection protection circuit, so that the electric energy loss is larger.
Disclosure of Invention
Aiming at the defects in the prior art, the utility model aims to solve the technical problems that: the low-resistance nonpolar direct current access circuit solves the technical problems of large voltage drop and large electric energy loss of the traditional reverse connection protection circuit.
In order to solve the technical problems, the utility model adopts the following technical scheme:
the low-resistance nonpolar direct current access circuit is provided with an input positive electrode, an input negative electrode, an output positive electrode and an output negative electrode, wherein the input positive electrode and the input negative electrode are used for being connected with a direct current power supply, and the output positive electrode and the output negative electrode are used for being connected with a load; the device also comprises a first PMOS tube reverse connection protection circuit, a first NMOS tube reverse connection protection circuit, a second PMOS tube reverse connection protection circuit and a second NMOS tube reverse connection protection circuit.
The first PMOS tube reverse connection protection circuit comprises a PMOS1, a voltage stabilizing diode D1 is arranged between a grid electrode and a source stage of the PMOS1, an anode of the voltage stabilizing diode D1 is connected with the grid electrode of the PMOS1, a cathode of the voltage stabilizing diode D1 is connected with the source stage of the PMOS1, a resistor R2 is connected in series on the grid electrode of the PMOS1, a drain electrode of the PMOS1 is connected with an input positive electrode, the source stage of the PMOS1 is connected with an output positive electrode, and a grid electrode of the PMOS1 is connected with an input negative electrode;
the second PMOS tube reverse connection protection circuit comprises a PMOS3, a voltage stabilizing diode D3 is arranged between a grid electrode and a source stage of the PMOS3, an anode of the voltage stabilizing diode D3 is connected with the grid electrode of the PMOS3, a cathode of the voltage stabilizing diode D is connected with the source stage of the PMOS3, a resistor R1 is connected in series on the grid electrode of the PMOS3, a drain electrode of the PMOS3 is connected with an input negative electrode, the source stage of the PMOS3 is connected with an output positive electrode, and the grid electrode of the PMOS3 is connected with an input positive electrode;
the first NMOS tube reverse connection protection circuit comprises an NMOS2, a zener diode D2 is arranged between a grid electrode and a source stage of the NMOS2, an anode of the zener diode D2 is connected with the source stage of the NMOS2, a cathode of the zener diode D is connected with the grid electrode of the NMOS2, a resistor R4 is connected in series on the grid electrode of the NMOS2, a drain electrode of the NMOS2 is connected with an input negative electrode, the source stage of the NMOS2 is connected with an output negative electrode, and the grid electrode of the zener diode D2 is connected with an input positive electrode;
the second NMOS tube reverse connection protection circuit comprises an NMOS4, a voltage stabilizing diode D4 is arranged between a grid electrode and a source electrode of the NMOS4, an anode of the voltage stabilizing diode D4 is connected with the source electrode of the NMOS4, a cathode of the voltage stabilizing diode D is connected with the grid electrode of the NMOS4, a resistor R5 is connected in series with the grid electrode of the NMOS4, a drain electrode of the NMOS4 is connected with an input positive electrode, the source electrode of the NMOS4 is connected with an output negative electrode, and the grid electrode of the NMOS is connected with an input negative electrode.
As optimization, PMOS tubes with the conduction voltage of 0.9V are adopted for the PMOS1 and the PMOS3, NMOS tubes with the conduction voltage of 0.9V are adopted for the NMOS2 and the NMOS4, the resistance values of the resistors R2, R1, R4 and R5 are 10kΩ -1MΩ, and the voltage stabilizing values of the voltage stabilizing diodes D1, D2, D3 and D4 are smaller than 5V.
As optimization, the PMOS1 and the PMOS3 adopt PMOS transistors with 3.5V on-state voltage, the NMOS2 and the NMOS4 adopt NMOS transistors with 1.8V on-state voltage, the resistance values of the resistors R2, R1, R4 and R5 are 10kΩ -1mΩ, and the voltage stabilizing values of the zener diodes D1, D2, D3 and D4 are less than 8V.
Compared with the prior art, the application has the following beneficial effects:
the access circuit comprises 2 PMOS tube reverse connection protection circuits and 2 NMOS tube reverse connection protection circuits, when the input is in positive connection, current flows to the first PMOS tube reverse connection protection circuit through the input positive electrode, then reaches the output positive electrode, then passes through the load, and then returns to the input negative electrode through the first NMOS tube reverse connection protection circuit. When the input is reversely connected, the current flows to the second PMOS tube reverse connection protection circuit through the input negative electrode (namely reversely connected with the input positive electrode), then reaches the output positive electrode, passes through the load, and returns to the input positive electrode (namely reversely connected with the input negative electrode) through the second NMOS tube reverse connection protection circuit. Therefore, no matter the input end is connected in the positive and reverse directions, the positive electrode and the negative electrode of the output end are unchanged, and the non-polarity power supply access function is realized.
When the circuit works, the impedance is composed of the conduction impedance of a PMOS tube and an NMOS tube, and the conduction impedance of the PMOS tube and the NMOS tube can be very low and far lower than that of a diode, so that the low-impedance nonpolar power supply access function can be realized. The utility model is suitable for the nonpolar access protection of the direct current power supply, has the advantages of low power consumption, small impedance, small voltage drop and small loss, and can be applied to instruments and meters powered by various direct current power supplies (battery power supplies, switch power supplies and the like), and the power supplies can be electrified to work when the power supplies are connected in positive and reverse directions.
Drawings
Fig. 1 is a circuit diagram of the present utility model.
Detailed Description
The present utility model will be described in further detail with reference to the accompanying drawings.
The specific implementation method comprises the following steps: with reference to figure 1 of the drawings,
the low-resistance nonpolar direct current access circuit is provided with an input positive electrode, an input negative electrode, an output positive electrode and an output negative electrode, wherein the input positive electrode and the input negative electrode are used for being connected with a direct current power supply, and the output positive electrode and the output negative electrode are used for being connected with a load; the device also comprises a first PMOS tube reverse connection protection circuit, a first NMOS tube reverse connection protection circuit, a second PMOS tube reverse connection protection circuit and a second NMOS tube reverse connection protection circuit.
The first PMOS tube reverse connection protection circuit comprises a PMOS1, a voltage stabilizing diode D1 is arranged between a grid electrode and a source stage of the PMOS1, an anode of the voltage stabilizing diode D1 is connected with the grid electrode of the PMOS1, a cathode of the voltage stabilizing diode D1 is connected with the source stage of the PMOS1, a resistor R2 is connected in series on the grid electrode of the PMOS1, a drain electrode of the PMOS1 is connected with an input positive electrode, the source stage of the PMOS1 is connected with an output positive electrode, and a grid electrode of the PMOS1 is connected with an input negative electrode;
the second PMOS tube reverse connection protection circuit comprises a PMOS3, a voltage stabilizing diode D3 is arranged between a grid electrode and a source stage of the PMOS3, an anode of the voltage stabilizing diode D3 is connected with the grid electrode of the PMOS3, a cathode of the voltage stabilizing diode D is connected with the source stage of the PMOS3, a resistor R1 is connected in series on the grid electrode of the PMOS3, a drain electrode of the PMOS3 is connected with an input negative electrode, the source stage of the PMOS3 is connected with an output positive electrode, and the grid electrode of the PMOS3 is connected with an input positive electrode;
the first NMOS tube reverse connection protection circuit comprises an NMOS2, a zener diode D2 is arranged between a grid electrode and a source stage of the NMOS2, an anode of the zener diode D2 is connected with the source stage of the NMOS2, a cathode of the zener diode D is connected with the grid electrode of the NMOS2, a resistor R4 is connected in series on the grid electrode of the NMOS2, a drain electrode of the NMOS2 is connected with an input negative electrode, the source stage of the NMOS2 is connected with an output negative electrode, and the grid electrode of the zener diode D2 is connected with an input positive electrode;
the second NMOS tube reverse connection protection circuit comprises an NMOS4, a voltage stabilizing diode D4 is arranged between a grid electrode and a source electrode of the NMOS4, an anode of the voltage stabilizing diode D4 is connected with the source electrode of the NMOS4, a cathode of the voltage stabilizing diode D is connected with the grid electrode of the NMOS4, a resistor R5 is connected in series with the grid electrode of the NMOS4, a drain electrode of the NMOS4 is connected with an input positive electrode, the source electrode of the NMOS4 is connected with an output negative electrode, and the grid electrode of the NMOS is connected with an input negative electrode.
As shown in FIG. 1, the access circuit of the utility model is composed of 2 PMOS tube reverse connection protection circuits and 2 NMOS tube reverse connection protection circuits, when the input is in positive connection, current flows to the first PMOS tube reverse connection protection circuit through the input positive electrode, then reaches the output positive electrode, then passes through the load, and then returns to the input negative electrode through the first NMOS tube reverse connection protection circuit. When the input is reversely connected, the current flows to the second PMOS tube reverse connection protection circuit through the input negative electrode (namely reversely connected with the input positive electrode), then reaches the output positive electrode, passes through the load, and returns to the input positive electrode (namely reversely connected with the input negative electrode) through the second NMOS tube reverse connection protection circuit. Therefore, no matter the input end is connected in the positive and reverse directions, the positive electrode and the negative electrode of the output end are unchanged, and the non-polarity power supply access function is realized.
Specifically, as shown in fig. 1, the input positive electrode and the input negative electrode of the circuit are VIN1, VIN2, VIN1 and VIN2 respectively, and can be connected with the positive electrode or the negative electrode of a dc power supply, and the output ends are VOUT and GND1, where VOUT is the output positive electrode, and GND1 is the output negative electrode.
The PMOS1, the R2 and the D1 form a PMOS1 reverse connection protection circuit, the D1 is a voltage stabilizing diode, overvoltage protection is carried out between grid sources of the PMOS1 tube, and overvoltage damage of the PMOS1 tube is prevented; the PMOS3, the R1 and the D3 form a PMOS3 reverse connection protection circuit, the D3 is a voltage stabilizing diode, overvoltage protection is carried out between grid sources of the PMOS3 tube, and overvoltage damage of the PMOS3 tube is prevented; NMOS2, R4 and D2 form an NMOS2 reverse connection protection circuit, D2 is a voltage stabilizing diode, overvoltage protection is carried out between grid sources of the NMOS2 tube, and overvoltage damage of the NMOS2 tube is prevented; NMOS4, R5 and D4 form an NMOS4 reverse connection protection circuit, D4 is a voltage stabilizing diode, overvoltage protection is carried out between grid sources of NMOS4 tubes, and overvoltage damage of the NMOS4 tubes is prevented.
When VIN1 is connected with the positive electrode of the power supply, the voltage of the grid electrode and the source electrode of the PMOS1 is larger than the voltage required for conduction, the PMOS1 is conducted, the voltage of the VOUT is close to the voltage of the direct-current power supply, therefore, the voltage of the grid electrode and the source electrode of the PMOS3 is close to 0V, and the PMOS3 is cut off. The grid electrode of the NMOS2 is connected to VIN1 through a resistor R4, the voltage difference between the grid electrode and the source electrode is larger than the voltage required by conduction, and the NMOS2 is conducted. The gate of NMOS4 is connected to VIN2 through resistor R5, the gate-source voltage difference is approximately 0V, and NMOS4 is turned off. To sum up, when the power supply is connected positively (VIN 1 is positive, VIN2 is negative), PMOS1 and NMOS2 are conducted, VOUT outputs the positive power supply, and GND1 outputs the negative power supply. Conversely, when the power is reversely connected (VIN 1 is the negative electrode and VIN2 is the positive electrode), the PMOS3 and the NMOS4 are conducted, the VOUT outputs the positive electrode of the power, and the GND1 outputs the negative electrode of the power. Therefore, the non-polar power supply access function is realized, the MOS tube with the proper gate-source electrode conduction voltage difference is selected, the low-impedance output of the circuit can be realized, the voltage drop is small, and the electric energy loss is small.
The optimal mode for realizing the utility model comprises a MOS tube with low impedance and a voltage stabilizing protection diode group circuit which is suitable for the maximum voltage difference of the grid electrode and the source electrode of the MOS tube.
Specifically, example 1: PMOS1 and PMOS3 adopt PMOS pipe SI2329 with the on-voltage low to 0.9V, NMOS2 and NMOS4 adopt NMOS pipe SI2342 with the on-voltage low to 0.9V, the on-resistance is close to 0.12Ω, the resistance of resistors R2, R1, R4 and R5 is 10kΩ -1MΩ, and the voltage stabilizing diodes D1, D2, D3 and D4 adopt voltage stabilizing diodes with voltage stabilizing values smaller than 5V. The non-polar access of the 0.9V low-voltage power supply can be realized, and the on-resistance is close to 0.12 omega.
Example 2: PMOS1 and PMOS3 adopt the PMOS pipe AO3407 that switch-on voltage is low to 3.5V, NMOS2 and NMOS4 adopt the NMOS pipe AO3416 that switch-on voltage is low to 1.8V, and on-resistance is close 0.04 Ω, resistance of resistance R2, R1, R4, R5 is 10kΩ -1MΩ, zener diode D1, D2, D3, D4 adopts the zener diode that is less than 8V steady voltage value. The non-polarity access of the 20V direct current power supply can be realized, and the on-resistance is close to 0.04 omega.
The resistors R1, R2, R4 and R5 respectively connect the grid electrodes of the PMOS and NMOS transistors to the positive electrode or the negative electrode of the input power supply to form the voltage difference between the grid electrodes, the drain electrode and the source electrode pins on the MOS transistors, and control the connection and the disconnection of the two MOS transistors, so that a circuit formed by a single group of MOS transistors, the resistor and the voltage-stabilizing diode has a reverse connection protection function, and the function is equivalent to that of the diode. The voltage regulator is connected with the voltage regulator diodes in series, so that the voltage between the voltage regulator diodes is in the operating voltage range of the MOS tube, and the MOS tube is protected.
When the circuit works, the impedance is composed of the conduction impedance of the PMOS tube and the conduction impedance of the NMOS tube, and the conduction impedance of the PMOS tube and the conduction impedance of the NMOS tube can be very low and far lower than that of the diode, so that the low-impedance nonpolar power supply access function can be realized. The utility model is suitable for the nonpolar access protection of the direct current power supply, has the advantages of low power consumption, small impedance, small voltage drop and small loss, and can be applied to instruments and meters powered by various direct current power supplies (battery power supplies, switch power supplies and the like), and the power supplies can be electrified to work when the power supplies are connected in positive and reverse directions.
While embodiments of the present utility model have been shown and described, it will be apparent to those skilled in the art that various changes, modifications, substitutions and alterations can be made herein without departing from the principles and spirit of the utility model, the scope of which is defined by the appended claims and their equivalents, and thus the embodiments of the utility model are to be considered illustrative of the utility model and not limited in any way.
Claims (3)
1. The low-resistance nonpolar direct current access circuit is provided with an input positive electrode, an input negative electrode, an output positive electrode and an output negative electrode, wherein the input positive electrode and the input negative electrode are used for being connected with a direct current power supply, and the output positive electrode and the output negative electrode are used for being connected with a load; the device is characterized by further comprising a first PMOS tube reverse connection protection circuit, a first NMOS tube reverse connection protection circuit, a second PMOS tube reverse connection protection circuit and a second NMOS tube reverse connection protection circuit;
the first PMOS tube reverse connection protection circuit comprises a PMOS1, a voltage stabilizing diode D1 is arranged between a grid electrode and a source stage of the PMOS1, an anode of the voltage stabilizing diode D1 is connected with the grid electrode of the PMOS1, a cathode of the voltage stabilizing diode D1 is connected with the source stage of the PMOS1, a resistor R2 is connected in series on the grid electrode of the PMOS1, a drain electrode of the PMOS1 is connected with an input positive electrode, the source stage of the PMOS1 is connected with an output positive electrode, and a grid electrode of the PMOS1 is connected with an input negative electrode;
the second PMOS tube reverse connection protection circuit comprises a PMOS3, a voltage stabilizing diode D3 is arranged between a grid electrode and a source stage of the PMOS3, an anode of the voltage stabilizing diode D3 is connected with the grid electrode of the PMOS3, a cathode of the voltage stabilizing diode D is connected with the source stage of the PMOS3, a resistor R1 is connected in series on the grid electrode of the PMOS3, a drain electrode of the PMOS3 is connected with an input negative electrode, the source stage of the PMOS3 is connected with an output positive electrode, and the grid electrode of the PMOS3 is connected with an input positive electrode;
the first NMOS tube reverse connection protection circuit comprises an NMOS2, a zener diode D2 is arranged between a grid electrode and a source stage of the NMOS2, an anode of the zener diode D2 is connected with the source stage of the NMOS2, a cathode of the zener diode D is connected with the grid electrode of the NMOS2, a resistor R4 is connected in series on the grid electrode of the NMOS2, a drain electrode of the NMOS2 is connected with an input negative electrode, the source stage of the NMOS2 is connected with an output negative electrode, and the grid electrode of the zener diode D2 is connected with an input positive electrode;
the second NMOS tube reverse connection protection circuit comprises an NMOS4, a voltage stabilizing diode D4 is arranged between a grid electrode and a source electrode of the NMOS4, an anode of the voltage stabilizing diode D4 is connected with the source electrode of the NMOS4, a cathode of the voltage stabilizing diode D is connected with the grid electrode of the NMOS4, a resistor R5 is connected in series with the grid electrode of the NMOS4, a drain electrode of the NMOS4 is connected with an input positive electrode, the source electrode of the NMOS4 is connected with an output negative electrode, and the grid electrode of the NMOS is connected with an input negative electrode.
2. The low-resistance nonpolar direct current access circuit according to claim 1, wherein the PMOS1 and the PMOS3 adopt PMOS transistors with a turn-on voltage of 0.9V, the NMOS2 and the NMOS4 adopt NMOS transistors with a turn-on voltage of 0.9V, the resistances of the resistors R2, R1, R4, and R5 are 10kΩ -1mΩ, and the voltage stabilizing values of the voltage stabilizing diodes D1, D2, D3, and D4 are less than 5V.
3. The low-resistance nonpolar direct current access circuit according to claim 1, wherein the PMOS1 and the PMOS3 adopt PMOS transistors with 3.5V on voltage, the NMOS2 and the NMOS4 adopt NMOS transistors with 1.8V on voltage, the resistance values of the resistors R2, R1, R4 and R5 are 10kΩ -1mΩ, and the voltage stabilizing values of the voltage stabilizing diodes D1, D2, D3 and D4 are less than 8V.
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CN202222861114.8U CN218919981U (en) | 2022-10-28 | 2022-10-28 | Low-resistance nonpolar direct current access circuit |
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CN202222861114.8U CN218919981U (en) | 2022-10-28 | 2022-10-28 | Low-resistance nonpolar direct current access circuit |
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CN202222861114.8U Active CN218919981U (en) | 2022-10-28 | 2022-10-28 | Low-resistance nonpolar direct current access circuit |
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