CN218831249U - Quantum bit circuit and quantum bit device - Google Patents

Quantum bit circuit and quantum bit device Download PDF

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CN218831249U
CN218831249U CN202223091439.9U CN202223091439U CN218831249U CN 218831249 U CN218831249 U CN 218831249U CN 202223091439 U CN202223091439 U CN 202223091439U CN 218831249 U CN218831249 U CN 218831249U
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qubit
superconducting
ground
conductive
plate
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请求不公布姓名
张辉
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Origin Quantum Computing Technology Co Ltd
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Origin Quantum Computing Technology Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/60Superconducting electric elements or equipment; Power systems integrating superconducting elements or equipment

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Abstract

The utility model discloses a quantum bit circuit and quantum bit device. The qubit circuit includes: ground electrode plate and capacitance to ground board: the first conductive disc is electrically connected with a first superconducting layer in the two superconducting layers of the Josephson junction and forms a coupling capacitor with the grounding electrode plate; and the second conductive disc is electrically connected with the second superconducting layer in the two superconducting layers and forms a coupling capacitor with the ground capacitor plate. A qubit device includes qubit circuitry and at least one josephson junction. In this way, the utility model discloses can simplify the structure of josephson junction's wiring department, reduce the technology complexity.

Description

Quantum bit circuit and quantum bit device
Technical Field
The utility model relates to a quantum chip field especially relates to a quantum bit circuit and quantum bit device.
Background
As a key element of a superconducting quantum chip, the Josephson junction is a structure formed by three layers of thin films, namely a superconducting layer, a barrier layer and a superconducting layer. In the superconducting qubit system, a Josephson junction, a grounding electrode plate, a ground capacitor plate and the like are electrically connected to form a qubit device.
In order to realize electrical connection conveniently, a pad structure with a large area is usually formed at a connection point of a superconducting layer of a josephson junction, and when the josephson junction is electrically connected with a grounding electrode plate and a ground capacitor plate, oxide layers on the surfaces of the grounding electrode plate and the ground capacitor plate need to be etched away, and then the pad structure, the grounding electrode plate and the ground capacitor plate are covered by a transition structure so as to realize completely metallized electrical connection respectively. However, due to the existence of the transition structure, the structure at the wiring becomes complicated, so that the process complexity is synchronously increased during the process preparation.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a qubit circuit and qubit device to solve the complicated problem of structure of the wiring department of Josephson knot among the prior art, can simplify the structure of the wiring department of Josephson knot, reduce technology complexity.
In order to solve the above technical problem, the utility model provides a quantum bit circuit for josephson junction, include:
ground electrode plate and capacitance to ground board:
a first conductive disk electrically connected to a first superconducting layer of the two superconducting layers of the josephson junction and forming a coupling capacitance with the ground electrode plate;
and the second conductive disc is electrically connected with the second superconducting layer in the two superconducting layers and forms a coupling capacitor with the ground capacitor plate.
Preferably, the first conductive plate and the ground electrode plate are stacked, and the second conductive plate and the ground capacitor plate are stacked.
Preferably, dielectric layers are sandwiched between the first conductive disk and the ground electrode plate and between the second conductive disk and the ground capacitor plate.
Preferably, the dielectric layer is an oxide layer on the surface of the grounding electrode plate and the surface of the grounding capacitor plate.
Preferably, the first conductive pad is integrally formed with the first superconducting layer.
Preferably, the second conductive pad is integrally formed with the second superconducting layer.
Preferably, the first superconducting layer is a bottom superconducting layer of the josephson junction, and the second superconducting layer is a top superconducting layer of the josephson junction.
In order to solve the above technical problem, the present invention further provides a qubit device, including any one of the qubit circuits described above, and at least one josephson junction.
Preferably, the number of josephson junctions is two, the two josephson junctions being in parallel.
Preferably, the first superconducting layers of the two josephson junctions are integrally formed, and the second superconducting layers of the two josephson junctions are parallel to each other.
Be different from prior art's condition, the utility model provides a quantum bit circuit is connected with the two-layer superconductive layer electricity of Josephson knot respectively through first conductive dish and second conductive dish, and first conductive dish and second conductive dish are not direct and ground electrode board and to ground capacitor plate electricity connection, but and ground electrode board and to forming coupling capacitance between the capacitor plate, owing to cancelled transition structure, also need not to etch the oxide layer on ground electrode board and the capacitor plate surface to simplify the structure of the wiring department of Josephson knot, reduce the technology complexity.
The utility model provides a qubit device includes foretell qubit circuit and at least one Josephson junction, consequently also can simplify the structure of Josephson junction's wiring department, reduces the technology complexity to, from the circuit angle, through control coupling capacitance's size, can ignore coupling capacitance to the influence of qubit electric capacity, consequently can not influence the performance of qubit.
Drawings
Fig. 1 is a schematic cross-sectional structure diagram of a qubit circuit provided in an embodiment of the present invention.
Fig. 2 is a schematic top view of the first conductive disk and first superconducting layer shown in fig. 1.
Fig. 3 is a schematic structural diagram of a qubit device according to an embodiment of the present invention in which two josephson junctions are connected in parallel.
Fig. 4 is a schematic diagram of an equivalent circuit of a qubit device according to an embodiment of the present invention.
Reference numerals: 1-a grounding electrode plate, 2-a grounding capacitor plate, 3-a first conductive plate, 4-a second conductive plate, 5-a dielectric layer, 100-a Josephson junction, 101-a first superconducting layer, 102-a second superconducting layer.
Detailed Description
The following description of the embodiments of the present invention will be made in more detail with reference to the accompanying drawings. Advantages and features of the present invention will become apparent from the following description and claims. It should be noted that the drawings are in simplified form and are not to precise scale, and are provided for convenience and clarity in order to facilitate the description of the embodiments of the present invention.
In the description of the present invention, it should be understood that the terms "center", "upper", "lower", "left", "right", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless explicitly defined otherwise.
Referring to fig. 1, an embodiment of the present invention provides a qubit circuit for a josephson junction. The qubit circuit comprises a ground electrode plate 1, a capacitive plate to ground 2, a first conductive pad 3 and a second conductive pad 4.
The first conductive plate 3 is electrically connected to the first superconducting layer 101 of the two superconducting layers 101 and 102 of the josephson junction 100, and forms a coupling capacitance with the ground electrode plate 1.
The second conductive pad 4 is electrically connected to the second superconducting layer 102 of the two superconducting layers 101 and 102, and forms a coupling capacitance with the ground capacitor plate 2.
Coupling capacitances are formed between the first conductive disc 3 and the ground electrode plate 1 and between the second conductive disc 4 and the capacitance plate 2, that is, the first conductive disc 3 is not directly electrically connected to the ground electrode plate 1, and the second conductive disc 4 is not directly electrically connected to the capacitance plate 2.
In some embodiments of the present application, the first conductive pad 3 is stacked on the ground electrode plate 1, and the second conductive pad 4 is stacked on the ground capacitor plate 2, so that the first conductive pad 3 and the ground electrode plate 1 form a parallel-plate capacitor, and the second conductive pad 4 and the ground capacitor plate 2 form a parallel-plate capacitor, thereby forming a coupling capacitor.
Specifically, in order to implement the construction of the coupling capacitor, dielectric layers 5 are sandwiched between the first conductive pad 3 and the ground electrode plate 1 and between the second conductive pad 4 and the ground capacitor plate 2. The dielectric layer 5 may be air or an insulating material. In this embodiment, the dielectric layer is an oxide layer on the surface of the ground electrode plate 1 and the surface of the capacitance plate 2. Since the ground electrode plate 1 and the capacitance-to-ground plate 2 are usually made of superconducting materials such as aluminum, niobium nitride, and titanium nitride, which are easily oxidized to form an oxide layer on the surface, the oxide layer can be used as a dielectric layer.
Referring to fig. 2, in some embodiments of the present application, first conductive disk 3 is integrally formed with first superconducting layer 101. Further, the second conductive pad 4 may be integrally formed with the second superconducting layer 102. In some processes, the first superconducting layer 101 and the second superconducting layer 102 are generally formed by an evaporation process, and before the evaporation process, a region where the first conductive disk 3 and the second conductive disk 4 are formed may be planned and communicated with a region where the first superconducting layer 101 and the second superconducting layer 102 are formed, and then the evaporation process may be performed, so that the first conductive disk 3 is formed while the first superconducting layer 101 is formed and the second conductive disk 4 is formed while the second superconducting layer 102 is formed.
In this way, the utility model discloses the qubit circuit need not transition structure and just can realize josephson junction and the earthing electrode board and be connected to the earth capacitance board, consequently can simplify the structure of josephson junction's wiring department, reduces technology complexity, except not needing transition structure in addition, also need not etch earthing electrode board and the oxide layer to the earth capacitance board surface, can further reduce technology complexity.
With continued reference to fig. 1, embodiments of the present invention further provide a qubit device including the qubit circuit of the previous embodiments, and at least one josephson junction 100.
In some embodiments of the present application, the number of josephson junctions 100 is two, two josephson junctions 100 being in parallel. That is, two josephson junctions 100 form a closed loop, and such a structure is also referred to as a superconducting quantum interferometer.
To form a structure for facilitating the fabrication of a superconducting quantum interferometer, referring to fig. 3, the first superconducting layers 101 of the two josephson junctions 100 are integrally formed, and the second superconducting layers 102 of the two josephson junctions 100 are parallel to each other.
Because the utility model discloses introduced coupling capacitance in the qubit device, in order to avoid coupling capacitance to produce the influence to the qubit electric capacity, from the circuit angle, can adjust coupling capacitance's size through the area size of controlling first conductive dish 3 and the conductive dish 4 of second.
Taking the example that the qubit device adopts the two josephson junctions 100 shown in fig. 3, the equivalent circuit schematic diagram of the qubit device is shown in fig. 4, in which Cbit1, cbit2, and C1-2 are equivalent to qubit capacitors, which can be equivalent to a capacitor C, which is the design value of the qubit capacitors. The C1 and the C2 are equivalent to coupling capacitors, belong to parasitic capacitors and are connected with the capacitor C in series. According to the principle of capacitor series connection, when C1 and C2 are large enough, the capacitor after C1, C2 and C are connected in series can be approximated to capacitor C. Therefore, the larger the coupling capacitors C1 and C2 are, the smaller the influence on the qubit capacitance is, and when the coupling capacitors C1 and C2 are larger than a certain value, the influence on the qubit capacitance can be ignored, and at this time, the same effect as that of the completely metallized electrical connection of the josephson junction in the prior art can be achieved. The coupling capacitances C1, C2 are increased, which is most directly done by increasing the area of the first and second conductor pads 3, 4.
In this way, the utility model provides an among the qubit device, first conductive dish and second conductive dish are direct to pass through coupling capacitance with the earthing electrode board and to ground capacitor plate and are connected, need not to set up transition structure, also need not to etch earthing electrode board and to the oxide layer on ground capacitor plate surface to can simplify the structure of josephson junction's junction, reduce technology complexity, and circuit angle, can control coupling capacitance size, and then ignore coupling capacitance to the influence of qubit electric capacity, consequently can not influence the performance of qubit.
In the description of the present specification, reference to the description of "one embodiment," "some embodiments," "an example" or "a specific example" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. And the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.
The above description is only for the preferred embodiment of the present invention, and does not limit the present invention in any way. Any technical personnel who belongs to technical field, within the scope that does not deviate from the technical scheme of the utility model, to the technical scheme and technical content that the utility model discloses do the change such as equivalent replacement or modification of any form, all belong to the content that does not break away from the technical scheme of the utility model, still belong to within the scope of protection of the utility model.

Claims (10)

1. A qubit circuit for use in a josephson junction, comprising:
ground electrode plate and capacitor to ground plate:
a first conductive disk electrically connected to a first superconducting layer of the two superconducting layers of the josephson junction and forming a coupling capacitance with the ground electrode plate;
and the second conductive disc is electrically connected with the second superconducting layer in the two superconducting layers and forms a coupling capacitor with the ground capacitor plate.
2. The qubit circuit of claim 1 wherein the first conductive pad is stacked with the ground electrode pad and the second conductive pad is stacked with the capacitance-to-ground pad.
3. The qubit circuit of claim 2 wherein a dielectric layer is sandwiched between the first conductive pad and the ground electrode plate and between the second conductive pad and the capacitance-to-ground plate.
4. The qubit circuit of claim 3 wherein the dielectric layer is an oxide layer on a surface of the ground electrode plate and a surface of the capacitance-to-ground plate.
5. The qubit circuit of claim 1, wherein the first conductive disk is integrally formed with the first superconducting layer.
6. The qubit circuit of claim 1, wherein the second conductive disk is integrally formed with the second superconducting layer.
7. The qubit circuit of claim 1 wherein the first superconducting layer is a bottom superconducting layer of the josephson junction and the second superconducting layer is a top superconducting layer of the josephson junction.
8. A qubit device comprising the qubit circuit of any of claims 1-7 and at least one josephson junction.
9. The qubit device of claim 8, wherein the number of said josephson junctions is two, said two josephson junctions being connected in parallel.
10. The qubit device of claim 9 wherein the first superconducting layers of the two josephson junctions are integrally formed and the second superconducting layers of the two josephson junctions are parallel to each other.
CN202223091439.9U 2022-11-16 2022-11-16 Quantum bit circuit and quantum bit device Active CN218831249U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202223091439.9U CN218831249U (en) 2022-11-16 2022-11-16 Quantum bit circuit and quantum bit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202223091439.9U CN218831249U (en) 2022-11-16 2022-11-16 Quantum bit circuit and quantum bit device

Publications (1)

Publication Number Publication Date
CN218831249U true CN218831249U (en) 2023-04-07

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