JPH0897367A - Semiconductor device - Google Patents

Abstract

PURPOSE: To reduce the area of a semiconductor device and hence provide a semiconductor device whose degree of integration is enhanced by forming a passive device, such as a capacitor inside a via hole formed in a substrate. CONSTITUTION: This invention relates to a semiconductor device where components, such as IC conductor metal layers 2a to 2e are formed on the surface of a semiconductor substrate 1 and installed inside a via hole 4, and what is more, it is connected between the conductor metal layer 2a to 2e on the surface and a grounding metal layer 7 on the rear surface of the semiconductor substrate 1, thereby forming passive devices, such as a capacitor, a resistor and an inductor which constitute a functional circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a passive element such as a capacitor formed inside a via hole formed in a semiconductor substrate.

[0002]

2. Description of the Related Art Conventional monolithic microwave IC
A semiconductor device such as (MMIC) is, as shown in FIG.
The ground electrode 1 is formed on the surface of the semiconductor substrate 10 such as GaAs.
1, active elements such as a field effect transistor (FET) 12 and passive elements such as a capacitor element 13, a resistance element 14, and an inductor element 15 are formed. Then, a ground metal layer 16 is formed on the back surface of the semiconductor substrate 10, and the ground metal layer 16 on the back surface and the ground electrode 11 on the front surface are connected via a via hole 17 formed in the semiconductor substrate 10. There is.

Further, the grounding of the FET or the like is, for example, as shown in FIG.
As shown in the circuit (1), it is performed via a bypass capacitor C, a resistor R, and the like. The capacitor C used for this bypass usually needs to have a capacitance that is several to several tens of times larger than that of a capacitor used in other parts of the IC.

[0004]

However, the bypass capacitor requires a large area, and when it is formed on the semiconductor substrate by the conventional means, the area of the IC chip becomes large and the degree of integration cannot be increased. There was a problem.

Therefore, the present invention provides a semiconductor device in which a passive device such as a capacitor is formed inside a via hole formed in a substrate to reduce the area of the semiconductor device and increase the degree of integration. With the goal.

[0006]

Means for solving the problems of the present invention are as follows. 1. The IC is formed on the surface of the semiconductor substrate on which the via holes are formed.
And a component which is provided inside the via hole and is connected between the conductor metal layer on the front surface and the ground metal layer on the rear surface of the semiconductor substrate to form a functional circuit. A semiconductor device in which passive elements such as resistors, inductors, etc. are formed.

2. Components such as a conductor metal layer of the IC are formed on the surface of the semiconductor substrate on which the via holes are formed,
Inside the via hole, a metal electrode is formed which is electrically connected to the conductor metal layer on the surface of the semiconductor substrate, an insulating film is formed on the lower surface of the metal electrode, and a ground metal layer is formed on the lower surface of the insulating film and the rear surface of the semiconductor substrate. Then, a semiconductor device in which a capacitor having the insulating film as a dielectric is formed inside the via hole between the conductor metal layer on the front surface and the ground metal layer on the back surface of the semiconductor substrate.

3. Components such as a conductor metal layer of the IC are formed on the surface of the semiconductor substrate on which the via holes are formed,
In a part of the inside of the via hole, and from the lower surface of the conductor metal layer on the surface to the back surface of the semiconductor substrate, an ion implantation resistance is formed, and inside the via hole, and
A metal electrode is formed except for the main part of the ion implantation resistance, an insulating film is formed on the lower surface of the metal electrode, and a ground metal layer is formed on the lower surface of the insulation film, the lower portion of the ion implantation resistance, and the back surface of the semiconductor substrate. And a parallel circuit of a resistor and a capacitor is formed inside the via hole between the conductor metal layer on the front surface and the ground metal layer on the back surface of the semiconductor substrate.

[0009]

According to the present invention, since a passive element occupying a large area such as a capacitor is formed inside the via hole formed in the semiconductor substrate, the degree of integration of the semiconductor device is increased.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic sectional view of a semiconductor device according to an embodiment of the present invention. In the figure, 1 is a semiconductor substrate, and on the surface of the semiconductor substrate 1, conductor metal layers 2a to 2e and insulating films 3a and 3b are provided. Four
Is a via hole and is formed through the semiconductor substrate 1 by etching or the like. Inside the via hole 4, a metal electrode 5 that is electrically connected to the conductor metal layer 2c on the surface of the semiconductor substrate 1 is formed. Reference numeral 6 denotes an insulating film, which is formed on the lower surface of the metal layer 5 (the same applies hereinafter in FIG. 1). A ground metal layer 7 is formed on the back surface of the insulating film 6 and the semiconductor substrate 1.

This embodiment has the above-mentioned structure, but the insulating film 6 is used as a dielectric between the conductor metal layer 2c on the front surface of the semiconductor substrate 1 and the ground metal layer 7 on the back surface of the semiconductor substrate 1. , A capacitor is formed. This capacitor is located inside via hole 4 as described above.
Since it is formed in a three-dimensional structure, it has a large capacitance, unlike an MIM capacitor formed on the plane of a semiconductor substrate. Next, another embodiment of the present invention will be described with reference to FIG. In this embodiment, the same parts as those in the embodiment of FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. This embodiment embodies the circuit shown in FIG. 4, and includes a capacitor C and a resistor R connected to the FET.
The bypass circuit is formed inside the via hole 4.

That is, ions are implanted from a back surface into a part of the inside of the via hole 4, and an ion implantation resistor 8 reaching the back surface of the semiconductor substrate 1 is formed in contact with the conductor metal layer 2c on the surface of the semiconductor substrate 1. To be done. A metal electrode 5 is formed inside the via hole 4 except for the main part of the ion implantation resistor 8. An insulating film 6 is formed on the lower surface of the metal electrode 5 as in the first embodiment. And this insulating film 6
A ground metal layer 7 is formed on the bottom surface of the semiconductor substrate 1 and the back surface of the semiconductor substrate 1.

The present embodiment has the above-described structure, but the ion-implanted resistor 8 and the capacitor made of the insulating film 6 are used as a conductor metal layer 2c on the front surface of the semiconductor substrate 1 and a ground metal on the back surface of the semiconductor substrate 1. It is formed in parallel with the layer 7 inside the via hole 4. Therefore, the present embodiment has a higher degree of integration than the first embodiment.

[0014]

According to the present invention, a passive element occupying a large area such as a capacitor is three-dimensionally formed inside a via hole formed in a semiconductor substrate by utilizing the three-dimensional structure of the via hole. Therefore, for example, a capacitor having a large capacity can be manufactured. In addition, since the passive component occupying a large area is formed inside the via hole, the area of the semiconductor device can be reduced correspondingly, and the degree of integration can be increased.

[Brief description of drawings]

FIG. 1 is a schematic sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a schematic sectional view of a semiconductor device according to another embodiment of the present invention.

FIG. 3 is a schematic sectional view of a conventional semiconductor device.

FIG. 4 is a FET circuit diagram including a bypass circuit common to the present invention and a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2a-2e Conductor metal layer 3a, 3b Insulating film 4 Via hole 5 Metal electrode 6 Insulating film 7 Grounding metal layer 8 Ion implantation resistance

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI Technical display location H01L 27/095 H01L 27/04 P 9171-4M 29/80 V 9171-4M E

Claims (3)

[Claims] 1. A component such as a conductor metal layer of an IC is formed on the surface of a semiconductor substrate on which a via hole is formed, is provided inside the via hole, and the conductor metal layer on the surface and the back surface of the semiconductor substrate. A semiconductor device in which passive elements such as capacitors, resistors, and inductors, which are connected to the ground metal layer of, and which form a functional circuit, are formed. 2. A constituent element such as a conductor metal layer of an IC is formed on the surface of a semiconductor substrate on which a via hole is formed, and a metal electrode electrically connected to the conductor metal layer on the surface of the semiconductor substrate is provided inside the via hole. An insulating film is formed on the lower surface of the metal electrode, and a ground metal layer is formed on the lower surface of the insulating film and the back surface of the semiconductor substrate, and between the conductor metal layer on the front surface and the ground metal layer on the back surface of the semiconductor substrate. A semiconductor device in which a capacitor having the insulating film as a dielectric is formed inside a via hole. 3. A semiconductor element such as a conductor metal layer of an IC is formed on the surface of a semiconductor substrate on which a via hole is formed, and the semiconductor is formed on a part of the inside of the via hole and from the lower surface of the conductor metal layer on the surface. An ion-implanted resistance is formed over the back surface of the substrate, a metal electrode is formed inside the via hole, and except for a main portion of the ion-implanted resistance, and an insulating film is formed on the lower surface of the metal electrode. A ground metal layer is formed on the lower surface of the insulating film, the lower portion of the ion implantation resistor, and the back surface of the semiconductor substrate, and a parallel circuit of a resistor and a capacitor is provided between the conductor metal layer on the front surface and the ground metal layer on the back surface of the semiconductor substrate. A semiconductor device having a via formed inside a via hole.