CN218772040U - Power-on and power-off time sequence control circuit - Google Patents
Power-on and power-off time sequence control circuit Download PDFInfo
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- CN218772040U CN218772040U CN202223103573.6U CN202223103573U CN218772040U CN 218772040 U CN218772040 U CN 218772040U CN 202223103573 U CN202223103573 U CN 202223103573U CN 218772040 U CN218772040 U CN 218772040U
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- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical group [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 31
- 229910002601 GaN Inorganic materials 0.000 claims description 30
- 230000000087 stabilizing effect Effects 0.000 claims description 18
- 230000000740 bleeding effect Effects 0.000 claims description 8
- 239000003990 capacitor Substances 0.000 claims description 7
- 238000010295 mobile communication Methods 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 5
- 230000005611 electricity Effects 0.000 description 5
- 239000000306 component Substances 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007717 exclusion Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
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Abstract
The utility model discloses a go up and down electric sequential control circuit belongs to mobile communication technical field. The circuit comprises a switching circuit, a voltage bleeder circuit and a time sequence control circuit. The drain electrode of the power amplifier is connected with the first voltage converter through the switch circuit, and the grid electrode of the power amplifier is connected with the second voltage converter; the voltage bleeder circuit is connected between the drain of the power amplifier and the second voltage converter, and the timing control circuit is connected between the switching circuit and the second voltage converter. When the power amplifier is powered on, the time sequence control circuit controls the switch circuit to be started in a delay mode, and the voltage bleeder circuit is closed, so that the grid electrode of the power amplifier is powered on before the drain electrode; when the power is off, the timing control circuit controls the switch circuit to be closed, and the voltage bleeder circuit is opened, so that the drain of the power amplifier is powered off before the grid. The power-on and power-off time sequence control circuit does not need to adjust the power-on and power-off time sequence of the power amplifier through a single chip microcomputer and software, and has the advantages of simple structure and low cost.
Description
Technical Field
The utility model relates to a mobile communication technology field especially relates to a power amplifier upper and lower electricity sequential control circuit of electric chronogenesis about steerable power.
Background
In the field of mobile communication, a radio frequency power amplifier is widely used, and is a core component of a wireless transmitter, which is used for radiating a wireless signal with sufficient transmission power. With the continuous progress of semiconductor material technology, gallium nitride (GaN) power amplifiers have come into play, and are used by more and more communication products due to their unique advantages. When the gallium nitride power amplifier is actually applied, the gallium nitride power amplifier has strict requirements on the time sequences of a grid voltage Vg and a drain voltage Vd when the gallium nitride power amplifier is powered on and powered off, the grid is required to be powered on preferentially when the gallium nitride power amplifier is powered on, and the drain is powered on after the gallium nitride power amplifier is stabilized; when the grid is powered off, the grid is powered off again when the grid reaches the safe voltage. However, at present, when the power amplifier having the above-mentioned power-up and power-down timing requirement is controlled by the power-up and power-down timing, software and a single chip microcomputer are usually adopted, and such a control scheme has the defects of high cost, complex control and the like.
The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information constitutes prior art already known to a person skilled in the art.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a go up and down electric sequential control circuit need not to adopt software and singlechip to go up and down electric sequential control, has simple structure, advantage with low costs.
In order to achieve the above object, an embodiment of the present invention provides an upper and lower electric timing control circuit for controlling an upper and lower electric timing of a power amplifier, the upper and lower electric timing control circuit including a switch circuit for controlling whether a first voltage converter inputs a voltage to a drain of the power amplifier, a voltage bleeder circuit for controlling whether a voltage of a drain of the power amplifier is discharged to ground according to a control signal output by a second voltage converter, and a timing control circuit for controlling a delay of opening of the switch circuit according to a control signal output by the second voltage converter, the drain of the power amplifier being connected to a voltage output terminal of the first voltage converter through the switch circuit, and a gate being connected to a voltage output terminal of the second voltage converter; the voltage bleeder circuit is connected between the drain electrode of the power amplifier and the control signal output end of the second voltage converter, and the timing control circuit is connected between the switch circuit and the control signal output end of the second voltage converter.
In one or more embodiments of the present invention, the switch circuit includes a first switch transistor, the first switch transistor is connected between the voltage output terminal of the first voltage converter and the drain of the power amplifier, and the gate of the first switch transistor is connected to the timing control circuit. In one or more embodiments of the present invention, the voltage bleeding circuit includes:
a second switching transistor, the grid of which is connected with the control signal output end of the second voltage converter;
and the drain of the power amplifier is connected with the ground through the second switching transistor while the load is discharged.
In one or more embodiments of the present invention, the voltage bleeding circuit further includes:
and the grid electrode of the second switching transistor is connected with the control signal output end of the second voltage converter through the first voltage stabilizing circuit.
In one or more embodiments of the present invention, the first voltage circuit includes a first voltage regulator diode and a current limiting resistor, the gate of the second switching transistor is connected to the control signal output terminal of the second voltage converter through the current limiting resistor, the negative electrode of the first voltage regulator diode is connected between the current limiting resistor and the gate of the second switching transistor, and the positive electrode is grounded.
In one or more embodiments of the present invention, the bleeding load includes a resistor, or
A plurality of resistors connected in series, or
A plurality of resistors connected in parallel.
In one or more embodiments of the present invention, the timing control circuit includes a first voltage dividing circuit, a second voltage dividing circuit, a third voltage dividing circuit, a second voltage stabilizing circuit, a triode, and a third switching transistor, wherein,
the base electrode of the triode is respectively connected with the voltage output end of the first voltage converter and the control signal output end of the second voltage converter through a first voltage division circuit, the first electrode is connected with the voltage output end of the first voltage converter through a second voltage division circuit to form a first connecting point, and the second electrode is grounded;
the grid of the third switching transistor is connected with the second voltage division circuit, the first electrode is connected between the first connecting point and the switching circuit to form a second connecting point, and the second electrode is grounded through the third voltage division circuit;
the input end of the second voltage stabilizing circuit is connected with the third voltage dividing circuit, and the opposite end of the second voltage stabilizing circuit is connected between the second connection point and the switch circuit.
In one or more embodiments of the present invention, the first voltage dividing circuit includes a third resistor and a fourth resistor connected in series, and a connection point formed by connecting the third resistor and the fourth resistor is connected to the control signal output end of the second voltage converter.
In one or more embodiments of the present invention, the second voltage division circuit includes a first resistor and a second resistor connected in series, and a connection point formed by connecting the first resistor and the second resistor is connected to a gate of the third switching transistor.
In one or more embodiments of the present invention, the third voltage dividing circuit includes a fifth resistor and a sixth resistor connected in series, and a connection point formed by connecting the fifth resistor and the sixth resistor is connected to the switch circuit.
In one or more embodiments of the present invention, the second voltage stabilizing circuit includes a second zener diode, a negative electrode of the second zener diode is connected between the second connection point and the switch circuit, and a positive electrode of the second zener diode is connected between the connection point formed by the fifth resistor and the sixth resistor and the fifth resistor.
In one or more embodiments of the present invention, the voltage output end of the second voltage converter is connected to the gate of the power amplifier through the filter capacitor and the analog load, one end of the seventh resistor is connected to the voltage output end of the second voltage converter to form a third connection point, the opposite end is connected to the ground, one end of the filter capacitor is connected between the third connection point and the voltage output end of the second voltage converter, and the opposite end is connected to the ground.
In one or more embodiments of the present invention, the analog load includes a resistor, or
A plurality of resistors connected in series, or
A plurality of resistors connected in parallel.
In one or more embodiments of the present invention, the power amplifier is a gallium nitride power amplifier.
Compared with the prior art, according to the utility model discloses upper and lower electric sequential control circuit, it comprises simple circuit components and parts, can adjust power amplifier's last electric time sequence and lower electric time sequence to make its chronogenesis demand when satisfying last electricity and lower electricity, ensure its steady operation, need not to realize power amplifier's upper and lower electric sequential control through the control of singlechip and software, have simple structure, advantage with low costs.
Drawings
FIG. 1 is a timing diagram of the power up and down timing of a GaN power amplifier;
fig. 2 is a block diagram of a power-on/power-off timing control circuit according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a power-on/power-off timing control circuit according to an embodiment of the present invention;
fig. 4 is a timing diagram of power up of a gan power amplifier according to an embodiment of the present invention;
fig. 5 is a timing diagram of a power-down operation of a gan power amplifier according to an embodiment of the present invention.
Detailed Description
The following detailed description of the present invention is provided with reference to the accompanying drawings, but it should be understood that the scope of the invention is not limited by the detailed description.
Throughout the specification and claims, unless explicitly stated otherwise, the word "comprise", or variations such as "comprises" or "comprising", will be understood to imply the inclusion of a stated element or component but not the exclusion of any other element or component.
As shown in fig. 1 to 5, the power supply and power down sequence control circuit according to the preferred embodiment of the present invention can adjust the power supply sequence and the power down sequence of the power amplifier to meet the sequence requirements during power supply and power down, thereby ensuring stable operation. The power amplifier includes but is not limited to a gan power amplifier, and the power-up and power-down sequence control circuit of the present invention can be applied as long as the power-up sequence and the power-down sequence of the power amplifier satisfy the following requirements. The power-up sequence and the power-down sequence satisfy: when the power amplifier is powered on, the grid electrode of the power amplifier is powered on in priority to the drain electrode; when the power is down, the drain of the power amplifier is powered down in preference to the gate.
The following will describe the power-up and power-down timing sequence control circuit in detail by taking a gallium nitride power amplifier as an example, the power-up and power-down timing sequence of the gallium nitride power amplifier can be shown in fig. 1, when the power-up is performed, the-9.5V voltage required by the gate is firstly performed, and after the voltage is stabilized, the 50V voltage is outputted to the drain; when the power is off, the voltage of 50V of the drain electrode is preferentially powered off, and when the voltage reaches within 10V of the safety voltage, the voltage of-9.5V of the grid electrode is cut off.
Specifically, as shown in fig. 2, the power-up and power-down timing control circuit includes a switch circuit 10, a voltage bleeder circuit 20, and a timing control circuit 30. The drain Vd of the gan power amplifier a is connected to the voltage output terminal of the first voltage converter b through the switch circuit 10, the gate Vg is connected to the voltage output terminal of the second voltage converter c, the first voltage converter is a universal 50v voltage converter, and the second voltage converter is a universal-9.5 v voltage converter. The switch circuit is used for controlling whether the first voltage converter can input a voltage to the drain of the gallium nitride power amplifier, when the first voltage converter is started (namely, a voltage transmission path of the drain of the gallium nitride power amplifier and the first voltage converter is conducted), the first voltage converter can input a corresponding voltage to the drain, when the first voltage converter is closed (the voltage transmission path of the drain of the gallium nitride power amplifier and the first voltage converter is not conducted), the first voltage converter can not input a corresponding voltage to the drain, for example, when the switch circuit is started, the first voltage converter can input a 50v voltage to the drain, and when the switch circuit is closed, the first voltage converter can not input a corresponding 50v voltage to the drain.
The voltage bleeder circuit is connected between the drain of the gallium nitride power amplifier and the control signal output end of the second voltage converter and used for controlling whether the voltage of the drain of the gallium nitride power amplifier is grounded or not according to the control signal output by the second voltage converter. The switch circuit is turned on when being turned off, and the voltage of the drain electrode of the gallium nitride power amplifier can be discharged in a grounding way so as to accelerate the voltage discharge at the moment of turning off the switch circuit; when the power amplifier is turned off, the power amplifier cannot discharge the voltage of the drain of the gallium nitride power amplifier to the ground.
The time sequence control circuit is connected between the switch circuit and the control signal output end of the second voltage converter and used for controlling the switch circuit to be switched on or switched off according to the control signal output by the second voltage converter.
In operation, at power-up, the second voltage converter inputs-9 v voltage to the gate of the gan power amplifier through the voltage output terminal. Meanwhile, the second voltage converter inputs control signals to the time sequence control circuit and the voltage bleeder circuit through the control signal output end, the time sequence control circuit controls the switch circuit to be started in a delay mode according to the control signals, 50v voltage output by the first voltage converter reaches the drain electrode of the gallium nitride power amplifier at a certain time interval, the voltage bleeder circuit is in a closed state according to the control signals, and the voltage of the drain electrode of the gallium nitride power amplifier cannot be discharged in a grounding mode. Finally, the gate of the gallium nitride power amplifier is powered on preferentially to the drain.
When the power is off, the second voltage converter inputs control signals to the time sequence control circuit and the voltage bleeder circuit through the control signal output end, the time sequence control circuit controls the switch circuit to be closed according to the control signals, the voltage bleeder circuit is opened according to the control signals, and the voltage of the drain electrode of the gallium nitride power amplifier can be further discharged in a grounded mode. Finally, the drain electrode of the gallium nitride power amplifier is powered down preferably than the grid electrode.
As shown in fig. 3, the switching circuit includes a first switching transistor Q1 having a first electrode, a second electrode and a gate, wherein the first electrode is connected to the first voltage converter, the second electrode is connected to the drain of the gan power amplifier, and the gate is connected to the timing control circuit. In this embodiment, the first switching transistor Q1 is preferably a P-type MOS transistor, preferably a P-type MOS transistor of type IXTA52P10P, and has a source connected to the first voltage converter and a drain connected to the drain of the gan power amplifier.
As shown in fig. 3, the voltage bleeding circuit includes a second switching transistor Q2 and a bleeding load. The second switching transistor Q2 has a first electrode, a second electrode and a gate, the first electrode is connected to the drain Vd of the gan power amplifier, the second electrode is grounded through the dump load, and the gate is connected to the control signal output terminal of the second voltage converter. In this embodiment, the second switching transistor Q2 is an N-type MOS transistor, preferably an N-type MOS transistor of the type IRF540NS, a drain of which is connected to a drain of the gallium nitride power amplifier, and a source of which is grounded through the bleeding load.
Further, the dump load comprises one or more resistors. When the dump load comprises a plurality of resistors, the plurality of resistors are connected in parallel, but of course, the plurality of resistors may also be connected in series. As shown in fig. 3, the dump load includes four resistors R8, R9, R10, and R11, which are connected in parallel. The number of resistors in the bleeding load can be selected according to actual requirements to achieve the required resistance value.
Further, the voltage bleeder circuit also comprises a first voltage stabilizing circuit, and the grid electrode of the second switching transistor Q2 is connected with the control signal output end of the second voltage converter through the first voltage stabilizing circuit. In this embodiment, the first voltage stabilizing circuit includes a first voltage stabilizing diode Z2 and a current limiting resistor R7, a gate of the second switching transistor Q2 is connected to the control signal output terminal of the second voltage converter through the current limiting resistor R7, a cathode of the first voltage stabilizing diode Z2 is connected between the current limiting resistor R7 and the gate of the second switching transistor Q2, and an anode thereof is grounded. In this embodiment, the first zener diode Z2 is a 12V zener diode, preferably a zener diode of the type PDZ 12B.
As shown in fig. 3, the timing control circuit 30 includes a first voltage dividing circuit 31, a second voltage dividing circuit 32, a third voltage dividing circuit 33, a second voltage stabilizing circuit 34, a transistor Q5, and a third switching transistor Q9. The triode Q5 has a base, a first electrode and a second electrode, wherein the triode Q5 is an NPN type triode, preferably an NPN type triode of the type UMT2222A, and the first electrode is a collector and the second electrode is an emitter. The third switching transistor Q9 has a gate, a first electrode and a second electrode, where the third switching transistor Q9 is a P-type MOS transistor, preferably a P-type MOS transistor of type NDS352AP, with the first electrode being a source and the second electrode being a drain.
Further, the base of the transistor Q5 is connected to the voltage output terminal of the first voltage converter b and the control signal output terminal of the second voltage converter c through the first voltage dividing circuit 31, the first electrode is connected to the voltage output terminal of the first voltage converter b through the second voltage dividing circuit 32 to form a first connection point a, and the second electrode is grounded; a gate of the third switching transistor Q9 is connected to the second voltage dividing circuit 32, a first electrode is connected between the first connection point a and the switching circuit 10 to form a second connection point B, and a second electrode is grounded through a third voltage dividing circuit 33; the input end of the second voltage stabilizing circuit is connected with the third voltage dividing circuit, and the opposite end is connected between the second connection point B and the switch circuit 10.
As shown in fig. 3, in particular, the first voltage dividing circuit 31 includes a third resistor R3 and a fourth resistor R4, the third resistor R3 and the fourth resistor R4 are connected in series, and the base of the transistor Q5 is connected to the voltage output terminal of the first voltage converter through the series connection of the third resistor R3 and the fourth resistor R4, and meanwhile, the connection point of the third resistor R3 and the fourth resistor R4 is also connected to the control signal output terminal of the second voltage converter c.
The second voltage-dividing circuit 32 includes a first resistor R1 and a second resistor R2, the first resistor R1 and the second resistor R2 are connected in series, and the first electrode of the triode Q5 is connected to the voltage output terminal of the first voltage converter b through the first resistor R1 and the second resistor R2 after being connected in series, so as to form a first connection point a, the second electrode is grounded, and meanwhile, the connection point of the first resistor R1 and the second resistor R2 is further connected to the gate of the third switching transistor Q9.
The third voltage dividing circuit 33 includes a fifth resistor R5 and a sixth resistor R6, the fifth resistor R5 and the sixth resistor R6 are connected in series, and the first electrode of the third switching transistor Q9 is connected between the first connection point a and the first electrode of the second switching transistor Q1 to form a second connection point B, the second electrode is grounded through the series connection of the fifth resistor R5 and the sixth resistor R6, and meanwhile, the connection point formed by the connection of the fifth resistor R5 and the sixth resistor R6 is also connected to the gate of the second switching transistor Q1.
The second voltage stabilizing circuit 34 includes a second zener diode Z1, and an anode of the second zener diode Z1 is connected between a connection point formed by connecting the fifth resistor R5 and the sixth resistor R6 and the fifth resistor R5.
The sequential control circuit adopts the circuit structure, and can control the switch circuit to be switched on or switched off according to the control signal output by the second voltage converter. In this embodiment, the second zener diode Z1 is a 12V zener diode, preferably a zener diode of the type PDZ 12B.
15. As shown in fig. 3, in this embodiment, the voltage output terminal of the second voltage converter is connected to the gate Vg of the gan power amplifier through the filter capacitor C3 and the analog load RL. One end of the analog load RL is connected with the voltage output end of the second voltage converter to form a third connection point C, the opposite end of the analog load RL is grounded, and the analog load RL can be used for simulating load current with a certain numerical value, such as 10mA load current, one resistor of the analog load RL, or a plurality of resistors connected in series, or a plurality of resistors connected in parallel, and can be selected according to actual requirements; one end of the filter capacitor C3 is connected between the third connection point C and the voltage output terminal of the second voltage converter, and the opposite end is grounded. In the present embodiment, the capacitor C3 is connected to the seventh resistor RL.
The operation principle of the power-up/power-down timing control circuit shown in fig. 3 will be described in detail below with reference to fig. 3 to 5:
when the power is on, the first voltage converter and the second voltage converter are normally powered on, and the power on of the first voltage converter and the power on of the second voltage converter are not in sequence. The second voltage converter outputs-9.5V voltage to the grid electrode of the gallium nitride power amplifier through the voltage output end, the first voltage converter outputs 50V voltage through the voltage output end, and due to the existence of the first switching transistor Q1, the 50V voltage cannot reach the gallium nitride power amplifier, and a time sequence control circuit is required to wait for controlling the on of the gallium nitride power amplifier, so that the 50V voltage can be output to the drain electrode of the gallium nitride power amplifier.
Further, the timing control circuit turns on the first switching transistor Q1 according to the control signal output by the second voltage converter. The control signal is the Ready signal of the second voltage converter, which is an open-drain output, and is Ready at a low level, that is, when the output-9.5V voltage is within the 5% standard voltage range, the Ready signal is pulled down by the conversion power supply, as shown in fig. 4, and a low level Ready signal is formed about 1 ms. When the control signal is low level, the triode Q5 is in a cut-off state, and at the same time, the Vgs voltage of the third switching transistor Q9 is 0V, so that the third switching transistor Q9 is in a cut-off state, and further, the 50V voltage of the gate of the first switching transistor Q1 is turned off along with the cut-off state, and further, the Vgs voltage of the first switching transistor Q1 is 12V through the second voltage stabilizing diode, the first switching transistor Q1 is turned on, and after the first switching transistor is turned on, the 50V voltage can be output to the drain electrode of the gallium nitride power amplifier. Through the process, the purpose of preferentially electrifying the grid of the gallium nitride power amplifier is achieved.
When the voltage output by the second voltage converter is powered down, the Ready signal is pulled up to high level when the voltage output by the second voltage converter exceeds 5%, namely-9.5V is powered down to-9V or so, as shown in fig. 5, the Ready signal is turned off about 2ms, and then the Ready signal is restored to high level. And a high signal causes transistor Q5 to conduct. After the transistor Q5 is turned on, the voltage difference of Vgs of the third switching transistor Q3 exceeds-10V by the voltage division of the first resistor and the second resistor, so that the third switching transistor Q3 is turned on. After the third switching transistor Q3 is turned on, the gate voltage and the source voltage of the first switching transistor Q1 are the same under the action of the fifth resistor, which further causes the first switching transistor to be turned off, so that the 50V voltage cannot be input to the drain of the gan power amplifier. Meanwhile, the Ready signal restores the pull-up high level, the second switching transistor Q2 is turned on, i.e., the voltage bleeder circuit is turned on, so that the voltage of the drain of the gan power amplifier is discharged to ground. Through the process, the aim of preferentially powering down the drain electrode of the gallium nitride power amplifier is fulfilled.
Last electric time sequence control circuit, it comprises simple circuit components, can adjust power amplifier's last electric time sequence and lower electric time sequence to make its chronogenesis demand when satisfying last electricity and lower electricity, ensure its steady operation, need not to realize power amplifier's last electric time sequence control through the control of singlechip and software, have simple structure, advantage with low costs.
The foregoing descriptions of specific exemplary embodiments of the present invention have been presented for purposes of illustration and description. It is not intended to limit the invention to the precise form disclosed, and obviously many modifications and variations are possible in light of the above teaching. The exemplary embodiments were chosen and described in order to explain certain principles of the invention and its practical application to enable one skilled in the art to make and use various exemplary embodiments of the invention and various alternatives and modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims and their equivalents.
Claims (14)
1. A power-up and power-down sequence control circuit is used for controlling the power-up and power-down sequence of a power amplifier, and is characterized by comprising a switch circuit, a voltage bleeder circuit and a sequence control circuit, wherein,
the drain electrode of the power amplifier is connected with the voltage output end of the first voltage converter through the switch circuit, the grid electrode of the power amplifier is connected with the voltage output end of the second voltage converter, and the switch circuit is used for controlling whether the first voltage converter inputs voltage to the drain electrode of the power amplifier or not;
the voltage bleeder circuit is connected between the drain electrode of the power amplifier and the control signal output end of the second voltage converter, and is used for controlling whether the voltage of the drain electrode of the power amplifier is grounded or not according to the control signal output by the second voltage converter;
the time sequence control circuit is connected between the switch circuit and the control signal output end of the second voltage converter and used for controlling the switch circuit to be started in a delay mode according to the control signal output by the second voltage converter.
2. The power-up and power-down timing control circuit of claim 1, wherein the switching circuit comprises a first switching transistor connected between the voltage output of the first voltage converter and the drain of the power amplifier, and a gate of the first switching transistor is connected to the timing control circuit.
3. The power-up and power-down timing control circuit of claim 1, wherein the voltage bleed circuit comprises:
a second switching transistor, the grid of which is connected with the control signal output end of the second voltage converter;
and the load is discharged, and is connected with the drain electrode of the power amplifier through the second switching transistor while being grounded.
4. The power-up and power-down timing control circuit of claim 3, wherein the voltage bleed circuit further comprises:
and the grid electrode of the second switching transistor is connected with the control signal output end of the second voltage converter through the first voltage stabilizing circuit.
5. The power-up/down timing control circuit of claim 4, wherein the first regulator circuit includes a first zener diode and a current limiting resistor, a gate of the second switching transistor is connected to the control signal output terminal of the second voltage converter through the current limiting resistor, a cathode of the first zener diode is connected between the current limiting resistor and the gate of the second switching transistor, and an anode thereof is grounded.
6. The power-on and power-off timing control circuit of claim 3, wherein the bleeding load comprises a resistor, or
A plurality of resistors connected in series, or
A plurality of resistors connected in parallel.
7. The power-on/power-off timing control circuit of claim 1, wherein the timing control circuit comprises a first voltage dividing circuit, a second voltage dividing circuit, a third voltage dividing circuit, a second voltage stabilizing circuit, a triode, and a third switching transistor, wherein,
the base electrode of the triode is respectively connected with the voltage output end of the first voltage converter and the control signal output end of the second voltage converter through a first voltage division circuit, the first electrode is connected with the voltage output end of the first voltage converter through a second voltage division circuit to form a first connecting point, and the second electrode is grounded;
the grid of the third switching transistor is connected with the second voltage division circuit, the first electrode is connected between the first connecting point and the switching circuit to form a second connecting point, and the second electrode is grounded through the third voltage division circuit;
the input end of the second voltage stabilizing circuit is connected with the third voltage dividing circuit, and the opposite end of the second voltage stabilizing circuit is connected between the second connection point and the switch circuit.
8. The power-up and power-down timing control circuit of claim 7, wherein the first voltage dividing circuit includes a third resistor and a fourth resistor connected in series, and a connection point of the third resistor and the fourth resistor is connected to a control signal output terminal of the second voltage converter.
9. The power-up/down timing control circuit according to claim 7, wherein the second voltage dividing circuit includes a first resistor and a second resistor connected in series, and a connection point formed by connecting the first resistor and the second resistor is connected to a gate of the third switching transistor.
10. The power-on/power-off timing control circuit according to claim 7, wherein the third voltage dividing circuit includes a fifth resistor and a sixth resistor connected in series, and a connection point formed by connecting the fifth resistor and the sixth resistor is connected to the switching circuit.
11. The power-up and power-down timing control circuit of claim 10, wherein the second regulator circuit includes a second zener diode, a cathode of the second zener diode being connected between the second connection point and the switch circuit, and an anode of the second zener diode being connected between a connection point formed by connecting the fifth resistor and the sixth resistor and the fifth resistor.
12. The power-on/power-off timing control circuit as claimed in claim 1, wherein the voltage output terminal of the second voltage converter is connected to the gate of the power amplifier through a filter capacitor and an analog load, one end of the analog load is connected to the voltage output terminal of the second voltage converter to form a third connection point, the opposite end is connected to ground, one end of the filter capacitor is connected between the third connection point and the voltage output terminal of the second voltage converter, and the opposite end is connected to ground.
13. The power-on/power-off timing control circuit of claim 12, wherein the analog load comprises a resistor, or
A plurality of resistors connected in series, or
A plurality of resistors connected in parallel.
14. The power-up and power-down timing control circuit of claim 1, wherein the power amplifier is a gallium nitride power amplifier.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223103573.6U CN218772040U (en) | 2022-11-22 | 2022-11-22 | Power-on and power-off time sequence control circuit |
| PCT/CN2023/090600 WO2024108893A1 (en) | 2022-11-22 | 2023-04-25 | Power-on and power-off sequence control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223103573.6U CN218772040U (en) | 2022-11-22 | 2022-11-22 | Power-on and power-off time sequence control circuit |
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| Publication Number | Publication Date |
|---|---|
| CN218772040U true CN218772040U (en) | 2023-03-28 |
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| CN202223103573.6U Active CN218772040U (en) | 2022-11-22 | 2022-11-22 | Power-on and power-off time sequence control circuit |
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| Country | Link |
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| CN (1) | CN218772040U (en) |
| WO (1) | WO2024108893A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024108893A1 (en) * | 2022-11-22 | 2024-05-30 | 普罗斯通信技术（苏州）有限公司 | Power-on and power-off sequence control circuit |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104272585B (en) * | 2012-05-08 | 2017-08-01 | 株式会社村田制作所 | High-frequency power amplifying circuit supply unit and high-frequency power amplifier |
| US11017983B2 (en) * | 2015-02-18 | 2021-05-25 | Reno Technologies, Inc. | RF power amplifier |
| CN107528553B (en) * | 2017-06-28 | 2020-08-18 | 中国电子科技集团公司第七研究所 | GaN power amplifier tube bias protection circuit |
| CN109995354B (en) * | 2019-05-08 | 2024-04-09 | 博为科技有限公司 | Voltage fluctuation resistant delay switch circuit based on rising edge sampling |
| CN110380709B (en) * | 2019-07-12 | 2021-08-27 | 浙江大学 | High-speed grid pulse modulation circuit and radio frequency power amplifier |
| CN111817669A (en) * | 2020-06-30 | 2020-10-23 | 三维通信股份有限公司 | Control system of GaN power amplifier tube |
| CN218772040U (en) * | 2022-11-22 | 2023-03-28 | 普罗斯通信技术（苏州）有限公司 | Power-on and power-off time sequence control circuit |
-
2022
- 2022-11-22 CN CN202223103573.6U patent/CN218772040U/en active Active
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2023
- 2023-04-25 WO PCT/CN2023/090600 patent/WO2024108893A1/en unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024108893A1 (en) * | 2022-11-22 | 2024-05-30 | 普罗斯通信技术（苏州）有限公司 | Power-on and power-off sequence control circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2024108893A1 (en) | 2024-05-30 |
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