CN218734209U - Power amplifier with improved bias follow-up - Google Patents

Power amplifier with improved bias follow-up Download PDF

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CN218734209U
CN218734209U CN202222627836.7U CN202222627836U CN218734209U CN 218734209 U CN218734209 U CN 218734209U CN 202222627836 U CN202222627836 U CN 202222627836U CN 218734209 U CN218734209 U CN 218734209U
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power amplifier
current
digital
module
analog
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杨澄
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Guangzhou Gordon Audio Technology Co ltd
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Guangzhou Gordon Audio Technology Co ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

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Abstract

The utility model provides a power amplifier of biasing followability improves, include: the device comprises an input end, a bias power amplifier module and an output end; the device also comprises a current sampling module, an analog-to-digital converter, a digital signal processor/DSP, a digital-to-analog converter, a low-pass filter, a current-voltage converter and a current control voltage module; the ADC converts the measured analog voltage into digital voltage and sends the digital voltage to the DSP, the signal acquired by the DSP is subjected to model matching with a pre-established power amplifier stage deflection model, whether an overload trend exists or not is detected, whether the power amplifier is about to exceed a deflection linear interval or not is detected, whether the power amplifier deflection is adjusted or not is determined, a strong overload trend (short circuit) exists or not is determined, and the power amplifier final stage is closed in time; for the deviation-exceeding advanced area (type A area), overfitting compensation is carried out to a certain degree, so that the power amplification stage is always in a high-linearity area, and meanwhile, the fixed deviation current is reduced, and the power consumption is reduced; the equipment is protected. The problems that the traditional power amplifier adopts analog bias, the discreteness is large, and the bias following performance is poor are solved; the utility model discloses a high-speed sampling and signal processing loop circuit, effective protection circuit is not destroyed when improving the biased followability problem.

Description

Power amplifier with improved bias follow-up
Technical Field
The utility model relates to an audio amplifier field, concretely relates to improve power amplifier of biasing followability.
Background
A power amplifier refers to an amplifier that produces maximum power output to drive a load (e.g., a speaker) at a given distortion rate. The power amplifier plays a role of 'organization and coordination' in the whole sound system, and governs to some extent whether the whole system can provide good sound quality output.
Power amplifiers can be generally classified into class a, class B, class a/B, class D, and the like; for example, application No. CN201420530849.5 discloses an AB class power amplifier circuit, which comprises a DSP high pitch signal input circuit, a switch mute circuit, a power down circuit, an over-temperature protection circuit, a power protection circuit, an over-current limiting protection circuit, a direct current protection detection circuit, a limiting circuit, an AB power amplifier and a tweeter; the output signal of the DSP high pitch signal input circuit sequentially passes through the switch mute circuit, the power reducing circuit and the AB power amplifier and then reaches the high pitch loudspeaker; the over-temperature protection circuit is connected with the power supply protection circuit, a temperature detector is arranged to be connected with the power amplifier radiator, and the temperature detector is respectively connected with the power reduction circuit and the over-temperature protection circuit; the over-temperature protection circuit, the over-current-limiting protection circuit, the direct-current protection detection circuit and the amplitude limiting circuit are connected with the AB power amplifier; the direct current protection detection circuit is connected with the power supply protection circuit, and the amplitude limiting circuit controls the input of the AB power amplifier through the optical coupler.
Application number CN201910096690.8 discloses a digital power amplifier system, including first composition branch road and second composition branch road, first composition branch road includes: a first switch structure and a first current source in series, the first current source comprising: fourth resistance, first field effect transistor, second field effect transistor and second operational amplifier, the second branch of composition includes: a second switch structure and a second current source in series, the second current source comprising: and when the fifth resistor, the third field effect transistor, the fourth field effect transistor and the third operational amplifier are applied to a digital power amplifier system, the equivalent output impedance of the digital-analog converter is increased, and the power supply rejection ratio of the digital power amplifier system is reduced. The traditional power amplifier adopts analog bias, and has large discreteness and poor bias following performance.
The utility model discloses a high-speed sampling and signal processing loop circuit, effective protection circuit is not destroyed when improving the biased followability problem.
SUMMERY OF THE UTILITY MODEL
In order to solve the above problem, the present invention provides a power amplifier with improved bias follow-up, including: the device comprises an input end, a bias power amplifier module and an output end; the device also comprises a current sampling module, an analog-to-digital converter, a digital signal processor/DSP, a digital-to-analog converter, a low-pass filter, a current-voltage converter and a current control voltage module;
the input end of the bias power amplification module is connected with the input end of the bias power amplification module, the first output end of the bias power amplification module is connected with the output end, the second output end of the bias power amplification module is connected with the input end of the current sampling module, the output end of the current sampling module is connected with the input end of the analog-to-digital converter, the output end of the analog-to-digital converter is connected with the input end of the DSP, the output end of the DSP is connected with the input end of the digital-to-analog converter, the output end of the digital-to-analog converter is connected with the input end of the low-pass filter, the output end of the low-pass filter is connected with the input end of the current-voltage converter, the output end of the current-voltage converter is connected with the input end of the current control voltage module, and the output end of the current control voltage module is connected with the bias power amplification module;
the sampling rate of the analog-to-digital converter and the digital-to-analog converter is 100kSPS;
the current sampling module comprises a circuit for current-voltage conversion and low-pass filtering. And carrying out model matching on the signals acquired by the DSP and a pre-established power amplifier bias model by taking 5ms as a unit.
The power amplifier bias model in the DSP carries out two kinds of identification, which are respectively:
1) Detecting whether an overload trend exists;
2) Detecting whether the power amplifier is about to exceed a bias linear interval or not;
if the overload trend exists, the final stage of the power amplifier is closed, and if the overload trend exceeds the bias linear region, the voltage control data is used for performing overfitting compensation on the bias power amplifier module, so that the power amplifier stage of the bias power amplifier is always in a high linear region.
The power amplifier bias model comprises two parts, wherein the first part is an overload identification model and is used for detecting whether an overload trend exists and carrying out corresponding control, and the second part is a compensation model and is used for detecting whether the power amplifier is about to exceed a bias linear interval and applying corresponding control;
after the voltage control data are input into the digital-to-analog converter, the voltage control data enter the current-to-voltage converter through the low-pass filter to obtain control current; the control current is input into the current control voltage module to obtain the regulated voltage, and the regulated voltage and the input signal are loaded to the bias amplification module together.
The current sampling module comprises a circuit for current-voltage conversion and low-pass filtering at the same time, and the circuit converts a current signal into a voltage signal and performs low-pass filtering at the same time; the purpose of the low-pass filtering is to remove out-of-band interference.
The bias power amplifier module comprises two resistors connected in series, an NPN triode and a PNP triode; the base electrode of the NPN triode and the base electrode of the PNP triode are both connected with the driving output; two resistors connected in series are connected between the emitter of the NPN triode and the emitter of the PNP triode, and an output is formed between the two resistors connected in series;
the collector of the NPN triode is connected with the vcc, and the base of the PNP triode is connected with the vee.
The DSP chip uses TMS320C6713B series of Texas Instruments.
The maximum clock frequency of the DSP chip is 300MHz, and TMS320 is adopted as a core.
The utility model has the advantages that:
the utility model discloses ADC will measure the analog voltage conversion that the gained and figure, send into DSP, in order to ensure the followability of control and the real-time of protection, the ADC sampling rate is 100KSPS, the signal that DSP gathered is carried out the model matching with the power amplifier level paranoia model that is set up in advance with 5mS as the unit, detect whether there is the overload trend, detect whether the power amplifier is about to surpass the paranoia linear interval, thereby whether the decision is adjusted the power amplifier paranoia, there is strong overload trend (short circuit), close the power amplifier final stage in time; for the deviation-exceeding advanced area (type A area), overfitting compensation is carried out to a certain degree, so that the power amplification stage is always in a high-linearity area, and meanwhile, the fixed deviation current is reduced, and the power consumption is reduced; the equipment is protected. The problems that the traditional power amplifier adopts analog bias, the discreteness is large, and the bias following performance is poor are solved; the utility model discloses a high-speed sampling and signal processing loop circuit, effective protection circuit is not destroyed when improving the biased followability problem.
The utility model discloses to the signal time domain-frequency domain transform of inputing in the DSP, compare the waveform energy of frequency domain with energy threshold, if the waveform energy exceedes energy threshold then DSP control closes the power amplifier final stage; the graph of the frequency domain signal, the peak height Pmax corresponding to the strongest frequency Fmax and Fmax, the full width at half maximum Wmax corresponding to Fmax and the energy value sum M of the characteristic frequency section are used as input, and the corresponding voltage control data is used as output to construct a neural network model, so that the speed and the accuracy of data processing are greatly improved, the problem of bias following is solved, and meanwhile, the circuit is effectively protected.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without inventive exercise.
FIG. 1 is a schematic diagram of the overall structure of the present invention;
fig. 2 is a circuit structure diagram of the present invention.
Wherein Q represents a triode and R represents a resistor; q4, Q6, R3 and R4 form the output stage of the power amplifier; q1, Q2, Q3, Q5, Q7, Q8, R1, R2, R5, R6 and R8 form a proportional current duplicator of the power output stage; and finishing current-voltage conversion at R7 and OP-1, and forming a low-pass filter by C1 and R7 to remove out-of-band interference.
Detailed Description
Example 1:
referring to fig. 1, the present invention provides a power amplifier with improved bias follow-up, comprising: the device comprises an input end, a bias power amplifier module and an output end; the device also comprises a current sampling module, an analog-to-digital converter, a digital signal processor/DSP, a digital-to-analog converter, a low-pass filter, a current-voltage converter and a current control voltage module;
the input end of the bias power amplifier module is connected with the input end of the bias power amplifier module, the first output end of the bias power amplifier module is connected with the output end, the second output end of the bias power amplifier module is connected with the input end of the current sampling module, the output end of the current sampling module is connected with the input end of the analog-to-digital converter, the output end of the analog-to-digital converter is connected with the input end of the DSP, the output end of the DSP is connected with the input end of the digital-to-analog converter, the output end of the digital-to-analog converter is connected with the input end of the low-pass filter, the output end of the low-pass filter is connected with the input end of the current-voltage converter, the output end of the current-voltage converter is connected with the input end of the current control voltage module, and the output end of the current control voltage module is connected with the bias power amplifier module;
the sampling rate of the analog-to-digital converter and the digital-to-analog converter is 100kSPS;
the current sampling module comprises a circuit for current-voltage conversion and low-pass filtering.
Specifically, the bias power amplifier module is respectively connected with an input end and an output end, wherein the input end is used for inputting signals, the signals are amplified after passing through the bias amplifier, and then the signals are output through the output end;
the current sampling module is connected with the bias power amplifier module and is used for copying proportional current of an output stage of the bias power amplifier module, and then the copied current is converted into a digital signal through the analog-to-digital conversion module and is input into the DSP;
inputting the signal into a power amplifier bias model in the DSP for matching, and outputting voltage control data;
after the voltage control data are input into the digital-to-analog converter, the voltage control data enter the current-to-voltage converter through the low-pass filter to obtain control current; the control current is input into the current control voltage module to obtain the regulated voltage, and the regulated voltage and the input signal are loaded to the bias amplification module together.
And carrying out model matching on the signals acquired by the DSP and a pre-established power amplifier bias model by taking 5ms as a unit.
The sampling rate of the analog-to-digital converter and the digital-to-analog converter is 100kSPS.
After the voltage control data are input into the digital-to-analog converter, the voltage control data enter the current-to-voltage converter through the low-pass filter to obtain control current; the control current is input into the current control voltage module to obtain the regulated voltage, and the regulated voltage and the input signal are loaded to the bias amplification module together.
Example 2:
see fig. 2 for the circuit structure diagram of the present invention:
the DSP chip is made of TMS320C6713B series of Texas Instruments.
The maximum clock frequency of the DSP chip is 300MHz, and TMS320 is adopted as a core.
The bias power amplifier module comprises two resistors R3 and R4 which are connected in series, an NPN triode Q6 and a PNP triode Q4; the base electrode of the NPN triode Q6 and the base electrode of the PNP triode Q4 are both connected with the driving output; two resistors connected in series are connected between the emitter of the NPN triode Q6 and the emitter of the PNP triode Q4, and an output is formed between the two resistors connected in series;
the collector of the NPN triode Q6 is connected with vcc, and the base of the PNP triode Q4 is connected with vee.
Q1, Q2, Q3, Q5, Q7, Q8, R1, R2, R5, R6 and R8 constitute a proportional current duplicator of the power output stage.
R7, OP-1 and C1 are connected in parallel to form a circuit for current-voltage conversion and low-pass filtering, and the circuit converts a current signal into a voltage signal and performs low-pass filtering; the purpose of the low-pass filtering is to remove out-of-band interference.
Q1, Q2, Q3, Q5 are PNP triode, Q7, Q8 are NPN triode; one end of R1, R2 and R5 is connected with Vcc, the other end of R1 is connected with an emitting electrode of Q1, the other end of R2 is connected with an emitting electrode of Q2, the other end of R3 is connected with an emitting electrode of Q3 and a base electrode of Q5, the emitting electrode of Q5 is connected with Vcc, and a collector electrode of Q5 is grounded through R6 after being connected with the base electrode of Q3;
the collector and the base of Q1 are connected and then connected to the collector of Q7, the emitter of Q7 is connected with the emitter of Q6, and the base of Q7 is connected with the base of Q8, the collector of Q8 and the collector of Q3; the collector of Q2 is connected with one end of R9 and the negative end of OP-1, and the other end of R9 is connected with the positive end of OP-1. R7, OP-1 and C1 are connected in parallel, and OP-1 is output to a high-speed ADC (analog-to-digital converter).
The foregoing description of the embodiments has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same elements or features may also vary in many respects. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.
Example embodiments are provided so that this disclosure will be thorough, and will fully convey the scope to those skilled in the art. Numerous details are set forth, such as examples of specific parts, devices, and methods, in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to those skilled in the art that specific details need not be employed, that example embodiments may be embodied in many different forms and that neither should be construed to limit the scope of the disclosure. In certain example embodiments, well-known processes, well-known device structures, and well-known technologies are not described in detail.
The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises" and "comprising" are intended to be inclusive and therefore specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order discussed and illustrated, unless explicitly indicated as an order of performance. It should also be understood that additional or alternative steps may be employed.

Claims (4)

1. A power amplifier with improved bias follow comprising: the device comprises an input end, a bias power amplifier module and an output end; the method is characterized in that: the device also comprises a current sampling module, an analog-to-digital converter, a digital signal processor/DSP, a digital-to-analog converter, a low-pass filter, a current-voltage converter and a current control voltage module;
the input end of the bias power amplifier module is connected with the input end of the bias power amplifier module, the first output end of the bias power amplifier module is connected with the output end, the second output end of the bias power amplifier module is connected with the input end of the current sampling module, the output end of the current sampling module is connected with the input end of the analog-to-digital converter, the output end of the analog-to-digital converter is connected with the input end of the DSP, the output end of the DSP is connected with the input end of the digital-to-analog converter, the output end of the digital-to-analog converter is connected with the input end of the low-pass filter, the output end of the low-pass filter is connected with the input end of the current-voltage converter, the output end of the current-voltage converter is connected with the input end of the current control voltage module, and the output end of the current control voltage module is connected with the bias power amplifier module;
the sampling rate of the analog-to-digital converter and the digital-to-analog converter is 100kSPS;
the current sampling module comprises a circuit for current-voltage conversion and low-pass filtering.
2. The power amplifier of claim 1, wherein:
the bias power amplifier module comprises two resistors connected in series, an NPN triode and a PNP triode; the base electrode of the NPN triode and the base electrode of the PNP triode are both connected with the driving output; two resistors connected in series are connected between the emitting electrode of the NPN triode and the emitting electrode of the PNP triode, and output is formed between the two resistors connected in series;
the collector of the NPN triode is connected with the vcc, and the base of the PNP triode is connected with the vee.
3. The power amplifier of claim 1, wherein:
the DSP chip adopts TMS320C6713B series.
4. The power amplifier of claim 1, wherein:
the maximum clock frequency of the DSP chip is 300MHz, and TMS320 is adopted as a core.
CN202222627836.7U 2022-10-08 2022-10-08 Power amplifier with improved bias follow-up Active CN218734209U (en)

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CN202222627836.7U CN218734209U (en) 2022-10-08 2022-10-08 Power amplifier with improved bias follow-up

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Application Number Priority Date Filing Date Title
CN202222627836.7U CN218734209U (en) 2022-10-08 2022-10-08 Power amplifier with improved bias follow-up

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CN218734209U true CN218734209U (en) 2023-03-24

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