CN218677146U - Power module and vehicle with same - Google Patents

Abstract

The utility model discloses a power module and have its vehicle, power module includes insulating substrate, chip, first bonding wire and second bonding wire, is provided with a plurality of spaced conducting layers on the insulating substrate, and a plurality of conducting layers connect different terminals; the chip is arranged on one of the conductive layers; the first bonding wire is connected to one side of the chip and the other of the plurality of conductive layers; and a second bonding wire is connected to the other side of the chip and another of the plurality of conductive layers. Therefore, the first bonding wire and the second bonding wire are arranged on the chip, so that the chip is suitable for being connected with the conducting layer by using the first bonding wire and the second bonding wire, the connection between the chip and the conducting layer is more reliable, the loop noise is reduced, and the current uniformity of the parallel chips is improved so as to improve the service performance of the power module.

Description

Power module and vehicle with same

Technical Field

The utility model belongs to the technical field of the power module technique and specifically relates to a power module and have its vehicle is related to.

Background

In the prior art, a power module is usually provided in a vehicle to perform different types of current flow and guidance. In the related art, a wire bonding is usually provided on a single side of a chip in a power module to form a current flow of the power module. And the form of single-side routing is adopted, the number of routing that can connect is limited, and the average current to single line is great, and the dynamic current sharing characteristic between the parallelly connected chips is relatively poor, influences the performance of power module.

SUMMERY OF THE UTILITY MODEL

The utility model discloses aim at solving one of the technical problem that exists among the prior art at least. Therefore, an object of the utility model is to provide a power module, chip top electrical connection is comparatively reliable in the power module, and the characteristic of flow equalizing is more excellent, and performance is more reliable.

Another object of the present invention is to provide a vehicle, wherein the power module is installed in the vehicle.

According to the utility model discloses power module, include: the chip comprises an insulating substrate, a chip, a first bonding wire and a second bonding wire, wherein a plurality of spaced conductive layers are arranged on the insulating substrate, and the conductive layers are connected with different terminals; the chip is arranged on one of the conducting layers; the first bonding wire is connected to one side of the chip and the other of the conductive layers; and the second bonding wire is connected to the other side of the chip and the other of the plurality of conductive layers.

According to the utility model discloses power module, through be equipped with first bonding wire and second bonding wire on the chip, be suitable for and use first bonding wire and second bonding wire to let chip and conducting layer be connected to it is more reliable to be connected between chip and the conducting layer, and reduce the return circuit and feel miscellaneous, improves parallelly connected chip homodromous nature in order to promote power module's performance.

In some embodiments, the plurality of conductive layers comprises: a first conductive layer connecting the DC + terminal, a second conductive layer connecting the DC-terminal, and a third conductive layer connecting the AC terminal; the chip is arranged on the first conducting layer, and the corresponding first bonding wire and the corresponding second bonding wire are connected to the third conducting layer; and/or the chip is arranged on the third conductive layer, and the corresponding first bonding wire and the corresponding second bonding wire are connected to the second conductive layer.

In some embodiments, the chip comprises: the first chips are sequentially arranged to form a first chip group, the first chip group is arranged on the first conducting layer, and the third conducting layer is wound on two sides of the first chip group; and/or the chip comprises: the second chips are sequentially arranged to form a second chip group, the second chip group is arranged on the third conducting layer, and the second conducting layer is wound on two sides of the second chip group.

In some embodiments, the third conductive layer comprises: the first connection area and the second connection area are connected to the third connection area and arranged on the third connection area at intervals, a part of the first conductive layer is provided with the first chip group and extends into a position between the first connection area and the second connection area, the first bonding wire corresponding to the first chip is connected to the first connection area, the second bonding wire is connected to the second connection area, and the third connection area is connected with the AC terminal.

In some embodiments, the first chip sets are two, the first connection regions are two and are distributed on two sides of the second connection region, the two first chip sets are correspondingly arranged between the first connection regions and the second connection regions one by one, and the corresponding second bonding wires are connected to the second connection regions.

In some embodiments, the second conductive layer comprises: a fourth connection region, a fifth connection region and a sixth connection region, wherein the fourth connection region and the fifth connection region are connected to the sixth connection region and are arranged at intervals on the sixth connection region, and the sixth connection region is connected with the DC-terminal; the third conductive layer further includes: the second chip set is arranged on the seventh connection area, the first bonding wire corresponding to the second chip is connected to the fourth connection area, and the second bonding wire is connected to the fifth connection area.

In some embodiments, two sets of the second chip sets are disposed, two fifth connection areas are disposed on two sides of the sixth connection area, two seventh connection areas are disposed between the fourth connection area and the fifth connection area in a one-to-one correspondence manner, two sets of the second chip sets are disposed on the two seventh connection areas respectively, and the corresponding second bonding wires are connected to the fifth connection area.

In some embodiments, the second conductive layer comprises: a fourth connection area, a fifth connection area and a sixth connection area, wherein the fourth connection area and the fifth connection area are connected to the sixth connection area and are arranged at intervals on the sixth connection area, and the sixth connection area is connected with the DC-terminal; the third conductive layer further includes: a seventh connection area connected to the third connection area and spaced apart from the first connection area and the second connection area on the third connection area, the seventh connection area being located between the fourth connection area and the fifth connection area, the second chipset being disposed on the seventh connection area, the first bonding wire corresponding to the second chip being connected to the fourth connection area and the second bonding wire being connected to the fifth connection area.

In some embodiments, the first chip groups are two groups, the first connection regions and the second connection regions are two and symmetrically distributed on two sides of the seventh connection region, and the two groups of the first chip groups are arranged between the first connection regions and the second connection regions in a one-to-one correspondence; the number of the second chip sets is two, the number of the fourth connecting areas and the number of the fifth connecting areas are two, the number of the seventh connecting areas is two, the two seventh connecting areas are respectively arranged between the corresponding fourth connecting areas and the corresponding fifth connecting areas, and the number of the second chip sets is two, and the two second chip sets are respectively and correspondingly arranged in the two seventh connecting areas.

According to the utility model discloses vehicle, include: a power module as described above.

According to the utility model discloses the vehicle is through being equipped with as above shown power module in the vehicle, owing to be equipped with first bonding wire and second bonding wire on the chip, is suitable for and uses first bonding wire and second bonding wire to let the chip be connected with the conducting layer to it is more reliable to make to be connected between chip and the conducting layer, and reduces the miscellaneous sense in return circuit, improves the performance of parallelly connected chip homodromous nature in order to promote power module, thereby lets the performance of vehicle obtain promoting.

Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.

Drawings

The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

fig. 1 is a schematic structural diagram of a power module according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of a power module according to an embodiment of the present invention.

Reference numerals:

the power module (10) is provided with a power supply,

an insulating substrate 100, a conductive layer 110, a first conductive layer 111, a second conductive layer 112, a fourth connection region 1121, a fifth connection region 1122, a sixth connection region 1123, a third conductive layer 113, a first connection region 1131, a second connection region 1132, a third connection region 1133, a seventh connection region 1134, a terminal 120, a DC + terminal 121, a DC-terminal 122, an AC terminal 123,

chip 200, first chip 210, first chipset 220, second chip 230, second chipset 240,

a first bonding wire 300 is bonded to the first substrate,

and a second bonding wire 400.

Detailed Description

Embodiments of the present invention are described in detail below, and the embodiments described with reference to the drawings are exemplary.

A power module 10 according to an embodiment of the present invention is described below with reference to fig. 1-2, including: an insulating substrate 100, a chip 200, a first bonding wire 300, and a second bonding wire 400.

Specifically, a plurality of conductive layers 110 are provided at intervals on the insulating substrate 100, and the plurality of conductive layers 110 are connected to different terminals 120; the chip 200 is disposed on one of the plurality of conductive layers 110; the first bonding wire 300 is connected to one side of the chip 200 and another one of the plurality of conductive layers 110; and, the second bonding wire 400 is connected to the other side of the chip 200 and another one of the plurality of conductive layers 110.

It should be noted that the insulating substrate 100 is suitable for explaining the insulating arrangement between the insulating substrate 100 and the external environment, so as to prevent the current from flowing through the external environment, and improve the safety of the power module 10. Specifically, the insulating substrate 100 is provided with a plurality of conductive layers 110, the plurality of conductive layers 110 are suitable for being spaced apart from each other, so that different conductive layers 110 are suitable for conducting with different terminals 120, and the chip 200 is suitable for being constructed on the conductive layers 110 and is suitable for being connected with another conductive layer 110 through a first bonding wire 300 and a second bonding wire 400, so as to form a conducting arrangement of the plurality of conductive layers 110.

According to the utility model discloses power module 10, through be equipped with first bonding wire 300 and second bonding wire 400 on chip 200, be suitable for and use first bonding wire 300 and second bonding wire 400 to let chip 200 be connected with conducting layer 110 to it is more reliable to be connected between chip 200 and the conducting layer 110, and reduces the return circuit and feels, improves parallelly connected chip 200 homodromous nature, with the performance that promotes power module 10.

In some embodiments, the plurality of conductive layers 110 includes: a first conductive layer 111, a second conductive layer 112 and a third conductive layer 113, the first conductive layer 111 being connected to the DC + terminal 121, the second conductive layer 112 being connected to the DC-terminal 122, the third conductive layer 113 being connected to the AC terminal 123; the chip 200 is disposed on the first conductive layer 111, and the corresponding first bonding wire 300 and the second bonding wire 400 are both connected to the third conductive layer 113; and/or the chip 200 is disposed on the third conductive layer 113 and the corresponding first bonding wire 300 and second bonding wire 400 are connected to the second conductive layer 112.

It is understood that the first conductive layer 111, the second conductive layer 112 and the third conductive layer 113 are suitable for connecting with different terminals 120, and allow current to be suitable for connecting with different terminals 120 under the guidance of the different conductive layers 110 to form the operational performance of the power module 10. In a specific use case, the chip 200 is suitable for being constructed on the first conductive layer 111 to control the electrical connection effect between the chip and the third conductive layer 113, or the chip 200 is suitable for being constructed on the third conductive layer 113 to control the electrical connection effect between the chip and the second conductive layer 112. In this way, the performance of the power module 10 can be controlled by the chip 200, and the current flowing through the chip 200 is suitable for flowing through the first bonding wire 300 or the second bonding wire 400, and the performance of the power module 10 is improved by using the first bonding wire 300 and the second bonding wire 400.

In some embodiments, chip 200 includes: the plurality of first chips 210 are sequentially arranged to form a first chip group 220, the first chip group 220 is arranged on the first conductive layer 111, and the third conductive layer 113 is wound on two sides of the first chip group 220; and/or chip 200 includes: the plurality of second chips 230, the plurality of second chips 230 are sequentially arranged to form a second chip group 240, the second chip group 240 is disposed on the third conductive layer 113, and the second conductive layer 112 is disposed around two sides of the second chip group 240.

It should be noted that the chip 200 is suitable for including a first chip 210 and a second chip 230, the first chip 210 is arranged and combined to form a first chip set 220, the second chip 230 is arranged and combined to form a second chip set 240, and in the use process of the power module 10, the first chip set 220 and the second chip set 240 are suitable for communicating with other conductive layers 110 to form a conductive use of the power module 10.

In some embodiments, the third conductive layer 113 includes: the chip package structure includes a first connection region 1131, a second connection region 1132 and a third connection region 1133, the first connection region 1131 and the second connection region 1132 are connected to the third connection region 1133 and are spaced apart from each other on the third connection region 1133, a portion of the first conductive layer 111 is provided with the first chip group 220 and extends between the first connection region 1131 and the second connection region 1132, a first bonding wire 300 corresponding to the first chip 210 is connected to the first connection region 1131, the second bonding wire 400 is connected to the second connection region 1132, and the third connection region 1133 is connected to the AC terminal 123.

It can be understood that the third conductive layer 113 includes a first connection region 1131, a second connection region 1132 and a third connection region 1133, the first connection region 1131 is adapted to provide a space for constructing the first bonding wire 300, and the second connection region 1132 is adapted to provide a space for constructing the second bonding wire 400, so that the connection configuration between the first chip set 220 disposed on the first conductive layer 111 and the third conductive layer 113 is simpler and more reliable, and the current fluctuation is reduced, thereby improving the performance.

In some embodiments, there are two first chip assemblies 220, two first connection regions 1131 are disposed on two sides of the second connection region 1132, and two first chip assemblies 220 are disposed between the first connection regions 1131 and the second connection region 1132 in a one-to-one correspondence manner and the corresponding second bonding wires 400 are connected to the second connection region 1132. In this way, the first chip set 220 is suitable to be disposed between the first connection region 1131 and the second connection region 1132, and the correspondingly disposed second bonding wire 400 is suitable to be connected to the second connection region 1132, so that the current is suitable to be assembled and connected through the opposite arrangement, so as to form the operational performance of the power module 10.

In some embodiments, the second conductive layer 112 includes: a fourth connection region 1121, a fifth connection region 1122, and a sixth connection region 1123, the fourth connection region 1121 and the fifth connection region 1122 each being connected to the sixth connection region 1123 and being provided at an interval on the sixth connection region 1123, the sixth connection region 1123 being connected to the DC-terminal 122; the third conductive layer 113 further includes: a seventh connection region 1134, the seventh connection region 1134 is connected to a side of the second connection region 1132 away from the first connection region 1131, the second chip set 240 is disposed on the seventh connection region 1134, the first bonding wire 300 corresponding to the second chip 230 is connected to the fourth connection region 1121, and the second bonding wire 400 is connected to the fifth connection region 1122. It is understood that the second chip set 240 is adapted to be built in the seventh connection region 1134, so that the first bonding wire 300 provided on the second chip 230 is correspondingly connected in the fourth connection region 1121, and the second bonding wire 400 provided on the second chip 230 is correspondingly connected in the fifth connection region 1122, and is communicated with the sixth connection region 1123 through the connection of the fourth connection region 1121 and the fifth connection region 1122, so as to form a communicating usage of the DC-terminal 122.

In some embodiments, there are two sets of the second chip sets 240, two fifth connection regions 1122 are disposed on two sides of the sixth connection region 1123, two seventh connection regions 1134 are disposed between the fourth connection region 1121 and the fifth connection region 1122 in a one-to-one correspondence manner, the two sets of the second chip sets 240 are disposed on the two seventh connection regions 1134 respectively, and the corresponding second bonding wires 400 are connected to the fifth connection region 1122. Therefore, the second chipset 240 is disposed in two to be correspondingly disposed in the seventh connection area 1134, so that the second bonding wire 400 on the second chipset 240 is suitable for being connected in the fifth connection area 1122, thereby configuring the performance of the power module 10.

In some embodiments, the second conductive layer 112 includes: a fourth connection region 1121, a fifth connection region 1122, and a sixth connection region 1123, the fourth connection region 1121 and the fifth connection region 1122 each being connected to the sixth connection region 1123 and being provided at an interval on the sixth connection region 1123, the sixth connection region 1123 being connected to the DC-terminal 122; the third conductive layer 113 further includes: a seventh connection region 1134, the seventh connection region 1134 is connected to the third connection region 1133 and is spaced apart from the first connection region 1131 and the second connection region 1132 on the third connection region 1133, the seventh connection region 1134 is located between the fourth connection region 1121 and the fifth connection region 1122, the second chipset 240 is disposed on the seventh connection region 1134, the first bonding wire 300 corresponding to the second chip 230 is connected to the fourth connection region 1121, and the second bonding wire 400 is connected to the fifth connection region 1122. It is understood that, in the above embodiment, the seventh connection region 1134 is adapted to be connected to the second connection region 1132, and in the present embodiment, the seventh connection region 1134 is adapted to be connected to the third connection region 1133, so that the second chipset 240 is disposed in the seventh connection region 1134 and adapted to be connected by the first bonding wire 300 and the second bonding wire 400 and correspondingly disposed in the fourth connection region 1121 and the fifth connection region 1122, so as to form different arrangement manners of the second chipset 240 on the power module 10, so that the chip 200 on the power module 10 can be disposed in different manners according to requirements, thereby improving the applicability of the present application.

In some embodiments, the first chip assemblies 220 are two groups, the first connection regions 1131 and the second connection regions 1132 are both two and symmetrically distributed on two sides of the seventh connection region 1134, and the two groups of first chip assemblies 220 are disposed between the first connection regions 1131 and the second connection regions 1132 in a one-to-one correspondence; two sets of second chip sets 240 are disposed, each of the fourth connection regions 1121 and the fifth connection regions 1122 is two, each of the seventh connection regions 1134 is two, the two seventh connection regions 1134 are disposed between the corresponding fourth connection regions 1121 and the corresponding fifth connection regions 1122, and the two sets of second chip sets 240 are disposed in the two seventh connection regions 1134 respectively. In this way, by providing two seventh connection regions 1134, two seventh connection regions 1134 are respectively disposed between the corresponding fourth connection region 1121 and fifth connection region 1122, when two sets of second chip sets 240 are respectively disposed in the two seventh connection regions 1134, the second chip sets 240 and the first bonding wires 300 and the second bonding wires 400 disposed thereon can be adapted to connect the corresponding fourth connection region 1121 and the corresponding fifth connection region 1122 according to the arrangement, so that the assembly arrangement of the power module 10 is more reliable.

According to the utility model discloses vehicle, include: such as power module 10 above.

It should be noted that, in the assembly and construction of the power module 10, the connection is suitably performed through the first bonding wire 300 and the second bonding wire 400 provided on the chip 200, so as to make the current flow on the chip 200 more stable and reliable. Meanwhile, an aluminum bonding wire can be adopted to reduce the cost.

Thus, by arranging the power module 10 as shown above in the vehicle, since the chip 200 is provided with the first bonding wire 300 and the second bonding wire 400, the chip 200 and the conductive layer 110 can be connected by using the first bonding wire 300 and the second bonding wire 400, so that the connection between the chip 200 and the conductive layer 110 is more reliable, the loop noise is reduced, the current uniformity of the parallel chips 200 is improved, the use performance of the power module 10 is improved, and the use performance of the vehicle is improved.

Other configurations and operations of vehicles according to embodiments of the present invention are known to those of ordinary skill in the art and will not be described in detail herein.

In the description herein, references to the description of the term "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples" or the like mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example.

While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims (10)

1. A power module, comprising:

an insulating substrate (100), wherein a plurality of conductive layers (110) are arranged at intervals on the insulating substrate (100), and the plurality of conductive layers (110) are connected with different terminals (120);

a chip (200), said chip (200) being disposed on one of a plurality of said conductive layers (110);

a first wire bond (300), the first wire bond (300) connected to one side of the chip (200) and to another of the plurality of conductive layers (110); and

a second wire bond (400), said second wire bond (400) connected to another side of said chip (200) and to said another of said plurality of conductive layers (110).

2. The power module of claim 1, wherein the plurality of conductive layers (110) comprises: a first conductive layer (111), a second conductive layer (112) and a third conductive layer (113), the first conductive layer (111) being connected to a DC + terminal (121), the second conductive layer (112) being connected to a DC-terminal (122), the third conductive layer (113) being connected to an AC terminal (123);

the chip (200) is arranged on the first conductive layer (111) and the corresponding first bonding wire (300) and the corresponding second bonding wire (400) are connected to the third conductive layer (113); and/or

The chip (200) is disposed on the third conductive layer (113), and the corresponding first bonding wire (300) and the corresponding second bonding wire (400) are both connected to the second conductive layer (112).

3. The power module according to claim 2, characterized in that the chip (200) comprises: the plurality of first chips (210) are sequentially arranged to form a first chip group (220), the first chip group (220) is arranged on the first conductive layer (111), and the third conductive layer (113) is wound on two sides of the first chip group (220); and/or

The chip (200) comprises: the second chips (230), the second chip groups (240) are sequentially arranged, the second chip groups (240) are arranged on the third conductive layer (113), and the second conductive layer (112) is wound on two sides of the second chip groups (240).

4. A power module according to claim 3, characterized in that the third conductive layer (113) comprises: the chip packaging structure comprises a first connection region (1131), a second connection region (1132) and a third connection region (1133), wherein the first connection region (1131) and the second connection region (1132) are connected to the third connection region (1133) and are arranged on the third connection region (1133) at intervals, one part of the first conductive layer (111) is provided with the first chip set (220) and extends into the space between the first connection region (1131) and the second connection region (1132), the first bonding wire (300) corresponding to the first chip (210) is connected to the first connection region (1131) and the second bonding wire (400) is connected to the second connection region (1132), and the third connection region (1133) is connected with the AC terminal (123).

5. The power module of claim 4, wherein the first chip groups (220) are two groups, the first connection regions (1131) are two and are distributed on two sides of the second connection region (1132), the two groups of first chip groups (220) are disposed between the first connection regions (1131) and the second connection region (1132) in a one-to-one correspondence, and the corresponding second bonding wires (400) are connected to the second connection region (1132).

6. The power module of claim 4, wherein the second conductive layer (112) comprises: a fourth connection region (1121), a fifth connection region (1122), and a sixth connection region (1123), said fourth connection region (1121) and said fifth connection region (1122) each being connected to said sixth connection region (1123) and being provided at intervals on said sixth connection region (1123), said sixth connection region (1123) being connected to said DC-terminal (122);

the third conductive layer (113) further comprises: a seventh connection region (1134), the seventh connection region (1134) is connected to a side of the second connection region (1132) far away from the first connection region (1131), the second chipset (240) is disposed on the seventh connection region (1134), the first bonding wire (300) corresponding to the second chip (230) is connected to the fourth connection region (1121) and the second bonding wire (400) is connected to the fifth connection region (1122).

7. The power module according to claim 6, wherein the number of the second chip sets (240) is two, the number of the fifth connection regions (1122) is two and is distributed on two sides of the sixth connection region (1123), the number of the seventh connection regions (1134) is two, the two seventh connection regions (1134) are correspondingly disposed between the fourth connection region (1121) and the fifth connection region (1122), the two second chip sets (240) are respectively disposed on the two seventh connection regions (1134), and the corresponding second bonding wires (400) are connected to the fifth connection region (1122).

8. The power module of claim 4, wherein the second conductive layer (112) comprises: a fourth connection region (1121), a fifth connection region (1122), and a sixth connection region (1123), said fourth connection region (1121) and said fifth connection region (1122) each being connected to said sixth connection region (1123) and being provided at intervals on said sixth connection region (1123), said sixth connection region (1123) being connected to said DC-terminal (122);

the third conductive layer (113) further comprises: a seventh connection region (1134), the seventh connection region (1134) is connected to the third connection region (1133) and is spaced apart from the first connection region (1131) and the second connection region (1132) on the third connection region (1133), the seventh connection region (1134) is located between the fourth connection region (1121) and the fifth connection region (1122), the second chip set (240) is disposed on the seventh connection region (1134), the first bonding wire (300) corresponding to the second chip (230) is connected to the fourth connection region (1121) and the second bonding wire (400) is connected to the fifth connection region (1122).

9. The power module according to claim 8, wherein the first chip groups (220) are two groups, the first connection region (1131) and the second connection region (1132) are two and symmetrically distributed on two sides of the seventh connection region (1134), and the two first chip groups (220) are disposed between the first connection region (1131) and the second connection region (1132) in a one-to-one correspondence;

the number of the second chip sets (240) is two, the number of the fourth connection areas (1121) and the number of the fifth connection areas (1122) are both two, the number of the seventh connection areas (1134) is two, the two seventh connection areas (1134) are respectively disposed between the corresponding fourth connection areas (1121) and the corresponding fifth connection areas (1122), and the number of the second chip sets (240) is respectively disposed in the two seventh connection areas (1134) correspondingly.

10. A vehicle, characterized by comprising: the power module of any one of claims 1-9.

Images