CN218677118U - Image sensor chip packaging structure - Google Patents
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- CN218677118U CN218677118U CN202222342503.XU CN202222342503U CN218677118U CN 218677118 U CN218677118 U CN 218677118U CN 202222342503 U CN202222342503 U CN 202222342503U CN 218677118 U CN218677118 U CN 218677118U
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 44
- 239000000758 substrate Substances 0.000 claims abstract description 59
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- 239000010703 silicon Substances 0.000 claims abstract description 19
- 239000010410 layer Substances 0.000 claims description 143
- 239000003292 glue Substances 0.000 claims description 40
- 229910000679 solder Inorganic materials 0.000 claims description 13
- 239000012790 adhesive layer Substances 0.000 claims description 8
- 239000000463 material Substances 0.000 abstract description 17
- 230000035945 sensitivity Effects 0.000 abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 17
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
- H01L23/08—Containers; Seals characterised by the material of the container or its electrical properties the material being an electrical insulator, e.g. glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
Abstract
The utility model discloses an image sensor chip packaging structure, this image sensor chip packaging structure includes: a substrate; the image sensor chip is positioned on one side of the substrate and comprises a photosensitive area and at least two first bonding pads; the cofferdam layer is positioned between the photosensitive area and the first bonding pad, and the material of the cofferdam layer comprises silicon; the light-transmitting cover plate is positioned on one side of the cofferdam layer far away from the image sensor chip, a cavity is formed among the light-transmitting cover plate, the cofferdam layer and the image sensor chip, and the light-sensing area is positioned in the cavity; the packaging layer is located one side, away from the substrate, of the image sensor chip, covers the substrate and the image sensor chip, and the surface, away from the substrate, of the packaging layer is flush with the surface, away from the substrate, of the light-transmitting cover plate. The utility model provides an image sensor chip packaging structure can improve image sensor chip's reliability and sensitivity, can also prolong image sensor chip's life.
Description
Technical Field
The utility model relates to a semiconductor package technical field especially relates to an image sensor chip packaging structure.
Background
With the development of semiconductor technology, especially the coming of the 5G communication era, the demand of electronic devices tends to be more and more miniaturized and light and thin. If the chip is not protected, the chip can be easily scratched and damaged. In addition, because the chip is small in size, if a larger-size shell is not used, the chip is not easy to place on a circuit board, and the development of the chip packaging technology solves the problem, on one hand, the chip packaging plays roles of placing, fixing, sealing and protecting the chip, on the other hand, the chip packaging also plays a role in enhancing the electric heating performance, and also plays a role in communicating the internal world of the chip with an external circuit bridge. At the same time, the pins of the package are connected with the contacts on the chip, and the pins are connected with other devices through the wires on the printed board. Therefore, packaging plays an important role for integrated circuits. The packaging technology is to wrap the chip to avoid the chip from contacting with the outside, and prevent impurities, water vapor and other bad gases in the air from corroding a precise circuit on the chip, so as to further reduce the electrical performance of the chip.
For an image sensor chip, a photosensitive area is a core part of the image sensor chip, and therefore it is important to cover a layer of optical glass above the photosensitive area for protection. According to the related experience in the industry, a glue material is adopted as a cofferdam support between the optical glass and the image sensor chip. The glue is a polymer material, has certain water absorption, and has unreliable performance of isolating water vapor, so that if the water vapor invades a photosensitive area, the chip of the image sensor is damaged; in addition, the glue has certain fluidity, when the optical glass is pasted, the glue cofferdam is easy to collapse under pressure, and if the glue pollutes the photosensitive area, the image sensor chip is scrapped. The thermal expansion coefficient of the glue is greatly different from that of the material of the image sensor chip, and when the ambient temperature changes, the difference between the thermal expansion coefficient of the glue and the material of the image sensor chip is far, so that the deformation of the glue and the material of the image sensor chip caused by thermal expansion is also far, and thus, larger stress is generated, delamination can occur between the materials, and even the image sensor chip is broken. There is also a conventional image sensor chip that causes a decrease in sensitivity of the image sensor due to a small light sensing range.
SUMMERY OF THE UTILITY MODEL
The utility model provides an image sensor chip packaging structure can improve image sensor chip's reliability and sensitivity, can also prolong image sensor chip's life.
According to the utility model discloses, an image sensor chip packaging structure is provided, this image sensor chip packaging structure includes:
a substrate;
the image sensor chip is positioned on one side of the substrate and comprises a photosensitive area and at least two first bonding pads;
the cofferdam layer is positioned between the photosensitive area and the first bonding pad, and the material of the cofferdam layer comprises silicon;
the light-transmitting cover plate is positioned on one side of the cofferdam layer far away from the image sensor chip, a cavity is formed among the light-transmitting cover plate, the cofferdam layer and the image sensor chip, and the light-sensing area is positioned in the cavity;
the packaging layer is located the image sensor chip is kept away from one side of base plate, the packaging layer covers the base plate with the image sensor chip, keeping away from of packaging layer the surface of base plate with the printing opacity apron is kept away from the surface parallel and level of base plate.
Optionally, the image sensor chip further includes a wafer;
the photosensitive area and the first bonding pad are both located on one side, far away from the substrate, of the wafer.
Optionally, the thickness of the bank layer includes 50 μm to 300 μm.
Optionally, a ratio of the thickness of the cofferdam layer to the width of the cofferdam layer is greater than 1.
Optionally, the image sensor chip package structure provided in this embodiment further includes a first bonding glue layer;
the first bonding glue layer is located between the cofferdam layer and the light-transmitting cover plate.
Optionally, the thickness of the first bonding glue layer includes 2 μm to 5 μm.
Optionally, the image sensor chip packaging structure provided in this embodiment further includes a chip bonding glue layer;
the chip bonding glue layer is located between the image sensor chip and the substrate.
Optionally, the image sensor chip package structure provided in this embodiment further includes a second bonding glue layer;
the second bonding glue layer is located between the cofferdam layer and the image sensor chip.
Optionally, the image sensor chip package structure provided in this embodiment further includes a lead;
the substrate comprises at least two second pads;
the second pad and the first pad are connected by the lead.
Optionally, the image sensor chip package structure provided in this embodiment further includes a plurality of solder balls;
the solder balls are positioned on one side of the substrate, which is far away from the image sensor chip.
The image sensor chip packaging structure provided by the embodiment comprises a substrate, an image sensor chip, a cofferdam layer, a light-transmitting cover plate and a packaging layer. The cofferdam layer is made of silicon, and has the characteristics of water vapor blocking, strong supporting force and no cracking of the image sensor chip when the ambient temperature changes, so that the reliability of the image sensor chip can be improved, and the service life of the image sensor chip can be prolonged. The packaging layer covers the substrate and the image sensor chip, so that the packaging layer can further protect the substrate and the image sensor chip. The surface of the packaging layer far away from the substrate and the surface of the light-transmitting cover plate far away from the substrate are flush, so that the problem that the packaging layer covers part of the light-transmitting substrate to cause the photosensitive range of the image sensor chip to be reduced is avoided, and the sensitivity of the image sensor chip is improved.
It should be understood that the statements herein are not intended to identify key or critical features of any embodiment of the present invention, nor are they intended to limit the scope of the invention. Other features of the present invention will be readily apparent from the following specification.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an image sensor chip package structure according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another image sensor chip package structure provided in accordance with an embodiment of the present invention;
fig. 3-12 are schematic diagrams illustrating a flow structure for manufacturing the image sensor chip package structure shown in fig. 2.
Detailed Description
In order to make the technical solution of the present invention better understood, the technical solution of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts shall belong to the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or otherwise described herein. Moreover, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Fig. 1 is a schematic structural diagram of an image sensor chip package structure provided in an embodiment of the present invention, and referring to fig. 1, the image sensor chip package structure provided in this embodiment includes: a substrate 110, an image sensor chip 120, a dam layer 130, a light-transmitting cover plate 140, and a packaging layer 150; the image sensor chip 120 is located at one side of the substrate 110, and the image sensor chip 120 includes a photosensitive region 121 and at least two first pads 122; the dam layer 130 is located between the photosensitive region 121 and the first bonding pad 122, and the material of the dam layer 130 includes silicon; the light-transmitting cover plate 140 is located on one side of the cofferdam layer 130 far away from the image sensor chip 120, a cavity 123 is formed among the light-transmitting cover plate 140, the cofferdam layer 130 and the image sensor chip 120, and the light-sensing area 121 is located in the cavity 123; the packaging layer 150 is located on a side of the image sensor chip 120 away from the substrate 110, the packaging layer 150 covers the substrate 110 and the image sensor chip 120, and a surface of the packaging layer 150 away from the substrate 110 is flush with a surface of the light-transmitting cover plate 140 away from the substrate 110.
Specifically, the light-transmissive cover plate 140 may be light-transmissive glass. The material of the encapsulation layer 150 may be a molding compound EMC. The image sensor chip 120 may be a CMOS (Complementary Metal Oxide Semiconductor) image sensor chip. The dam layer 130 surrounds the photosensitive area 121 in the image sensor chip 120, and the photosensitive area 121 is located in the cavity 123, so that the dam layer 130 and the transparent cover plate 140 can protect the photosensitive area 121 from being polluted and damaged by external moisture, dust and the like.
The material of the dam layer 130 is silicon, and the dam layer 130 made of silicon material can improve the performance of blocking water vapor, further improve the reliability of the image sensor chip 120 and prolong the service life. The main material of the image sensor chip 120 includes silicon, so that the thermal expansion coefficient of the dam layer 130 is relatively close to that of the image sensor chip 120, and when the ambient temperature changes, the deformation of the dam layer 130 is relatively close to that of the image sensor chip 120, thereby preventing the delamination between the dam layer 130 and the image sensor chip 120 and also preventing the image sensor chip 120 from cracking. In addition, the dam layer 130 made of silicon material has a certain hardness, and compared with the rubber dam, the dam layer 130 can prevent the image sensor chip from being crushed due to collapse when supporting the transparent cover plate 140. The stiffness of the dam layer 130 may also increase the aspect ratio of the dam layer 130. In addition, the flatness of the surface of the dam layer 130 made of silicon material is better than that of the dam layer made of glue, and thus, the dam layer 130 provided in this embodiment can be in good contact with the transparent cover plate 140 and the image sensor chip 120, so that the bonding force between the dam layer 130 and the transparent cover plate 140 and the image sensor chip 120 is stronger.
The encapsulation layer 150 covers the area of the substrate 110 where the image sensor chip 120 is not disposed, and also covers the first bonding pads 122 of the image sensor chip 120, and the substrate 110 and the image sensor chip 120 can be further protected from corrosion and contamination such as moisture and dust by the provision of the encapsulation layer 120. The surface of the encapsulation layer 150 away from the substrate 110 is flush with the surface of the transparent cover plate 140 away from the substrate 110, so that the problem of small photosensitive range of the photosensitive region 121 due to the fact that the encapsulation layer 150 covers part of the transparent cover plate 140 can be avoided, and the sensitivity of the image sensor chip 120 is improved.
The image sensor chip packaging structure provided by the embodiment comprises a substrate, an image sensor chip, a cofferdam layer, a light-transmitting cover plate and a packaging layer. The cofferdam layer is made of silicon, and has the characteristics of water vapor blocking, strong supporting force and no cracking of the image sensor chip when the ambient temperature changes, so that the reliability of the image sensor chip can be improved, and the service life of the image sensor chip can be prolonged. The packaging layer covers the substrate and the image sensor chip, so that the packaging layer can further protect the substrate and the image sensor chip. The surface of the packaging layer far away from the substrate and the surface of the light-transmitting cover plate far away from the substrate are flush, so that the problem that the packaging layer covers part of the light-transmitting substrate to cause the photosensitive range of the image sensor chip to be reduced is avoided, and the sensitivity of the image sensor chip is improved.
Based on the above embodiment, optionally, with continued reference to fig. 1, the image sensor chip 120 further includes a wafer 124; the photosensitive region 121 and the first bonding pad 122 are both located on a side of the wafer 124 away from the substrate 110.
Specifically, the material of the wafer 124 includes silicon. Dam layer 130 is located on a side of wafer 124 away from substrate 110.
On the basis of the above embodiment, optionally, the thickness of the bank layer includes 50 μm to 300 μm.
Specifically, the cofferdam layer has a certain hardness, so the setting range of the thickness of the cofferdam layer in this embodiment is relatively wide. The thickness of the cofferdam layer can be set within the range of 50-300 μm, thereby meeting the thickness requirements of various users on the cofferdam layer.
On the basis of the above embodiment, optionally, the ratio of the thickness of the cofferdam layer to the width of the cofferdam layer is greater than 1.
Specifically, the ratio of the thickness of the cofferdam layer to the width of the cofferdam layer is larger than 1, so that the width of the cofferdam layer can be properly reduced, and the setting area of the photosensitive area is increased. The first bonding pad points to the direction of the photosensitive area, and the size of the cofferdam layer is the width of the cofferdam layer.
Optionally, fig. 2 is a schematic structural diagram of another image sensor chip package structure provided in an embodiment of the present invention, and referring to fig. 2, the image sensor chip package structure provided in this embodiment further includes a first bonding glue layer 160; the first bonding glue layer 160 is located between the dam layer 130 and the transparent cover plate 140.
Specifically, the first bonding glue layer 160 is used for bonding the dam layer 130 and the transparent cover plate 140. The material of the first bonding glue layer 160 may include epoxy.
Optionally, the thickness of the first bonding glue layer includes 2 μm to 5 μm.
Specifically, the thickness of the first bonding glue layer is set within the range of 2-5 microns, so that the cofferdam layer and the light-transmitting cover plate can be fixedly connected, and the volume of the image sensor chip packaging structure cannot be excessively increased.
Optionally, with continuing reference to fig. 2, the image sensor chip package structure provided in this embodiment further includes a chip adhesive layer 170; the die attach adhesive layer 170 is located between the image sensor die and the substrate 110.
Specifically, the die attach adhesive layer 170 is used to attach the image sensor die 120 to the substrate 110, and the die attach adhesive layer 170 may be a DA adhesive. The die attach adhesive layer 170 has electrical conductivity and good heat dissipation properties. The material of die attach glue layer 170 may include epoxy, silver powder, and other additives. The die attach adhesive layer 170 is disposed between the wafer 124 and the substrate 110.
Optionally, with continuing reference to fig. 2, the image sensor chip package structure provided in this embodiment further includes a second bonding glue layer 180; the second bonding glue layer 180 is located between the dam layer 130 and the image sensor chip.
Specifically, the second bonding glue layer 180 is used to bond the dam layer 130 and the image sensor chip, and the material of the second bonding glue layer 180 may be the same as the material of the first bonding glue layer 160. The thickness of the second bonding glue layer 180 may also be the same as the thickness of the first bonding glue layer 160. The second bonding glue layer 180 is specifically used for bonding the dam layer 130 and the wafer 124.
Optionally, with continuing reference to fig. 2, the image sensor chip package structure provided in this embodiment further includes a lead 190; the substrate 110 includes at least two second pads 111; the second pad 111 and the first pad 122 are connected by a wire 190.
Specifically, the material of the lead 190 may be gold. The wire 190 has conductivity, the first pad 122 and the second pad 111 transmit signals through the wire 190, and the first pad 122 and the second pad 111 also have conductivity.
Optionally, with continuing reference to fig. 2, the image sensor chip package structure provided in this embodiment further includes a plurality of solder balls 191; the solder balls 191 are located on a side of the substrate 110 away from the image sensor chip.
Specifically, the solder ball 191 has conductivity, and the image sensor chip can be connected to an external circuit through the solder ball 191.
The embodiment further provides an image sensor chip packaging method, referring to fig. 3 to 12, where fig. 3 to 12 are schematic diagrams of a flow structure for manufacturing the image sensor chip packaging structure shown in fig. 2, and the image sensor chip packaging method includes the following steps:
s110, providing a silicon layer, and etching the silicon layer to form a cofferdam layer.
Specifically, referring to fig. 3, the thickness of the silicon layer 210 may be 720 μm, the silicon layer 210 may be dry-etched to form a dam layer 130 of 150 μm, and a plurality of dam layers 130 may be formed on one silicon layer 210. The 720-micron silicon layer 210 is selected to manufacture the 150-micron cofferdam layer 130, so that the problems that the silicon layer 210 is cracked and warped in the etching process to increase the operation difficulty and the like can be avoided.
And S120, bonding the light-transmitting transition cover plate with the cofferdam layer through the first bonding glue layer.
Specifically, referring to fig. 4, fig. 4 is a schematic structural diagram of the light-transmitting transition cover plate 141 and the dam layer 130 bonded together by the first bonding glue layer 160.
And S130, grinding the silicon layer until the silicon layer only comprises the cofferdam layer.
Specifically, referring to fig. 5, fig. 5 is a schematic structural diagram of a polished silicon layer.
And S140, cutting the light-transmitting transition cover plate to form a plurality of light-transmitting cover plates.
Specifically, referring to fig. 6, fig. 6 is a schematic structural diagram illustrating a plurality of transparent cover plates 140, wherein each transparent cover plate 140 corresponds to one dam layer 130.
And S150, mounting a plurality of image sensor chips on the substrate through a Die Bond process.
Specifically, referring to fig. 7, fig. 7 is a schematic structural diagram of the image sensor chip 120 attached to the substrate 110 through the chip adhesive layer 170. The image sensor chip 120 includes a photosensitive area 121, at least two first bonding pads 122, and a wafer 124.
And S160, mounting the light-transmitting glass cover plate, the cofferdam layer and the image sensor chip.
Specifically, referring to fig. 8, fig. 8 is a schematic structural diagram after mounting, and the dam layer 130 is bonded to the wafer 124 in the image sensor chip through a second bonding glue layer 180. A cavity 123 is formed between the dam layer 130, the image sensor chip and the glass cover plate 140, and the photosensitive area 121 is located in the cavity 123.
S170, welding wires; and connecting a first bonding pad in the image sensor chip with a second bonding pad in the substrate through a lead to realize electric signal conduction.
Specifically, referring to fig. 9, fig. 9 is a schematic structural diagram of the first pad 122 and the second pad 111 connected by the wire 190.
S180, packaging; the substrate, the image sensor chip and the lead are packaged through the packaging layer, wherein the surface of the packaging layer, which is far away from the substrate, is flush with the surface of the light-transmitting cover plate, which is far away from the substrate.
Specifically, referring to fig. 10, fig. 10 is a schematic structural diagram of forming the encapsulation layer 150.
And S190, printing and reflowing to form the solder ball.
Specifically, fig. 11 is a schematic structural view of a solder ball 191. Before forming the solder ball 191, a layer of solder paste is printed on the surface of the substrate 110 away from the package layer 150, and then the solder ball 191 is formed by reflow soldering.
And S200, forming an image sensor chip packaging structure.
Specifically, the substrate 110 and the encapsulation layer 150 are cut to form a single image sensor chip package structure, and fig. 12 is a schematic structural diagram of fig. 11 after cutting.
It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present invention may be executed in parallel, may be executed sequentially, or may be executed in different orders, as long as the desired result of the technical solution of the present invention can be achieved, and the present invention is not limited thereto.
The above detailed description does not limit the scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (9)
1. An image sensor chip package structure, comprising:
a substrate;
the image sensor chip is positioned on one side of the substrate and comprises a photosensitive area and at least two first bonding pads;
the cofferdam layer is positioned between the photosensitive area and the first bonding pad and is made of silicon;
the light-transmitting cover plate is positioned on one side of the cofferdam layer far away from the image sensor chip, a cavity is formed among the light-transmitting cover plate, the cofferdam layer and the image sensor chip, and the light-sensing area is positioned in the cavity;
the packaging layer is positioned on one side, far away from the substrate, of the image sensor chip, covers the substrate and the image sensor chip, and is flush with the surface, far away from the substrate, of the packaging layer and the surface, far away from the substrate, of the light-transmitting cover plate;
the ratio of the thickness of the cofferdam layer to the width of the cofferdam layer is more than 1.
2. The image sensor chip package structure of claim 1, wherein the image sensor chip further comprises a wafer;
the photosensitive area and the first bonding pad are both located on one side, far away from the substrate, of the wafer.
3. The image sensor chip package structure of claim 1, wherein the dam layer has a thickness ranging from 50 μm to 300 μm.
4. The image sensor chip package structure of claim 1, further comprising a first layer of bonding glue;
the first bonding glue layer is located between the cofferdam layer and the light-transmitting cover plate.
5. The image sensor chip package structure according to claim 4, wherein the thickness of the first bonding glue layer ranges from 2 μm to 5 μm.
6. The chip package structure according to claim 1, further comprising a chip adhesive layer;
the chip bonding glue layer is located between the image sensor chip and the substrate.
7. The image sensor chip package structure of claim 1, further comprising a second layer of bonding glue;
the second bonding glue layer is located between the cofferdam layer and the image sensor chip.
8. The image sensor chip package structure of claim 1, further comprising leads;
the substrate comprises at least two second pads;
the second pad and the first pad are connected by the lead.
9. The image sensor chip package structure of claim 1, further comprising a plurality of solder balls;
the solder balls are positioned on one side of the substrate, which is far away from the image sensor chip.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222342503.XU CN218677118U (en) | 2022-09-01 | 2022-09-01 | Image sensor chip packaging structure |
| PCT/CN2023/111482 WO2024046042A1 (en) | 2022-09-01 | 2023-08-07 | Image sensor chip packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222342503.XU CN218677118U (en) | 2022-09-01 | 2022-09-01 | Image sensor chip packaging structure |
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| CN218677118U true CN218677118U (en) | 2023-03-21 |
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| CN202222342503.XU Active CN218677118U (en) | 2022-09-01 | 2022-09-01 | Image sensor chip packaging structure |
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| CN (1) | CN218677118U (en) |
| WO (1) | WO2024046042A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116425111A (en) * | 2023-06-13 | 2023-07-14 | 苏州科阳半导体有限公司 | Packaging method and packaging structure of sensor chip |
| WO2024046042A1 (en) * | 2022-09-01 | 2024-03-07 | 广东越海集成技术有限公司 | Image sensor chip packaging structure |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10707257B2 (en) * | 2018-08-14 | 2020-07-07 | Semiconductor Components Industries, Llc | Multi-chip packaging structure for an image sensor |
| US11164900B2 (en) * | 2018-10-08 | 2021-11-02 | Omnivision Technologies, Inc. | Image sensor chip-scale-package |
| KR20220037069A (en) * | 2020-09-17 | 2022-03-24 | 삼성전자주식회사 | Semiconductor package and method for fabricating the same |
| CN218677118U (en) * | 2022-09-01 | 2023-03-21 | 广东越海集成技术有限公司 | Image sensor chip packaging structure |
-
2022
- 2022-09-01 CN CN202222342503.XU patent/CN218677118U/en active Active
-
2023
- 2023-08-07 WO PCT/CN2023/111482 patent/WO2024046042A1/en unknown
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024046042A1 (en) * | 2022-09-01 | 2024-03-07 | 广东越海集成技术有限公司 | Image sensor chip packaging structure |
| CN116425111A (en) * | 2023-06-13 | 2023-07-14 | 苏州科阳半导体有限公司 | Packaging method and packaging structure of sensor chip |
| CN116425111B (en) * | 2023-06-13 | 2023-09-08 | 苏州科阳半导体有限公司 | Packaging method and packaging structure of sensor chip |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2024046042A1 (en) | 2024-03-07 |
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