CN218648790U - Internal matching circuit for reducing memory effect of ceramic tube package power amplifier - Google Patents
Internal matching circuit for reducing memory effect of ceramic tube package power amplifier Download PDFInfo
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- CN218648790U CN218648790U CN202222227690.7U CN202222227690U CN218648790U CN 218648790 U CN218648790 U CN 218648790U CN 202222227690 U CN202222227690 U CN 202222227690U CN 218648790 U CN218648790 U CN 218648790U
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Abstract
The application provides an interior matching circuit that reduces ceramic tube package power amplifier memory effect, the technical essential is: the circuit is applied to an internal matching power amplifier packaged by a ceramic tube shell, and is characterized by comprising an envelope impedance control network, wherein the envelope impedance control network comprises a first inductor L1, a first resistor R1, a second inductor L2 and a filter capacitor C1, one end of the first inductor L1 is connected to an output capacitor of the internal matching power amplifier, the other end of the first inductor L1 is connected with one end of the first resistor R1, the other end of the first resistor R1 is connected with one end of the second inductor L2, the other end of the second inductor L2 is connected with one end of the filter capacitor C1, and the other end of the filter capacitor C1 is grounded, so that the VBW of a power amplifier is greatly improved, the memory effect is reduced, and the linearization performance of a device is improved.
Description
Technical Field
The application relates to the technical field of integrated circuits, in particular to an internal matching circuit for reducing memory effect of a ceramic tube package power amplifier.
Background
With the rapid development of communication systems, the application of modulated signals with wider bandwidth or multiple carriers puts severe requirements on the linearization of radio frequency power amplifiers. The Video Bandwidth (VBW) which characterizes the operating bandwidth of an rf power amplifier and the memory effect which affects the linearity of the power amplifier are two important factors for measuring the performance of an rf amplifier. From a frequency domain perspective, the memory effect of a power amplifier is defined as the phenomenon in which the amplitude and phase characteristics of the power amplifier change as the envelope frequency of the input signal changes. The memory effect of the power amplifier is generally divided into two types, one is the electric memory effect, and is related to the device and circuit design of the power amplifier; the other is the thermal memory effect, which is related to the temperature cycle of the transistor channel. Because the thermal memory effect of the power amplifier is optimized by a device manufacturer before the device leaves a factory, the optimized memory effect in the actual design of the power amplifier circuit generally refers to the electrical memory effect of the power amplifier.
The main reason for the generation of the electrical memory effect is that within the operating bandwidth of the amplifier, the source impedance and the load impedance of the amplifier vary with the frequency of the input broadband modulation signal, and exhibit frequency-dependent characteristics, which ultimately cause the amplitude and phase of the output intermodulation component of the amplifier to vary with the frequency of the input signal, specifically to the asymmetry of the upper and lower sidebands of the output spectral component of the amplifier.
In order to reduce the memory effect, most of the articles add an auxiliary circuit on a bias circuit to short-circuit an envelope signal, but due to the dispersion effect of a transmission line, the method is difficult to realize broadband short-circuit, and it is also difficult to greatly improve the VBW of the power amplifier by reducing the equivalent inductance of a microstrip line at the bias.
SUMMERY OF THE UTILITY MODEL
The exemplary embodiments of the present application provide an internal matching circuit for reducing the memory effect of a ceramic package power amplifier, so as to greatly improve the VBW of a power amplifier, reduce the memory effect, and improve the linearization performance of a device.
The internal matching circuit for reducing the memory effect of the ceramic tube-packaged power amplifier comprises an envelope impedance control network, wherein the envelope impedance control network comprises a first inductor L1, a first resistor R1, a second inductor L2 and a filter capacitor C1, one end of the first inductor L1 is connected to an output capacitor of the internal matching power amplifier, the other end of the first inductor L1 is connected with one end of the first resistor R1, the other end of the first resistor R1 is connected with one end of the second inductor L2, the other end of the second inductor L2 is connected with one end of the filter capacitor C1, and the other end of the filter capacitor C1 is grounded.
In an embodiment, the first inductor L1 and the second inductor L2 are connected by gold wire bonding wires.
In an embodiment, the first resistor R1 and the filter capacitor C1 are respectively a thin film resistor and a ceramic capacitor, and are interconnected through a gold bonding wire.
In one embodiment, the first inductor L1 is in parallel resonance with the parasitic capacitance Cg of the internal matching power amplifier, the resonance frequency is fr, the video bandwidth of the power amplifier is determined by the resonance frequency fr, and the video bandwidth is controlled by adjusting the gold wire parameters of the first inductor L1 and the second inductor L2.
In one embodiment, the envelope impedance control network is connected directly to the package through a gold wire.
In one embodiment, the filter capacitor C1 includes one or more capacitors.
The application has the following beneficial effects:
1. according to the power amplifier, the envelope impedance control network is added in the internal matching power amplifier packaged by the ceramic tube shell, so that the video bandwidth of the power amplifier can be widened, the envelope impedance can be flexibly controlled, the envelope impedance is reduced and the power amplifier memory effect is reduced under the condition that the fundamental wave operating frequency band of the power amplifier is not influenced;
2. according to the power amplifier, the parallel resonance frequency is increased by reducing the inductance of the first inductor L1, so that the video bandwidth of the power amplifier is widened. Compared with the reduction of the inductance and the parasitic inductance on the power supply arm, the video bandwidth of the power amplifier is about 100MHz-200MHz; the utility model discloses an adjust bonding gold wire parameter and reduce the inductance value, VBW can promote to about 500 MHz.
3. According to the method and the device, the memory effect of the radio frequency power amplifier is reduced by adding the envelope impedance control network to the output of the internal matching power amplifier tube, so that the effect of improving the linearity of the radio frequency power amplifier is achieved. Compare and realize the control of envelope impedance through optimizing outer matching bias circuit, the utility model discloses directly add envelope impedance control network in the place near the power amplifier tube drain electrode, make the improvement effect more obvious.
4. The video bandwidth of the internal matching power amplifier can be flexibly controlled, the memory effect of the power amplifier is effectively reduced, the linearity of a GaN power device product is improved, and the requirements of a future 5G communication system on high linearity and high efficiency technology are met.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
FIG. 1 is a block diagram of the circuit configuration of a matched power amplifier in a ceramic package of the present application;
fig. 2 is a schematic structural diagram of an envelope impedance control network according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of an envelope impedance control network according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of an envelope impedance control network according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of an envelope impedance control network according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of an envelope impedance control network according to an embodiment of the present application;
fig. 7 shows simulation results of widening the video bandwidth of the intra-matched power amplifier according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the accompanying drawings in the preferred embodiments of the present application, and it is obvious that the described embodiments are some, not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
As shown in fig. 1, an internal matching circuit for reducing a memory effect of a ceramic package-on-package power amplifier includes an envelope impedance control network, where the envelope impedance control network includes a first inductor L1, a first resistor R1, a second inductor L2, and a filter capacitor C1, one end of the first inductor L1 is connected to an output capacitor of the internal matching power amplifier, the other end of the first inductor L1 is connected to one end of the first resistor R1, the other end of the first resistor R1 is connected to one end of the second inductor L2, the other end of the second inductor L2 is connected to one end of the filter capacitor C1, and the other end of the filter capacitor C1 is grounded.
Note that, the ceramic tube shell is internally packaged with a GaN HEMT tube core, an input-output matching circuit and an envelope impedance control network. Cg is the die output capacitance, determined by the gate width of the die. The output matching circuit adopts a T-shaped LCL low-pass filter network to realize impedance conversion, wherein L is realized by a gold wire bonding lead. The bonding lead inductance meets circuit matching and simultaneously realizes the electrical interconnection of the device and the microstrip circuit. And C is a ceramic capacitor, and the circuit has better impedance transformation ratio by adjusting a gold wire bonding lead and the ceramic capacitor.
The conventional power amplifier is based on an improved bias circuit to reduce the memory effect, for example, the drain adopts a double-bias network form, a shorter and wider drain bias network and multistage bypass decoupling. These approaches have limited widening of the VBW and shorter and wider bias networks can cause low frequency performance degradation.
The envelope impedance control network for reducing the memory effect of the power amplifier and the internal matching power amplifier are packaged in the ceramic tube shell together, so that the linearity performance of the internal matching power amplifier is improved, the video bandwidth of the power amplifier can be widened, the envelope impedance can be flexibly controlled, the envelope impedance is reduced under the condition that the fundamental wave working frequency band of the power amplifier is not influenced, and the memory effect of the power amplifier is reduced.
In one embodiment, the first inductor L1 and the second inductor L2 are connected by gold wire bonding wires.
In an embodiment, the first resistor R1 and the filter capacitor C1 are respectively a thin film resistor and a ceramic capacitor, and are interconnected through a gold bonding wire.
In one embodiment, the first inductor L1 is in parallel resonance with the parasitic capacitance Cg of the internal matching power amplifier, the resonance frequency is fr, the video bandwidth of the power amplifier is determined by the resonance frequency fr, and the video bandwidth is controlled by adjusting the gold wire parameters of the first inductor L1 and the second inductor L2.
It should be noted that, the present application adds an envelope impedance control network for reducing the memory effect of the power amplifier to the output end of the internal matching power amplifier. The envelope impedance control network comprises a first inductor L1, a resistor R1, a second inductor L2 and a filter capacitor C1, wherein the inductors L1 and L2 are realized through gold wire bonding leads, the resistor R1 is connected to an output matching capacitor of the internal matching power amplifier through a gold wire, the resistor R1 and the filter capacitor C1 are interconnected through the gold wire, and the filter capacitor C1 is grounded.
The first inductor L1 and the transistor internal parasitic capacitance Cg of the power amplifier form a parallel resonance, and the resonance frequency is fr. The video bandwidth of a power amplifier can directly reflect the capability of a wide-band signal that the power amplifier can process, and is generally determined by a parallel resonance frequency fr. The correlation formula is as follows:
therefore, the video bandwidth of the power amplifier can be conveniently controlled by adjusting the gold wire parameters.
The first inductor L1 is also in an approximate open circuit state for fundamental wave signals of the power amplifier, namely, the power amplifier is not influenced in the fundamental wave working frequency band. Therefore, proper gold wire parameters need to be designed to ensure that the first inductor L1 can ensure that the fundamental wave impedance is not affected and the video bandwidth of the power amplifier can be widened as much as possible.
The basic idea of reducing memory effect is as follows: the third order intermodulation component controlled by the envelope is filtered out by the additional circuit. The utility model discloses well filter capacitor C1's effect is introduced resonant circuit and is controlled the baseband impedance, reduces the baseband impedance, makes the third-order intermodulation distortion that it caused minimize. The value range of the filter capacitor C1 is 470 pF-4700 pF, and the typical value is 1000pF. The baseband impedance, also referred to as envelope impedance, refers to the impedance to which the amplifier responds within the baseband frequency band, which includes the band of modulated signals (envelope) and the difference frequency of each carrier in the case of multiple carriers. The resistor R1 is introduced to avoid the phenomenon that the envelope frequency band generates pure LC network resonance to cause a maximum impedance value to occur in the envelope frequency band of a signal, and the value of the resistor R1 is 3 omega. At the same time, the filter capacitor C1 also provides good radio frequency small reactance to ground performance.
In one embodiment, the envelope impedance control network is connected directly to the package through a gold wire, as shown in fig. 2. The envelope impedance control network can also be directly connected to the tube shell through a gold wire, and the effect of reducing the memory effect of the power amplifier is achieved.
As shown in fig. 3, in an embodiment, the filter capacitor C1 includes one or more capacitors.
It should be noted that, when the operating frequency band of the ultra-wideband power amplifier is wide, only one filter capacitor C1 is not enough, and the impedance value at the edge of the resonance point may be large. Therefore, it is necessary to provide a plurality of filter capacitors C1 to ensure that the envelope impedance is maximally reduced to a minimum value in a wide frequency band.
As shown in fig. 4, in one embodiment, for the power amplifier tube of the Doherty technology for high-efficiency and small-volume application, two independent power amplifier tubes (used as Carrier amplifier and Peak amplifier of the Doherty amplifier, respectively) are integrated in one package. The utility model discloses add harmonic impedance and envelope impedance control network respectively to two independent power amplifiers, promote power amplifier efficiency and reduce power amplifier memory effect, improve the linearization performance of device.
In one embodiment, the envelope impedance control network of the Carrier amplifier and Peak amplifier may also be connected directly to the package by gold wire bonding, as shown in figure 5.
In one embodiment, the circuit for reducing memory effect can be applied to the internal matching power amplifier packaged by different types of ceramic packages, as shown in fig. 6.
As a simulation result shown in fig. 7, the present application increases the parallel resonant frequency by reducing the inductance of the first inductor L1, thereby widening the video bandwidth of the power amplifier. Compared with the reduction of the inductance and the parasitic inductance on the power supply arm, the video bandwidth of the power amplifier is about 100MHz-200MHz; the inductance is reduced by adjusting the parameters of the gold bonding wire, so that the VBW can be increased to about 500 MHz.
In the description of the present application, it is to be understood that the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include 1 or more of that feature. In the description of the present application, "plurality" means at least 2, e.g., 2, 3, etc., unless specifically limited otherwise.
While preferred embodiments of the present application have been described, additional variations and modifications in accordance with these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the application.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.
Claims (6)
1. The internal matching circuit is applied to the internal matching power amplifier packaged by the ceramic tube shell, and is characterized by comprising an envelope impedance control network, wherein the envelope impedance control network comprises a first inductor L1, a first resistor R1, a second inductor L2 and a filter capacitor C1, one end of the first inductor L1 is connected to an output capacitor of the internal matching power amplifier, the other end of the first inductor L1 is connected with one end of the first resistor R1, the other end of the first resistor R1 is connected with one end of the second inductor L2, the other end of the second inductor L2 is connected with one end of the filter capacitor C1, and the other end of the filter capacitor C1 is grounded.
2. The internal matching circuit for reducing the memory effect of a ceramic package power amplifier as recited in claim 1, wherein said first inductor L1 and said second inductor L2 are connected by gold wire bonding wires.
3. The internal matching circuit for reducing the memory effect of the ceramic package power amplifier as recited in claim 2, wherein said first resistor R1 and said filter capacitor C1 are respectively a thin film resistor and a ceramic capacitor, and are interconnected by a gold bonding wire.
4. The internal matching circuit for reducing the memory effect of the ceramic package packaged power amplifier as claimed in claim 3, wherein the first inductor L1 is in parallel resonance with the parasitic capacitance Cg of the internal matching power amplifier, the resonance frequency is fr, the video bandwidth of the power amplifier is determined by the resonance frequency fr, and the video bandwidth is controlled by adjusting the gold wire parameters of the first inductor L1 and the second inductor L2.
5. The internal matching circuit for reducing memory effects in a ceramic package power amplifier of claim 1, wherein said envelope impedance control network is connected directly to the package by a gold wire.
6. The internal matching circuit for reducing the memory effect of a ceramic package power amplifier according to claim 1, wherein the filter capacitor C1 comprises one or more capacitors.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222227690.7U CN218648790U (en) | 2022-08-23 | 2022-08-23 | Internal matching circuit for reducing memory effect of ceramic tube package power amplifier |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222227690.7U CN218648790U (en) | 2022-08-23 | 2022-08-23 | Internal matching circuit for reducing memory effect of ceramic tube package power amplifier |
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| CN218648790U true CN218648790U (en) | 2023-03-17 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202222227690.7U Active CN218648790U (en) | 2022-08-23 | 2022-08-23 | Internal matching circuit for reducing memory effect of ceramic tube package power amplifier |
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| CN (1) | CN218648790U (en) |
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