CN218559517U - Chip substrate packaging tray - Google Patents
Chip substrate packaging tray Download PDFInfo
- Publication number
- CN218559517U CN218559517U CN202223228899.1U CN202223228899U CN218559517U CN 218559517 U CN218559517 U CN 218559517U CN 202223228899 U CN202223228899 U CN 202223228899U CN 218559517 U CN218559517 U CN 218559517U
- Authority
- CN
- China
- Prior art keywords
- chip substrate
- chip
- chassis
- tray
- packaging tray
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Packaging Frangible Articles (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The utility model relates to a chip package transportation technical field especially relates to tray that chip substrate packing was used. In order to solve the problems that the chip substrate is inconvenient to transport and easy to damage, the utility model provides a chip substrate packaging tray, which comprises a chassis and a gland, wherein a containing groove for containing the chip substrate is arranged in the chassis, and the groove depth of the containing groove is larger than the thickness of the chip substrate; the gland is pressed on the chassis and covers the accommodating groove. Thus, utilize the utility model discloses chip substrate packaging tray packs chip substrate makes the chip substrate arrange the holding tank in, makes things convenient for the transportation of chip substrate, and can avoid the chip substrate to collide each other in the transportation and produce the damage.
Description
Technical Field
The utility model relates to a chip package transportation technical field especially relates to tray that chip substrate packing was used.
Background
Before the chip is packaged, a package shell needs to be manufactured firstly, the pin of the chip needs to be fixed outside the package and then packaged, and the chip shell and the copper plate can form a chip substrate after being molded together. When the chip substrate is processed in the next procedure, the chip substrate needs to be packaged and transported to the production line of the next procedure. However, if the chip substrates are directly transported, the transportation is not convenient, and the chip substrates placed in a scattered manner are easily damaged due to mutual collision in the transportation process, which affects the subsequent processing of the chip substrates.
SUMMERY OF THE UTILITY MODEL
In order to solve the problems that the chip substrate is inconvenient to transport and easy to damage, the utility model provides a chip substrate packaging tray, which comprises a chassis and a gland, wherein a containing groove for containing the chip substrate is arranged in the chassis, and the groove depth of the containing groove is larger than the thickness of the chip substrate; the gland is pressed on the chassis and covers the accommodating groove. Thus, utilize the utility model discloses chip substrate packaging tray packing chip base plate makes the chip base plate arrange the holding tank in, makes things convenient for the chip base plate transportation, and can avoid the chip base plate to collide each other in the transportation and produce the damage.
Preferably, a plurality of the accommodating grooves are arranged on the chassis. Thus, the utility model discloses a plurality of chip base plates can be packed to chip base plate packing tray, both convenient packing, convenient transportation again can effectively improve the packing conveying efficiency of chip base plate.
Preferably, a spacing groove is arranged between two adjacent accommodating grooves on the chassis. Like this, in the transportation, can be with packing the chip base plate the utility model discloses chip base plate packing tray is folding or encircle the lapping, convenient transportation.
Preferably, a positioning protrusion is arranged on the outer side wall of the chassis, and the positioning protrusion extends towards two ends of the chassis along the extending direction of the chassis. Thus, will the utility model discloses the in-process of placing the chip base plate is placed in the chassis among the chip base plate packing tray and is carried on the conveyer belt, and it is spacing to the accessory cooperation on usable location arch and the conveyer belt, avoids the chassis to swing or rock on the conveyer belt in data send process, improves the packing efficiency of chip base plate. Furthermore, the positioning protrusion is a convex strip or a plurality of convex points which are linearly arranged. Thus, raised strips or salient points which are linearly arranged can be selected as positioning bulges according to requirements.
Preferably, the chassis is made by a plastic suction method. Therefore, the base plate is formed by adopting a plastic suction mode, so that the supporting strength of the base plate can be ensured, and the base plate can be conveniently coiled after being packaged.
Preferably, the gland is adhered to the groove edge of the accommodating groove on the chassis in a heat-sealing tape packaging manner. Thus, in the utilization the utility model discloses when chip substrate packing tray packs chip substrate, both convenient encapsulation can easily tear the gland in order to take out the chip substrate when using again, and convenience simple to use, and can ensure that the manipulator is not influenced when taking out the chip substrate, improves the efficiency of taking out of chip substrate.
Drawings
Fig. 1 is a schematic structural view of a chip substrate packaging tray of the present invention;
fig. 2 is a schematic structural view of the chip substrate mounted on the chassis of the chip substrate packaging tray of the present invention;
fig. 3 isbase:Sub>A schematic sectional structure view ofbase:Sub>A-base:Sub>A in fig. 2.
Detailed Description
The chip substrate packaging tray of the present invention will be described in detail with reference to fig. 1 to 3.
As shown in fig. 1, the chip substrate packaging tray of the present invention comprises a chassis 1 and a gland 2, wherein an accommodating groove 11 for accommodating a chip substrate 3 is provided in the chassis, and the depth of the accommodating groove 11 is greater than the thickness of the chip substrate 3; the pressing cover 2 is pressed on the chassis 1 and covers the accommodating groove 11. Thus, utilize the utility model discloses chip substrate packaging tray packs chip substrate 3 makes chip substrate 3 arrange holding tank 11 in, makes things convenient for chip substrate 3 to transport, and can avoid chip substrate 3 to collide each other in the transportation and produce the damage. Preferably, a plurality of receiving grooves 11 are provided on the chassis 1. Thus, the utility model discloses a plurality of chip base plates 3 can be packed to the chip base plate packing tray, both convenient packing, convenient transportation again can effectively improve chip base plate 3's packing conveying efficiency. Preferably, a spacing groove 12 is arranged between two adjacent accommodating grooves 11 on the chassis 1. Like this, in the transportation, can be with packing chip substrate 3 the utility model discloses chip substrate packaging tray is folding or encircle the lapping, convenient transportation. Preferably, the outer side wall of the chassis 1 is provided with a positioning protrusion 13, and the positioning protrusion 13 extends towards two ends of the chassis 1 along the extending direction of the chassis 1. Thus, will the utility model discloses chassis 1 among the chip substrate packaging tray places the in-process of conveying on the conveyer belt and placing chip substrate 3, and it is spacing to the accessory cooperation on usable location arch 13 and the conveyer belt, avoids chassis 1 to swing or rock on the conveyer belt in the data send process, improves chip substrate 3's packing efficiency. Preferably, the positioning protrusions 13 are raised lines, so that the structure is simple and the manufacture is convenient. Of course, the positioning protrusions may be provided as linear-arranged convex points. Therefore, the limiting function of the positioning convex strips can be ensured, and materials required for manufacturing the chassis can be reduced. Therefore, when the chip substrate packaging tray is implemented, the raised strips or the bumps which are linearly arranged can be selected as required to be used as the positioning bulges. Preferably, the chassis 1 is made by means of plastic suction. Therefore, the chassis 1 is formed in a plastic suction mode, so that the supporting strength of the chassis 1 can be ensured, and the chassis can be conveniently coiled after packaging is finished.
As shown in fig. 1-3, the pressing cover 2 is adhered to the bottom plate 1 at the edge 111 of the receiving groove 11 by means of heat sealing tape. Thus, in utilization the utility model discloses chip substrate packaging tray packing chip base plate 3 time, both made things convenient for the encapsulation, can tear gland 2 in order to take out chip base plate 3 easily when using again, convenience simple to use, and can ensure that the manipulator is not influenced when taking out chip base plate 3, improves chip base plate 3's the efficiency of taking out. Preferably, gland 2 adopts the plastic film to make, and simple manufacture is convenient, and the pliability is strong, and is convenient the utility model discloses chip base plate tray encircles the lapping.
Claims (7)
1. A chip substrate packaging tray is characterized by comprising a base plate and a pressing cover, wherein an accommodating groove for accommodating a chip substrate is formed in the base plate, and the groove depth of the accommodating groove is greater than the thickness of the chip substrate; the gland is pressed on the chassis and covers the accommodating groove.
2. The chip substrate packaging tray of claim 1, wherein a plurality of the receiving slots are disposed on the bottom tray.
3. The chip substrate packaging tray of claim 2, wherein a spacing slot is provided between adjacent two of the receiving slots on the bottom tray.
4. The chip substrate packaging tray according to claim 3, wherein a positioning protrusion is provided on an outer side wall of the bottom plate, and the positioning protrusion extends to both ends of the bottom plate along an extending direction of the bottom plate.
5. The packaging tray of claim 4, wherein the positioning protrusion is a rib or a plurality of linear protrusions.
6. The chip substrate packaging tray of any one of claims 1-5, wherein the bottom tray is made by a blister process.
7. The chip substrate packaging tray of claim 6, wherein the cover is adhered to the bottom tray along the edges of the receiving slots by heat sealing tape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223228899.1U CN218559517U (en) | 2022-12-02 | 2022-12-02 | Chip substrate packaging tray |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223228899.1U CN218559517U (en) | 2022-12-02 | 2022-12-02 | Chip substrate packaging tray |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218559517U true CN218559517U (en) | 2023-03-03 |
Family
ID=85305054
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202223228899.1U Active CN218559517U (en) | 2022-12-02 | 2022-12-02 | Chip substrate packaging tray |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218559517U (en) |
-
2022
- 2022-12-02 CN CN202223228899.1U patent/CN218559517U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101848848B (en) | Structure for packing semiconductor device, method for packing semiconductor device, and embossed tape | |
| KR20010098728A (en) | Semiconductor devices manufacturing method and tray using method | |
| US20070023931A1 (en) | Carrier tape for electronic components | |
| JP3957553B2 (en) | Carrier tape for storing small articles, storage device and transport method | |
| CN218559517U (en) | Chip substrate packaging tray | |
| JP4063805B2 (en) | Storage tray and storage device | |
| US20110233109A1 (en) | Insert For Tape And Reel Packaging | |
| JPH11198987A (en) | Method and apparatus for packing semiconductor chip | |
| JP2012043914A (en) | Accommodation tray and substrate handling method | |
| CN214525061U (en) | Corrugated carton for packaging fragile articles | |
| CN209939088U (en) | Conveying device for automatic bag boxing machine | |
| JP2013163524A (en) | Embossed carrier tape, and component storage body | |
| CN102887281A (en) | Multiple multi-column type element carrying belt | |
| CN215246865U (en) | Carrier tape and storage component | |
| JP2010036961A (en) | Small product package, and packaging method for small product | |
| CN215591258U (en) | Bearing assembly | |
| US20230282508A1 (en) | Modified semiconductor die carrier and carrier tape | |
| JP2006306403A (en) | Manufacturing method of semiconductor device | |
| CN210593121U (en) | Circuit board storage packaging box | |
| CN216036253U (en) | Carrier band for loading large lamp beads | |
| JP3806169B2 (en) | Electronic component supply tool and electronic component taping packaging method | |
| CN216784196U (en) | Pile up stable turnover packing plastic sucking dish | |
| CN211197211U (en) | Improved chip packaging tape | |
| CN211767598U (en) | High-strength polycarbonate black carrier tape | |
| CN216154255U (en) | Carton for packaging plates |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |