JPH11198987A - Method and apparatus for packing semiconductor chip - Google Patents

Method and apparatus for packing semiconductor chip

Info

Publication number
JPH11198987A
JPH11198987A JP10003847A JP384798A JPH11198987A JP H11198987 A JPH11198987 A JP H11198987A JP 10003847 A JP10003847 A JP 10003847A JP 384798 A JP384798 A JP 384798A JP H11198987 A JPH11198987 A JP H11198987A
Authority
JP
Japan
Prior art keywords
wafer
semiconductor
bag
semiconductor chip
semiconductor chips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10003847A
Other languages
Japanese (ja)
Inventor
Kiyotaka Okinari
清隆 沖成
Kazuyoshi Okatome
一欽 岡留
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10003847A priority Critical patent/JPH11198987A/en
Publication of JPH11198987A publication Critical patent/JPH11198987A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a highly efficient method for packingly which semiconductor chips do not crack nor break when the semiconductor chips are packed and carried and which does not need a lot of individual packing containers nor loading works. SOLUTION: A semiconductor wafer 2 fixed on a wafer fixing tool 100 is divided into a plurality of semiconductor chips 2a in such a way as to leave the outer shape of the wafer and a plurality of articles wherein an interlayer paper 6 and a cushioning material made of a cushioning sheet 7 are placed both sides of the wafer fixing tool 100 are prepd. and plastic-made base sheets 8 are arranged on the highest part and the lowest part to form a basic constitutional part and this basic constitutional part is placed in a storing bag and the inside of the bag is sealed by vacuum.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、半導体チップ
(集積回路が形成された個々の半導体装置)を保管又は
輸送・搬送する際に使用される半導体装置の包装方法又
は包装装置に関するものである。
[0001] 1. Field of the Invention [0002] The present invention relates to a method and an apparatus for packaging semiconductor devices used for storing, transporting, or transporting semiconductor chips (individual semiconductor devices on which integrated circuits are formed).

【0002】[0002]

【従来の技術】従来の半導体チップの包装方法及び包装
装置について、図4及び図5に基づいて説明する。
2. Description of the Related Art A conventional semiconductor chip packaging method and packaging apparatus will be described with reference to FIGS.

【0003】図4(a)は半導体ウエハを半導体チップに
切断する際に使用されるウエハ固定ツールの平面図であ
り、図4(b)は図4(a)のA−A線断面図である。
FIG. 4A is a plan view of a wafer fixing tool used for cutting a semiconductor wafer into semiconductor chips, and FIG. 4B is a cross-sectional view taken along line AA of FIG. is there.

【0004】図4において、ウエハ固定ツール100
は、粘着シート1及び固定リング3から構成されてお
り、粘着シート1上に半導体ウエハ2が密着・固定され
ている。粘着シート1の周囲に配設された固定リング3
は、半導体ウエハ2を切断しやすくするために粘着シー
ト1を拡張し保持するためのもので、粘着シート1と併
用されている。なおライン4は図示しないウエハ切断装
置のカッタ刃の切断跡を示す。
In FIG. 4, a wafer fixing tool 100 is shown.
Comprises a pressure-sensitive adhesive sheet 1 and a fixing ring 3, on which a semiconductor wafer 2 is adhered and fixed. Fixing ring 3 arranged around adhesive sheet 1
Is for expanding and holding the pressure-sensitive adhesive sheet 1 so that the semiconductor wafer 2 can be easily cut, and is used together with the pressure-sensitive adhesive sheet 1. Line 4 indicates a cutting trace of a cutter blade of a wafer cutting device (not shown).

【0005】図5は半導体チップ2aを並べて配置する
個装容器の外観を示す斜視図である。この個装容器5は
チップトレイと呼ばれ、その表面部には半導体チップ2
aを入れるポケット5aが設けられている。
FIG. 5 is a perspective view showing the external appearance of an individual container in which the semiconductor chips 2a are arranged side by side. The individual container 5 is called a chip tray, and a semiconductor chip 2 is provided on a surface portion thereof.
A pocket 5a for storing a is provided.

【0006】次に、従来の半導体チップの包装工程につ
いて説明する。通常、図4に示すように切断されICチ
ップ化された半導体ウエハ2は、そのままの状態で図示
しない次工程装置送りとなり、個々の半導体チップ2a
の外部電極配線工程、封止工程等の組立工程を経て完成
品となる。
Next, a conventional semiconductor chip packaging process will be described. Normally, the semiconductor wafer 2 cut into IC chips as shown in FIG.
The finished product is obtained through an assembly process such as an external electrode wiring process and a sealing process.

【0007】完成品となった半導体チップ2aは検査工
程を経て、チューブ,トレイ,あるいはエンボステープ
等の個装容器に詰めた後、内装作業(袋詰め、内装箱詰
め作業)及び外装作業(ダンボール等の外箱に内装箱を
複数個詰める作業)を終えて出荷される。
[0007] The completed semiconductor chip 2a is subjected to an inspection process, packed in a container such as a tube, tray, or embossed tape, and then subjected to interior work (bag filling, interior box packing work) and exterior work (cardboard cardboard etc.). Packing multiple inner boxes in the outer box) before shipment.

【0008】最近、さらなる高密度実装化のために客先
では半導体メーカーから完成品ではなく半導体チップの
ままで供給を受けて自社で組み立てを行うケースが増え
てきている。
In recent years, in order to achieve even higher density mounting, the number of cases where customers are supplied with semiconductor chips instead of finished products from semiconductor manufacturers and assemble them in-house have been increasing.

【0009】このようなニーズに答えるため半導体チッ
プの出荷方法として、以下のステップが遂行されてい
る。 (1)図4に示したウエハ固定ツール100から半導体
チップ2aを1個ずつピックアップしてチップトレイ5
のポケット5aに詰める。 (2)半導体チップ2aを詰め終えたチップトレイ5を
複数枚重ね、最後に蓋代りの空のチップトレイ5を載せ
る。この様子を図5に示す。 (3)前記(2)のチップトレイ群を図示しない結束部
品(輪ゴム、テープ類等)で固定する。 (4)前記(3)の結束したチップトレイ群を図示しな
い防湿袋に詰めて脱気シールを行い、その複数個を緩衝
材で保護しながら内袋箱詰め、外装箱詰めを行い出荷し
ている。
In order to meet such needs, the following steps are performed as a method of shipping semiconductor chips. (1) The semiconductor chip 2a is picked up one by one from the wafer fixing tool 100 shown in FIG.
Into the pocket 5a. (2) A plurality of chip trays 5 in which the semiconductor chips 2a have been packed are stacked, and an empty chip tray 5 serving as a lid is finally placed. This is shown in FIG. (3) The chip tray group of (2) is fixed with binding parts (rubber rubber, tapes, etc.) not shown. (4) The bundled chip trays of (3) are packed in a moisture-proof bag (not shown) to perform deaeration sealing, and a plurality of the trays are packed in an inner bag box and an outer box while protecting with a cushioning material before shipping.

【0010】[0010]

【発明が解決しようとする課題】従来の半導体チップの
出荷の際の包装工程は上記の様に構成されていることか
ら、次に述べる問題があった。 (1)半導体チップ2aをチップトレイ5のポケット5
aに詰める作業において、搭載用の装置を必要とし、か
つ作業手間、作業コストが発生する。 (2)上記搭載用装置として、例えば吸着ピンセット等
のツールを用いて半導体チップ2aを1個ずつピックア
ップして取り扱うため、半導体チップ2aの表面に傷が
つく恐れがある。また、チップトレイ5のポケット5a
内で半導体チップ2aが動く恐れがあり、半導体チップ
2aの割れ及び欠けが発生しやすく半導体集積回路とし
ての品質が守れない。 (3)チップトレイ5の1枚に納まる半導体チップ2a
の数がせいぜい数十個程度であるため、多くのチップト
レイ枚数が必要となる。
Since the conventional packaging process for shipping semiconductor chips is configured as described above, there are the following problems. (1) Put the semiconductor chip 2a in the pocket 5 of the chip tray 5.
In the operation of packing into a, a device for mounting is required, and labor and cost are required. (2) As the mounting device, since the semiconductor chips 2a are picked up and handled one by one using a tool such as suction tweezers, the surface of the semiconductor chip 2a may be damaged. The pocket 5a of the chip tray 5
The semiconductor chip 2a may move inside the semiconductor chip, and the semiconductor chip 2a is easily cracked or chipped, and the quality of the semiconductor integrated circuit cannot be maintained. (3) The semiconductor chip 2a that fits in one of the chip trays 5
Is at most several tens, so a large number of chip trays is required.

【0011】この発明は、上記のような問題点を解消す
るためになされたもので、半導体チップをチップトレイ
に詰込む作業が不要であり、半導体チップに割れ及び欠
けが発生せず、多くの個装容器を必要としない効率の高
い半導体装置の包装装置及び包装方法を提供する。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and there is no need to pack semiconductor chips into a chip tray. Provided are a highly efficient semiconductor device packaging apparatus and a packaging method that do not require an individually packaged container.

【0012】[0012]

【課題を解決するための手段】請求項1記載の半導体チ
ップの包装方法の発明は、ウエハ固定ツールに固着され
た半導体ウエハをそのウエハ外形が残るように複数個の
半導体チップに分割し、上記ウエハ固定ツールの両側を
層間紙及び緩衝シート等の緩衝材で挟んだものを複数個
用意し、かつその最上部及び最下部にプラスチック製等
の基板を配設して基本構成部分を形成し、この基本構成
部分を収納袋に入れて袋内を密着させたことを特徴とす
る。
According to a first aspect of the present invention, there is provided a method of packaging a semiconductor chip, comprising: dividing a semiconductor wafer fixed to a wafer fixing tool into a plurality of semiconductor chips so that the outer shape of the wafer remains; Prepare a plurality of wafer fixing tools with both sides sandwiched between buffer materials such as interlayer paper and a buffer sheet, and arrange a substrate made of plastic or the like at the top and bottom to form the basic components, It is characterized in that the basic components are put in a storage bag and the inside of the bag is brought into close contact.

【0013】請求項2記載の半導体チップの包装装置の
発明は、半導体ウエハをそのウエハ外形が残るように複
数個の半導体チップに分割した状態で固着させたウエハ
固定ツールを備え、複数個のウエハ固定ツールの両側部
分を層間紙及び緩衝シート等の緩衝材で挟みかつその最
上部及び最下部に基板を配設して基本構成部分を形成
し、この基本構成部分を収納袋に入れて収納袋内を密着
させたことを特徴とする。
According to a second aspect of the present invention, there is provided an apparatus for packaging a semiconductor chip, comprising a wafer fixing tool in which a semiconductor wafer is divided and fixed to a plurality of semiconductor chips so that the outer shape of the semiconductor wafer remains. A basic component is formed by sandwiching both sides of the fixing tool between buffer materials such as interlayer paper and a buffer sheet, and arranging substrates on the uppermost and lowermost portions thereof, and forming the basic component in a storage bag. It is characterized in that the inside is brought into close contact.

【0014】請求項3記載の発明は、基本構成部分を収
納袋に入れて収納袋内を真空シールしたことを特徴とす
る。
The invention according to claim 3 is characterized in that the basic components are put in a storage bag and the inside of the storage bag is vacuum-sealed.

【0015】請求項4記載の発明は、基本構成部分を収
納袋に入れたものを内装箱に入れ、かつ複数の内装箱を
外装箱に詰めたことを特徴とする。
The invention according to claim 4 is characterized in that the basic components are put in a storage bag, put in an inner box, and a plurality of inner boxes are packed in an outer box.

【0016】[0016]

【発明の実施の形態】実施の形態1.図1はこの発明の
実施の形態1による半導体チップの包装装置及び包装方
法の基本構成部分を表わす斜視図であり、図2はこの基
本構成部分の重なりの様子を示す側面図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a perspective view showing the basic components of a semiconductor chip packaging apparatus and a packaging method according to a first embodiment of the present invention, and FIG. 2 is a side view showing how the basic components overlap.

【0017】図1及び図2に示される半導体ウエハ2及
びウエハ固定ツール100は図4に示すものと同様であ
る。すなわち、ウエハ固定ツール100は、粘着シート
1及び固定リング3から構成されており、粘着シート1
上に半導体ウエハ2が密着・固定されている。また、半
導体ウエハ2は既にウエハ切断装置(図示せず)により
個々の半導体チップ2aに切断加工され終えた状態とな
っており、切断された個々の半導体チップ2aは半導体
ウエハ外形を残した形で粘着シート1に密着された状態
となっている。粘着シート1の周囲に配設された固定リ
ング3は、半導体ウエハ2を切断する際に粘着シート1
を拡張し保持するためのもので、ライン4は図示しない
ウエハ切断装置のカッタ刃の跡を示す。
The semiconductor wafer 2 and the wafer fixing tool 100 shown in FIGS. 1 and 2 are the same as those shown in FIG. That is, the wafer fixing tool 100 is composed of the adhesive sheet 1 and the fixing ring 3, and the adhesive sheet 1
The semiconductor wafer 2 is adhered and fixed thereon. The semiconductor wafer 2 has already been cut into individual semiconductor chips 2a by a wafer cutting device (not shown), and the cut individual semiconductor chips 2a remain in the form of leaving the outer shape of the semiconductor wafer. It is in a state of being in close contact with the adhesive sheet 1. When the semiconductor wafer 2 is cut, the fixing ring 3 disposed around the adhesive sheet 1
The line 4 indicates a trace of a cutter blade of a wafer cutting device (not shown).

【0018】この実施の形態1では、まず、ウエハ切断
装置(図示せず)により個々の半導体チップ2aに切断
加工され終え、半導体ウエハ外形を残した形で粘着シー
ト1に密着された状態のウエハ固定ツール100を(図
4参照)を複数枚用意する。そして、各ウエハ固定ツー
ル100の表裏側に、半導体チップ2aの表面を保護す
るため、緩衝材として層間紙6及びウレタンフォーム等
の緩衝シート7を介在させる。その後、最上部及び最低
部にプラスチック製等の基板8を配設してサンドイッチ
状態とした基本構成部分9を作成する。
In the first embodiment, first, the wafer is cut into individual semiconductor chips 2a by a wafer cutting device (not shown), and the semiconductor chip 2a is in close contact with the adhesive sheet 1 while leaving the outer shape of the semiconductor wafer. A plurality of fixing tools 100 (see FIG. 4) are prepared. In order to protect the surface of the semiconductor chip 2a on the front and back sides of each wafer fixing tool 100, an interlayer paper 6 and a buffer sheet 7 such as urethane foam are interposed as buffer materials. Thereafter, a substrate 8 made of plastic or the like is disposed at the uppermost portion and the lowermost portion to form a basic component 9 in a sandwich state.

【0019】図3は前述の基本構成部分9を袋及び箱詰
めする工程の説明図である。図において、基本構成部分
9をアルミラミネート構造等でできた防湿袋10に入
れ、袋内を真空にして防湿袋10の開口部を加熱シール
等(脱気シール、窒素置換シール等)で封止する。そし
て、シールを終えた収納袋単位11を内装箱12に入
れ、更に複数の内装箱12を外装箱13に詰める。
FIG. 3 is an explanatory view of a step of packing the above-mentioned basic components 9 in a bag and a box. In the figure, the basic constituent part 9 is put in a moisture-proof bag 10 made of an aluminum laminate structure or the like, the inside of the bag is evacuated, and the opening of the moisture-proof bag 10 is sealed with a heat seal or the like (a degassing seal, a nitrogen replacement seal, etc.). I do. Then, the sealed storage unit 11 is placed in the interior box 12, and the plurality of interior boxes 12 are packed in the exterior box 13.

【0020】以上のように、実施の形態1によれば、従
来の問題点であったチップトレイ5のポケット5aに各
半導体チップ2aを詰める作業が不要となり、そのため
の作業手間及び作業コストが発生しない。また、半導体
チップ包装及び移送の際、吸着ピンセット等のツールを
用いて半導体チップ2aを1個ずつピックアップして取
り扱うことがないので、半導体チップ2a表面に傷がつ
く恐れもない。
As described above, according to the first embodiment, the work of packing each semiconductor chip 2a into the pocket 5a of the chip tray 5, which is a conventional problem, becomes unnecessary, and the labor and cost for the operation are increased. do not do. Further, at the time of packaging and transporting the semiconductor chips, it is not necessary to pick up and handle the semiconductor chips 2a one by one using a tool such as suction tweezers, so that the surface of the semiconductor chips 2a is not damaged.

【0021】そして、収納袋単位11に格納された基本
構成部分9では、個々の半導体チップ2aはウエハ固定
ツール100に固着された状態で、層間紙6や緩衝シー
ト7等の緩衝材に挟まれ、最上部及び最下部を基板8に
より保護され、サンドイッチ状態にして真空シールして
いるので、半導体チップ2aが動くことがなく、割れ及
び欠けが発生しない。
In the basic components 9 stored in the storage bag unit 11, the individual semiconductor chips 2a are fixed to the wafer fixing tool 100 and sandwiched between buffer materials such as interlayer paper 6 and buffer sheets 7. Since the uppermost and lowermost portions are protected by the substrate 8 and are vacuum-sealed in a sandwich state, the semiconductor chip 2a does not move, and cracking and chipping do not occur.

【0022】また、図4に示すウエハ固定ツール100
を、そのまま半導体チップの個装容器としているので、
1個当たりの半導体チップ2aの収容効率が高くなり、
かつ図5に示すチップトレイ5が不要となる。
The wafer fixing tool 100 shown in FIG.
Is used as it is as a semiconductor chip individual container.
The accommodation efficiency of the semiconductor chip 2a per one becomes high,
Further, the chip tray 5 shown in FIG. 5 becomes unnecessary.

【0023】なお、上記実施の形態1では、内装箱12
と外装箱13の両方を使用したものを示したが、いずれ
かを省略しても良い。また、内装箱12内には、脱酸素
材や乾燥剤等を入れても良い。
In the first embodiment, the interior box 12
Although the case using both the outer box 13 and the outer box 13 is shown, either of them may be omitted. The interior box 12 may contain a deoxidizing material, a desiccant, and the like.

【0024】[0024]

【発明の効果】以上のようにこの発明によれば、半導体
ウエハを複数個の半導体チップに切断加工を終えた状態
のままで包装及び搬送するようにしたので、個々の半導
体チップを詰める作業が不要となり、そのため作業手間
が省け、作業コストが安価となる効果がある。また、半
導体チップ包装及び移送の際、吸着ピンセット等で半導
体チップを1個ずつピックアップして取り扱うことがな
いので、半導体チップ表面に傷がつく恐れもない。
As described above, according to the present invention, the semiconductor wafer is packaged and transported in a state in which the semiconductor wafer has been cut into a plurality of semiconductor chips. This eliminates the necessity, and thus has the effect of reducing labor and labor costs. In addition, since semiconductor chips are not picked up and handled one by one by suction tweezers or the like when packaging and transporting the semiconductor chips, there is no possibility that the semiconductor chip surface is damaged.

【0025】また、収納袋に格納された基本構成部分で
は、個々の半導体チップはウエハ固定ツールに固着され
た状態で、緩衝材に挟まれかつ最上部及び最下部を基板
により保護され、真空シールされているので、半導体チ
ップが動くことがなく、割れ及び欠けが発生しない。
In the basic components stored in the storage bag, the individual semiconductor chips are fixed to the wafer fixing tool, and are sandwiched between cushioning materials, the uppermost and lowermost portions are protected by the substrate, and the vacuum sealing is performed. As a result, the semiconductor chip does not move, and cracking and chipping do not occur.

【0026】更に、半導体ウエハ外形を残したまま半導
体チップをウエハ固定ツールに密着させ、そのまま個装
容器としているので、1個当たりの半導体チップの収容
効率が高くなる効果がある。
Further, since the semiconductor chips are brought into close contact with the wafer fixing tool while leaving the outer shape of the semiconductor wafer and used as individual packaging containers, there is an effect that the efficiency of accommodating one semiconductor chip increases.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 この発明の実施の形態1による半導体チップ
の包装装置及び包装方法の基本構成部分を示す斜視図で
ある。
FIG. 1 is a perspective view showing basic components of a semiconductor chip packaging apparatus and a packaging method according to a first embodiment of the present invention.

【図2】 この発明の実施の形態1による半導体チップ
の包装装置及び包装方法の基本構成部分を示す側面図で
ある。
FIG. 2 is a side view showing basic components of a semiconductor chip packaging device and a packaging method according to Embodiment 1 of the present invention;

【図3】 この発明の実施の形態1による基本構成部分
を袋及び箱詰めする工程の説明図である。
FIG. 3 is an explanatory diagram of a step of bagging and boxing basic components according to the first embodiment of the present invention.

【図4】 半導体ウエハを半導体チップに切断する際に
使用されるツールの平面図及び断面図である。
FIG. 4 is a plan view and a cross-sectional view of a tool used for cutting a semiconductor wafer into semiconductor chips.

【図5】 従来の半導体チップの個装容器を示す斜視図
である。
FIG. 5 is a perspective view showing a conventional semiconductor chip packaging container.

【符号の説明】[Explanation of symbols]

1 粘着シート、2 半導体ウエハ、2a 半導体チッ
プ、3 固定リング、6 層間紙、7 緩衝シート、8
基板、9 基本構成部分、10 防湿袋、12 内装
箱、13 外装箱、100 ウエハ固定ツール。
Reference Signs List 1 adhesive sheet, 2 semiconductor wafer, 2a semiconductor chip, 3 fixing ring, 6 interlayer paper, 7 buffer sheet, 8
Substrate, 9 basic components, 10 moisture-proof bag, 12 inner box, 13 outer box, 100 wafer fixing tool.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 ウエハ固定ツールに固着された半導体ウ
エハをそのウエハ外形が残るように複数個の半導体チッ
プに分割し、上記ウエハ固定ツールの両側を緩衝材で挟
んだものを複数個用意しかつその最上部及び最下部に基
板を配設して基本構成部分を形成し、この基本構成部分
を袋に入れて袋内を密着させたことを特徴とする半導体
チップの包装方法。
1. A semiconductor wafer fixed to a wafer fixing tool is divided into a plurality of semiconductor chips so that the outer shape of the wafer remains, and a plurality of semiconductor chips having both sides of the wafer fixing tool sandwiched between cushioning materials are prepared. A method for packaging a semiconductor chip, comprising: forming a basic component by arranging a substrate at an uppermost portion and a lowermost portion thereof; placing the basic component in a bag;
【請求項2】 半導体ウエハをそのウエハ外形が残るよ
うに複数個の半導体チップに分割した状態で固着させた
ウエハ固定ツールを備え、複数個の上記ウエハ固定ツー
ルの両側部分を緩衝材で挟みかつその最上部及び最下部
に基板を配設して基本構成部分を形成し、この基本構成
部分を袋に入れて袋内を密着させた半導体チップの包装
装置。
2. A wafer fixing tool, wherein a semiconductor wafer is divided and fixed to a plurality of semiconductor chips so that the outer shape of the wafer remains, and both side portions of the plurality of wafer fixing tools are sandwiched between cushioning materials. A semiconductor chip packaging apparatus in which a substrate is disposed at the uppermost and lowermost portions to form a basic component, and the basic component is placed in a bag and the inside of the bag is brought into close contact.
【請求項3】 上記基本構成部分を袋に入れて袋内を真
空シールしたことを特徴とする請求項2記載の半導体チ
ップの包装装置。
3. The semiconductor chip packaging apparatus according to claim 2, wherein the basic components are put in a bag and the inside of the bag is vacuum-sealed.
【請求項4】 上記基本構成部分を袋に入れたものを内
装箱に入れ、かつ複数の内装箱を外装箱に詰めたことを
特徴とする請求項2又は請求項3記載の半導体チップの
包装装置。
4. The packaging of a semiconductor chip according to claim 2, wherein the basic components are put in a bag in an interior box, and a plurality of interior boxes are packed in an exterior box. apparatus.
JP10003847A 1998-01-12 1998-01-12 Method and apparatus for packing semiconductor chip Pending JPH11198987A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10003847A JPH11198987A (en) 1998-01-12 1998-01-12 Method and apparatus for packing semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10003847A JPH11198987A (en) 1998-01-12 1998-01-12 Method and apparatus for packing semiconductor chip

Publications (1)

Publication Number Publication Date
JPH11198987A true JPH11198987A (en) 1999-07-27

Family

ID=11568588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10003847A Pending JPH11198987A (en) 1998-01-12 1998-01-12 Method and apparatus for packing semiconductor chip

Country Status (1)

Country Link
JP (1) JPH11198987A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001294292A (en) * 2000-04-17 2001-10-23 Nippon Foundry Inc Semiconductor wafer packaging member
WO2006025405A1 (en) * 2004-08-30 2006-03-09 Toyo Communication Equipment Co., Ltd. Method for dicing and packing sheet-shaped wafer, wafer packed article and peeling jig
KR100737617B1 (en) 2005-03-10 2007-07-10 엡슨 토요콤 가부시키 가이샤 Packing material for wafer
WO2009028380A1 (en) * 2007-08-28 2009-03-05 Dai Nippon Printing Co., Ltd. Packaging structure for roll paper
JP2009051541A (en) * 2007-08-28 2009-03-12 Dainippon Printing Co Ltd Packing structure for rolled paper
KR100987636B1 (en) 2008-07-25 2010-10-18 김대성 Interposing sheet for semiconductor lead frame metal and method of manufacturing the same
JP2011137057A (en) * 2009-12-25 2011-07-14 Nitto Denko Corp Tape for holding chip, method of holding chip-shaped workpiece, method of manufacturing semiconductor device using tape for holding chip, and method of manufacturing tape for holding chip
WO2011135639A1 (en) * 2010-04-28 2011-11-03 パナソニック株式会社 Container and method for storing semiconductor wafer
WO2013015113A1 (en) * 2011-07-26 2013-01-31 コニカミノルタアドバンストレイヤー株式会社 Method for packing optical element, and packed material
JP2020111389A (en) * 2019-01-09 2020-07-27 エスケイ・シルトロン・カンパニー・リミテッド Wafer cassette packaging apparatus

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001294292A (en) * 2000-04-17 2001-10-23 Nippon Foundry Inc Semiconductor wafer packaging member
WO2006025405A1 (en) * 2004-08-30 2006-03-09 Toyo Communication Equipment Co., Ltd. Method for dicing and packing sheet-shaped wafer, wafer packed article and peeling jig
KR100737617B1 (en) 2005-03-10 2007-07-10 엡슨 토요콤 가부시키 가이샤 Packing material for wafer
US8485354B2 (en) 2007-08-28 2013-07-16 Dai Nippon Printing Co., Ltd. Packaging structure for roll paper
WO2009028380A1 (en) * 2007-08-28 2009-03-05 Dai Nippon Printing Co., Ltd. Packaging structure for roll paper
JP2009051541A (en) * 2007-08-28 2009-03-12 Dainippon Printing Co Ltd Packing structure for rolled paper
US8607973B2 (en) 2007-08-28 2013-12-17 Dai Nippon Printing Co., Ltd. Packaging structure for roll paper
US8292071B2 (en) 2007-08-28 2012-10-23 Dai Nippon Printing Co., Ltd. Packaging structure for roll paper
KR100987636B1 (en) 2008-07-25 2010-10-18 김대성 Interposing sheet for semiconductor lead frame metal and method of manufacturing the same
JP2011137057A (en) * 2009-12-25 2011-07-14 Nitto Denko Corp Tape for holding chip, method of holding chip-shaped workpiece, method of manufacturing semiconductor device using tape for holding chip, and method of manufacturing tape for holding chip
WO2011135639A1 (en) * 2010-04-28 2011-11-03 パナソニック株式会社 Container and method for storing semiconductor wafer
WO2013015113A1 (en) * 2011-07-26 2013-01-31 コニカミノルタアドバンストレイヤー株式会社 Method for packing optical element, and packed material
JP2020111389A (en) * 2019-01-09 2020-07-27 エスケイ・シルトロン・カンパニー・リミテッド Wafer cassette packaging apparatus
US11569106B2 (en) 2019-01-09 2023-01-31 Sk Siltron Co., Ltd. Wafer cassette packing apparatus

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