CN218482220U - Dustproof integrated circuit chip - Google Patents

Dustproof integrated circuit chip Download PDF

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Publication number
CN218482220U
CN218482220U CN202222131362.7U CN202222131362U CN218482220U CN 218482220 U CN218482220 U CN 218482220U CN 202222131362 U CN202222131362 U CN 202222131362U CN 218482220 U CN218482220 U CN 218482220U
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China
Prior art keywords
shell
dustproof
top surface
dust cover
pin
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CN202222131362.7U
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Chinese (zh)
Inventor
蒋惠良
祝周宇
李强
李甲
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Xuzhou Kaslaite Intelligent Control Research Institute Co ltd
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Xuzhou Kaslaite Intelligent Control Research Institute Co ltd
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Abstract

The utility model relates to a dustproof integrated circuit chip, including the chip body, encapsulation shell and pin, the chip body sets up inside encapsulation shell, the pin is inserted and is established on encapsulation shell, pin and chip body electric connection, be provided with dust cover on the encapsulation shell, be provided with between dust cover and the encapsulation shell and be used for the coupling assembling of being connected the two, dust cover is the open cube casing in bottom surface, dust cover wraps up the top surface and the vertical side of encapsulation shell are whole, a plurality of holes of stepping down have been seted up to the position that the vertical lateral wall of dust cover corresponds the pin, the pin passes the hole of stepping down and extends to the dust cover outside, coupling assembling includes the spliced pole, connecting hole and connecting bolt, the vertical four corners department that sets up at the outer top surface of encapsulation shell of spliced pole, the vertical top surface of seting up at the spliced pole of connecting hole, the connecting hole is the screw hole, the top surface of spliced pole and the interior top surface laminating of dust cover. The utility model has the advantages of good dustproof effect and long service life.

Description

Dustproof integrated circuit chip
Technical Field
The utility model relates to an integrated circuit chip technical field, concretely relates to dustproof integrated circuit chip.
Background
An integrated circuit chip is a microelectronic device or component. The transistor, resistance, capacitance and inductance elements and wiring required in a circuit are interconnected by a certain process, manufactured on a small or a plurality of small semiconductor wafers or medium substrates, and then packaged in a shell to form a microstructure with the required circuit function; all the elements are structurally integrated, so that the electronic elements are greatly miniaturized, low in power consumption, intelligent and high in reliability. Most applications in the semiconductor industry today are silicon-based integrated circuits.
Referring to fig. 1, an integrated circuit chip in the prior art includes a chip body, a package housing 1 and pins 2, the chip body is packaged in the package housing 1, the pins 2 are inserted into the package housing 1, and one end of each pin is electrically connected to the chip body, wherein the package housing 1 plays roles of placing, fixing and protecting the chip body. The integrated circuit chip in the prior art has a problem in the use process: because there is the unavoidable installation gap on the encapsulation shell surface, therefore inside external dust enters into the encapsulation shell from these gaps easily to gathering at chip body surface, so for a long time, can influence the performance of chip body, lead to chip body trouble, shorten chip life.
SUMMERY OF THE UTILITY MODEL
Technical problem to be solved
To the deficiency among the prior art, the utility model provides a dustproof integrated circuit chip to the integrated circuit chip who solves among the prior art accumulates the dust easily and leads to the problem that performance degradation, life shorten.
(II) technical scheme
In order to achieve the above purpose, the technical scheme of the utility model is as follows:
the utility model provides a dustproof integrated circuit chip, includes chip body, encapsulation shell and pin, the chip body sets up inside the encapsulation shell, the pin is inserted and is established on the encapsulation shell, pin and chip body electric connection, be provided with dust cover on the encapsulation shell, be provided with between dust cover and the encapsulation shell and be used for the coupling assembling of being connected the two, dust cover is the open cube casing in bottom surface, dust cover wraps up the top surface and the vertical side of encapsulation shell are whole, a plurality of holes of stepping down have been seted up to the position that the vertical lateral wall of dust cover corresponds the pin, the pin passes the hole of stepping down and extends to the dust cover outside.
Further, coupling assembling includes spliced pole, connecting hole and connecting bolt, the vertical four corners department that sets up at the outer top surface of encapsulation shell of spliced pole, the vertical top surface of seting up at the spliced pole of connecting hole, the connecting hole is the screw hole, the top surface of spliced pole and the interior top surface laminating of dustproof shell, the vertical top surface and the screw thread that run through dustproof shell of pole portion of connecting bolt pegs graft in the connecting hole, the head of connecting bolt compresses tightly dustproof shell at the top surface of spliced pole.
Furthermore, dustproof housing includes inner shell and dust absorption layer, the dust absorption layer covers the inside and outside surface of inner shell completely, the inner shell is the metal casing, the dust absorption layer is the silica gel layer.
Furthermore, the height of the bottom edge of the dustproof shell is not lower than that of the bottom edge of the pin.
(III) beneficial technical effects
To sum up, the utility model discloses a following beneficial technological effect:
1. in the utility model, the dustproof shell is arranged on the packaging shell, the connecting component for connecting the dustproof shell and the packaging shell is arranged between the dustproof shell and the packaging shell, the dustproof shell is a cubic shell with an open bottom surface, the dustproof shell wraps the top surface and the vertical side surface of the packaging shell completely, a plurality of abdicating holes are arranged at the positions of the vertical side wall of the dustproof shell corresponding to the pins, and the pins pass through the abdicating holes and extend to the outside of the dustproof shell; therefore, the external dust can fall on the dustproof shell instead of directly falling on the packaging shell, thereby greatly reducing the amount of dust gathered on the packaging shell and entering the packaging shell, and avoiding the influence of excessive dust on the chip on the normal use of the chip;
2. the connecting assembly comprises a connecting column, a connecting hole and a connecting bolt, the connecting column is vertically arranged at four corners of the outer top surface of the packaging shell, the connecting hole is vertically formed in the top surface of the connecting column, the connecting hole is a threaded hole, the top surface of the connecting column is attached to the inner top surface of the dustproof shell, the rod part of the connecting bolt vertically penetrates through the top surface of the dustproof shell and is inserted into the connecting hole in a threaded manner, and the head part of the connecting bolt tightly presses the dustproof shell on the top surface of the connecting column; the dustproof shell and the packaging shell can be detachably connected through the arrangement, and the operation is simple and convenient; moreover, the dust-proof shell can be detached and cleaned regularly by a user, so that the possibility that the dust enters the chip due to the fact that too much dust is accumulated on the dust-proof shell is avoided; finally, the dustproof shell is separated from the packaging shell due to the arrangement of the connecting columns, so that heat generated by the chip during operation can be smoothly discharged, and the heat dissipation effect of the chip is prevented from being influenced;
3. the dustproof outer shell comprises an inner shell and a dust absorption layer, the inner surface and the outer surface of the inner shell are completely covered by the dust absorption layer, the inner shell is a metal shell, the dust absorption layer is a silica gel layer, the inner shell plays a role in supporting a framework, and the dust absorption layer plays a role in absorbing dust, so that the dustproof and dust absorption effects of the dustproof outer shell are improved;
4. because the bottom edge height of the dustproof shell is not lower than that of the pins, the situation that the dustproof shell blocks when the pins are connected with other parts can be avoided.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following descriptions are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a diagram illustrating a prior art integrated circuit chip;
FIG. 2 is a top view of a prior art integrated circuit chip of the background art;
FIG. 3 is a schematic diagram of an exemplary embodiment of a dust-protected IC chip;
FIG. 4 is a top view of an exemplary embodiment of a dust protected integrated circuit chip;
FIG. 5 is a schematic diagram of a structure of a dust-protected IC chip with a dust-protected housing removed according to an embodiment;
fig. 6 is a top view of the structure of fig. 5.
Description of reference numerals:
in the figure, 1, a package housing; 2. a pin; 3. a dust-proof housing; 4. a hole for abdication; 5. connecting columns; 6. connecting holes; 7. and connecting bolts.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the application described herein may be used. Moreover, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In the present application, the terms "upper", "lower", "left", "right", "front", "rear", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal", and the like indicate an orientation or positional relationship based on the orientation or positional relationship shown in the drawings. These terms are used primarily to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation.
Moreover, some of the above terms may be used to indicate other meanings besides the orientation or positional relationship, for example, the term "on" may also be used to indicate some kind of attachment or connection relationship in some cases. The specific meaning of these terms in this application will be understood by those of ordinary skill in the art as appropriate.
In addition, the term "plurality" shall mean two as well as more than two.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
Example (b):
referring to fig. 1-6, for the utility model discloses a dustproof integrated circuit chip, including chip body, packaging shell 1 and pin 2. The chip body is arranged inside the packaging shell 1, the pins 2 are inserted into the packaging shell 1, and the pins 2 are electrically connected with the chip body.
Be provided with dust cover 3 on the encapsulation shell 1, be provided with between dust cover 3 and the encapsulation shell 1 and be used for the coupling assembling who is connected the two, dust cover 3 is the open cube casing in bottom surface, and dust cover 3 wraps up the top surface and the vertical side of encapsulation shell 1 is whole, and a plurality of holes 4 of stepping down have been seted up to the vertical lateral wall of dust cover 3 corresponding pin 2's position, and pin 2 passes the hole 4 of stepping down and extends to the dust cover 3 outside.
Through the setting, on dustproof housing 3 can be fallen to external dust rather than directly falling to encapsulation shell 1 to the gathering has significantly reduced on encapsulation shell 1 and the quantity of entering into the inside dust of encapsulation shell 1, so can avoid the dust to collect too much and influence the normal use of chip on the chip, thereby it makes things convenient for pin 2 to stretch out from dustproof housing 3 and makes things convenient for pin 2 to be connected with other parts to set up of hole 4 of stepping down.
The connecting assembly comprises a connecting column 5, a connecting hole 6 and a connecting bolt 7. The vertical four corners department that sets up at the outer top surface of encapsulation shell 1 of spliced pole 5, the vertical top surface of seting up at spliced pole 5 of connecting hole 6, connecting hole 6 is the screw hole, spliced pole 5's top surface and dust cover 3's interior top surface laminating, the vertical top surface and the screw thread grafting that run through dust cover 3 in connecting hole 6 of pole portion of connecting bolt 7, connecting bolt 7's head compresses tightly dust cover 3 at spliced pole 5's top surface.
The dustproof shell 3 and the packaging shell 1 can be detachably connected through the arrangement, and the operation is simple and convenient; moreover, the user can detach and clean the dust-proof shell 3 periodically, thereby avoiding the possibility that the dust enters the chip due to the excessive dust accumulated on the dust-proof shell 3; finally, the dustproof shell 3 is separated from the packaging shell 1 due to the arrangement of the connecting column 5, so that heat generated by the chip during operation can be smoothly discharged, and the heat dissipation effect of the chip is prevented from being influenced.
Dustproof housing 3 includes inner shell and dust absorption layer, and the dust absorption layer covers the interior external surface of inner shell completely, and the inner shell is the metal casing, and the dust absorption layer is the silica gel layer. Wherein the inner shell plays the skeleton supporting role, and the dust absorption layer plays the dust absorption effect to improve dust proof dust absorption effect of dust proof housing 3.
In addition, the height of the bottom side of the dustproof shell 3 is not lower than that of the bottom side of the pin 2, so that the dustproof shell 3 can be prevented from blocking when the pin 2 is connected with other parts.
The working principle of the embodiment is as follows: the dustproof shell 3 is arranged on the packaging shell 1, the connecting component for connecting the dustproof shell 3 and the packaging shell 1 is arranged between the dustproof shell 3 and the packaging shell 1, the dustproof shell 3 is a cubic shell with an open bottom surface, the dustproof shell 3 completely wraps the top surface and the vertical side surface of the packaging shell 1, a plurality of abdicating holes 4 are formed in the vertical side wall of the dustproof shell 3 at positions corresponding to the pins 2, and the pins 2 penetrate through the abdicating holes 4 and extend to the outside of the dustproof shell 3; therefore, the external dust will fall on the dust-proof housing 3 instead of directly falling on the package housing 1, so as to greatly reduce the amount of dust collected on the package housing 1 and entering the interior of the package housing 1, thereby avoiding the dust from accumulating too much on the chip to affect the normal use of the chip.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious changes and modifications can be made without departing from the scope of the invention.

Claims (4)

1. The utility model provides a dustproof integrated circuit chip, includes chip body, package shell (1) and pin (2), the chip body sets up inside package shell (1), pin (2) are inserted and are established on package shell (1), pin (2) and chip body electric connection, its characterized in that: be provided with dust cover (3) on encapsulation shell (1), be provided with between dust cover (3) and encapsulation shell (1) and be used for the coupling assembling of connecting the two, dust cover (3) are the open cube casing in bottom surface, dust cover (3) are all wrapped up with the top surface and the vertical side of encapsulation shell (1), a plurality of holes of stepping down (4) have been seted up to the position that the vertical lateral wall of dust cover (3) corresponds pin (2), pin (2) are passed and are stepped down hole (4) and extend to dust cover (3) outside.
2. The dustproof integrated circuit chip of claim 1, wherein: coupling assembling includes spliced pole (5), connecting hole (6) and connecting bolt (7), spliced pole (5) vertical setting is in the four corners department of the outer top surface of encapsulation shell (1), the vertical top surface of seting up at spliced pole (5) of connecting hole (6), connecting hole (6) are the screw hole, the top surface of spliced pole (5) is laminated with the interior top surface of dustproof shell (3), the vertical top surface and the screw thread that run through dustproof shell (3) of pole portion of connecting bolt (7) are pegged graft in connecting hole (6), the head of connecting bolt (7) compresses tightly dustproof shell (3) at the top surface of spliced pole (5).
3. The dustproof integrated circuit chip of claim 2, wherein: the dustproof outer shell (3) comprises an inner shell and a dust absorption layer, the inner surface and the outer surface of the inner shell are completely covered by the dust absorption layer, the inner shell is a metal shell, and the dust absorption layer is a silica gel layer.
4. The dustproof integrated circuit chip of claim 1, wherein: the height of the bottom edge of the dustproof shell (3) is not lower than that of the bottom edge of the pin (2).
CN202222131362.7U 2022-08-12 2022-08-12 Dustproof integrated circuit chip Active CN218482220U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202222131362.7U CN218482220U (en) 2022-08-12 2022-08-12 Dustproof integrated circuit chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202222131362.7U CN218482220U (en) 2022-08-12 2022-08-12 Dustproof integrated circuit chip

Publications (1)

Publication Number Publication Date
CN218482220U true CN218482220U (en) 2023-02-14

Family

ID=85165013

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202222131362.7U Active CN218482220U (en) 2022-08-12 2022-08-12 Dustproof integrated circuit chip

Country Status (1)

Country Link
CN (1) CN218482220U (en)

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GR01 Patent grant
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EE01 Entry into force of recordation of patent licensing contract
EE01 Entry into force of recordation of patent licensing contract

Assignee: Xuzhou Maiwei Machinery Co.,Ltd.

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

Contract record no.: X2023980051088

Denomination of utility model: A dustproof integrated circuit chip

Granted publication date: 20230214

License type: Common License

Record date: 20231209

Assignee: Jiangsu quanyue Power Equipment Co.,Ltd.

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

Contract record no.: X2023980051063

Denomination of utility model: A dustproof integrated circuit chip

Granted publication date: 20230214

License type: Common License

Record date: 20231209

Assignee: Jiangsu Xuma Environmental Protection Technology Co.,Ltd.

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

Contract record no.: X2023980051046

Denomination of utility model: A dustproof integrated circuit chip

Granted publication date: 20230214

License type: Common License

Record date: 20231209

Assignee: Xuzhou Zhirui Construction Machinery Co.,Ltd.

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

Contract record no.: X2023980051013

Denomination of utility model: A dustproof integrated circuit chip

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Assignee: Xuzhou Julian Mining Equipment Manufacturing Co.,Ltd.

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

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Denomination of utility model: A dustproof integrated circuit chip

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Denomination of utility model: A dustproof integrated circuit chip

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Assignee: Xuzhou Tongshan Hanwang Agricultural Service Development Co.,Ltd.

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Denomination of utility model: A dustproof integrated circuit chip

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Assignee: Xuzhou Maiwei Machinery Co.,Ltd.

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Contract record no.: X2023980051088

Date of cancellation: 20240315

Assignee: Jiangsu quanyue Power Equipment Co.,Ltd.

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

Contract record no.: X2023980051063

Date of cancellation: 20240315

EC01 Cancellation of recordation of patent licensing contract
EC01 Cancellation of recordation of patent licensing contract

Assignee: Xuzhou Tongshan Hanwang Agricultural Service Development Co.,Ltd.

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

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Assignee: Xuzhou Zhirui Construction Machinery Co.,Ltd.

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

Contract record no.: X2023980051013

Date of cancellation: 20240319

Assignee: Xuzhou Julian Mining Equipment Manufacturing Co.,Ltd.

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

Contract record no.: X2023980050994

Date of cancellation: 20240319