CN218124704U - Merging unit tester based on time service system - Google Patents
Merging unit tester based on time service system Download PDFInfo
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- CN218124704U CN218124704U CN202222588273.5U CN202222588273U CN218124704U CN 218124704 U CN218124704 U CN 218124704U CN 202222588273 U CN202222588273 U CN 202222588273U CN 218124704 U CN218124704 U CN 218124704U
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Abstract
The utility model discloses a merging unit tester based on a time service system, which comprises a central processing unit, a time service unit, an optical Ethernet communication unit, a time service unit, a voltage source output unit, a current source output unit and a communication unit, wherein the time service unit, the optical Ethernet communication unit, the time service unit, the voltage source output unit, the current source output unit and the communication unit are respectively connected with the central processing unit; the central processing unit is used for receiving clock information of the time synchronization unit and comparing the clock information with voltage and current of the voltage source output unit and the current source output unit through receiving data of the optical Ethernet merging unit to achieve the purpose of detection, and meanwhile, the central processing unit achieves the purpose of detecting a protocol through protocol communication of the electric Ethernet unit and the merging unit. The utility model discloses can channel into total station SCD model file, can be convenient for inspect merging unit function, performance and communication uniformity.
Description
Technical Field
The utility model relates to a merging cells tests technical field, specifically is a merging cells tester based on time service system.
Background
Under the background of an intelligent power grid, an intelligent substation is developed in a large scale, along with the intelligentization of the substation, the application of a merging unit in the intelligent substation is continuously increased, the merging unit is called MU for short, and is an intelligent component in the intelligent substation and a physical unit used for carrying out time-related combination on current and voltage data from a secondary converter.
At present, the domestic intelligent transformer substation enters a comprehensive construction stage, the merging unit is used as a key component of the intelligent transformer substation, and the performance of the merging unit directly influences the operation reliability of the transformer substation and even the intelligent power grid.
Before the merging unit is used, a merging unit tester needs to be used for detection, the existing merging unit tester is a test instrument based on a single protection test item, however, according to the field debugging experience, particularly the debugging of the merging unit monomer, the monomer debugging of the merging unit by using the existing merging unit tester often needs to consume a large amount of manpower and time, because a debugging person needs to continuously test each test item according to the SCD file of the whole station, and meanwhile, the existing merging unit tester cannot check the communication consistency of the merging unit.
Therefore, the existing merging unit tester mainly has the following defects:
1. the existing merging unit tester cannot check the communication consistency of the merging unit;
2. the existing merging unit tester can not realize intellectualization, namely, the setting of each test type needs to be calculated by a debugging person and manually input into the tester;
3. the existing merging unit tester can not realize abnormal tests in the synchronous and asynchronous alternating processes.
SUMMERY OF THE UTILITY MODEL
The utility model provides a not enough to prior art, the utility model provides a merging cells tester based on time service system, the purpose is solved above-mentioned problem.
In order to achieve the above purpose, the utility model provides a following technical scheme:
a merging unit tester based on a time service system comprises a central processing unit, and a time service unit, an optical Ethernet communication unit, a time service unit, a voltage source output unit and a current source output unit which are respectively connected with the central processing unit, wherein the communication unit comprises:
the central processing unit comprises two processing modules of ADSP and FPGA; the ADSP comprises a BF609 processor which is used as a main control CPU and is used for controlling the test flow and realizing the calculation and transmission; the FPGA comprises an XC7S50 for connecting a time service unit, a voltage output unit, a current output unit, a time service unit and an Ethernet over Ethernet communication unit;
the time setting unit comprises a GPS module; the GPS module is connected with the FPGA;
the optical Ethernet communication unit comprises an FTLF1217P2xTL module which is used for converting an electric Ethernet into an optical Ethernet and converting the optical Ethernet into an electric Ethernet;
the time service unit comprises an IRIG-B module and an IEEE1588 module and is used for time service for the merging unit;
the voltage source output unit comprises an LTC2704 and a voltage source module; the LTC2704 is used for converting the digital signals of the logic processing unit into analog signals; the voltage source module comprises an IRFP460 which is used for converting the analog signal into a +/-175V high-voltage signal;
the current source output unit comprises an LTC2704 and a current source module; the LTC2704 is used for converting the digital signal of the logic processing unit into an analog signal; the current source module comprises IXTN170P10P for converting the analog signal into a +/-30A current signal;
the communication unit comprises an Ethernet communication module used for connecting an external computer and the merging unit through Ethernet.
Preferably, the voltage source output unit is provided with a short-circuit protection interface.
Preferably, the current source output unit is provided with an open circuit protection interface and an overload protection interface.
Preferably, the time tick unit and the central processing unit are connected by a serial port.
Preferably, the connection between the optical ethernet communication unit and the central processing unit adopts an MII interface.
Preferably, an SPI bus is used for connection between the central processing unit and the voltage source output unit.
Preferably, an SPI bus is used for connection between the central processing unit and the current source output unit.
Preferably, the central processing unit and the communication unit are connected by an MII bus.
Preferably, the central processing unit and the time service unit are connected by a parallel bus.
Compared with the prior art, the utility model discloses possess following beneficial effect:
the utility model provides a merging units tester based on time service system, can realize the merging units test to intelligent substation;
the method has the advantages that the total-station SCD model file can be imported, a test scheme can be automatically set for a merging unit of the intelligent substation, and the actual situation and the fault of a site can be simulated;
the check of the consistency and the reliability of the communication of the merging unit can be realized by outputting protocol or simulation message error pairs which conform to the intelligent substation;
the time service interruption or connection of the merging unit is controlled through the control of the time service unit, so that the synchronous mode and the asynchronous mode of the merging unit are switched.
Drawings
Fig. 1 is a connection block diagram of a merging unit tester based on a time service system according to the present invention;
fig. 2 is a connection relationship diagram of each unit of the merging unit tester based on the time service system of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts all belong to the protection scope of the present invention.
Referring to fig. 1 and 2, a merging unit tester based on a time service system includes a central processing unit, and a time service unit, an ethernet communication unit, a time service unit, a voltage source output unit, a current source output unit, and a communication unit respectively connected to the central processing unit;
the central processing unit comprises two processing modules of ADSP and FPGA; the ADSP comprises a BF609 processor which is used as a main control CPU and used for realizing the control and the calculation of the test flow; the FPGA comprises an XC7S50 for connecting a time service unit, a voltage output unit, a current output unit, a time service unit and an Ethernet over fiber communication unit;
the time setting unit comprises a GPS module; the GPS module is connected with the FPGA;
the Ethernet over coax communication unit comprises an FTLF1217P2xTL module and is used for converting an Ethernet over Ethernet into an Ethernet over Ethernet and an Ethernet over Ethernet converting the Ethernet over Ethernet;
the time service unit comprises an IRIG-B module and an IEEE1588 module and is used for time service for the merging unit;
the voltage source output unit comprises an LTC2704 and a voltage source module; the LTC2704 is used for converting the digital signals of the logic processing unit into analog signals; the voltage source module comprises an IRFP460 which is used for converting the analog signal into a +/-175V high-voltage signal;
the current source output unit comprises an LTC2704 and a current source module; the LTC2704 is used for converting the digital signal of the logic processing unit into an analog signal; the current source module comprises IXTN170P10P for converting the analog signal into a +/-30A current signal;
the communication unit comprises an Ethernet communication module used for connecting an external computer and the merging unit through Ethernet.
When the detector is used for testing the merging unit, the tester is connected with the voltage and the current of the merging unit, the optical fiber Ethernet and the electric Ethernet are connected with the merging unit, the optical fiber Ethernet is used for receiving IEC61850 messages output by the merging unit, the electric Ethernet reads the internal information of the merging unit through an MMS protocol, the tester tests a plurality of items of the merging unit through a preset testing scheme and simultaneously reads the internal information of the merging unit to achieve the purpose of one-key testing, a detection report is automatically generated after the testing is finished, the operation is simple, the detection is convenient, and the consistency detection can be carried out on the merging unit.
The central processing unit achieves the purpose of detection by receiving data of the optical Ethernet merging unit and comparing the voltage and the current of the voltage source output unit and the current source output unit, and achieves the purpose of detecting a protocol by protocol communication of the electric Ethernet unit and the merging unit; the utility model discloses can channel into total station SCD model file, can inspect merging unit function, performance and communication uniformity.
In order to avoid loss caused by short circuit or inaccurate detection results, the voltage source output unit is provided with a short-circuit protection interface.
In order to avoid the loss caused by overload or open circuit or inaccurate detection result, the current source output unit is provided with an open circuit protection interface and an overload protection interface.
And the time setting unit is connected with the central processing unit through a serial port.
In order to increase the effectiveness of connection, the connection between the optical Ethernet communication unit and the central processing unit adopts an MII interface; the central processing unit and the communication unit are connected by an MII bus.
The central processing unit and the voltage source output unit are connected by an SPI bus; the SPI bus is adopted in the connection between the central processing unit and the current source output unit, and the data transmission rate block is convenient to detect in a connection mode of the SPI bus.
In order to improve the data transmission speed, the central processing unit is connected with the time service unit through a parallel port bus.
The utility model discloses can be to intelligent substation's merging cells's test to and can lead into total powerstation SCD model file and carry out merging cells to intelligent substation's merging cells automatic settlement test scheme and simulation on-the-spot actual conditions and trouble and detect, the output accords with intelligent substation's stipulation or simulation message mistake to carry out the effect of examining with merging cells communication uniformity and reliability.
It should be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (9)
1. The utility model provides a merging cells tester based on time service system which characterized in that, includes central processing unit, time service unit, ethernet communication unit, time service unit, voltage source output unit, current source output unit, communication unit:
the central processing unit comprises two processing modules of ADSP and FPGA; the ADSP comprises a BF609 processor which is used as a main control CPU and is used for controlling the test flow and realizing the calculation and transmission; the FPGA comprises an XC7S50 for connecting a time service unit, a voltage output unit, a current output unit, a time service unit and an Ethernet over Ethernet communication unit;
the time setting unit comprises a GPS module; the GPS module is connected with the FPGA;
the Ethernet over coax communication unit comprises an FTLF1217P2xTL module and is used for converting an Ethernet over coax into an Ethernet over coax and converting the Ethernet over coax into an Ethernet over coax;
the time service unit comprises an IRIG-B module and an IEEE1588 module and is used for time service for the merging unit;
the voltage source output unit comprises an LTC2704 and a voltage source module; the LTC2704 is used for converting the digital signals of the logic processing unit into analog signals; the voltage source module comprises an IRFP460 which is used for converting the analog signal into a +/-175V high-voltage signal;
the current source output unit comprises an LTC2704 and a current source module; the LTC2704 is used for converting the digital signal of the logic processing unit into an analog signal; the current source module comprises an IXTN170P10P used for converting the analog signal into a +/-30A current signal;
the communication unit comprises an Ethernet communication module used for connecting an external computer and the merging unit through Ethernet.
2. The merging unit tester based on the time service system as claimed in claim 1, wherein the voltage source output unit is provided with a short-circuit protection interface.
3. The merging unit tester based on the time service system as claimed in claim 1, wherein the current source output unit is provided with an open circuit protection interface and an overload protection interface.
4. The merging unit tester based on the time service system as claimed in claim 1, wherein the time service unit is connected with the central processing unit via a serial port.
5. The merging unit tester of claim 1, wherein the connection between the ethernet communication unit and the central processing unit is an MII interface.
6. The merging unit tester based on the time service system as claimed in claim 1, wherein an SPI bus is adopted for connection between the central processing unit and the voltage source output unit.
7. The merging unit tester based on the time service system as claimed in claim 1, wherein the central processing unit and the current source output unit are connected by an SPI bus.
8. The merging unit tester based on the time service system as claimed in claim 1, wherein the connection between the central processing unit and the communication unit is via an MII bus.
9. The merging unit tester of claim 1, wherein the central processing unit and the time service unit are connected by a parallel bus.
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| CN202222588273.5U CN218124704U (en) | 2022-09-27 | 2022-09-27 | Merging unit tester based on time service system |
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| CN202222588273.5U CN218124704U (en) | 2022-09-27 | 2022-09-27 | Merging unit tester based on time service system |
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