CN218022974U - Storage device for integrated circuit chip transportation - Google Patents

Storage device for integrated circuit chip transportation Download PDF

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Publication number
CN218022974U
CN218022974U CN202222064589.4U CN202222064589U CN218022974U CN 218022974 U CN218022974 U CN 218022974U CN 202222064589 U CN202222064589 U CN 202222064589U CN 218022974 U CN218022974 U CN 218022974U
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China
Prior art keywords
placing
half box
integrated circuit
box
circuit chip
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CN202222064589.4U
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Chinese (zh)
Inventor
蒋惠良
李甲
李强
祝周宇
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Xuzhou Kaslaite Intelligent Control Research Institute Co ltd
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Xuzhou Kaslaite Intelligent Control Research Institute Co ltd
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Abstract

The utility model relates to a storage device for transporting integrated circuit chips, which comprises a placing box, wherein the placing box comprises a lower half box and an upper half box, the lower half box is hinged with one side of the upper half box, the lower half box and the upper half box can be rotatably spliced and opened, and a locking component for locking and fixing the lower half box and the upper half box is arranged between the upper half box and the lower half box; the bottom surface array in the lower half box is provided with a plurality of placing stations, each placing station comprises a placing groove and an accommodating groove, each placing groove is used for placing a packaging shell of the integrated circuit chip, each accommodating groove is arranged around the corresponding placing groove, and each accommodating groove is used for accommodating pins of the integrated circuit chip; the interior top surface of first case is provided with a plurality of compact heap, and the quantity of compact heap is the same with the quantity of placing the station, and a plurality of compact heaps and a plurality of station one-to-one setting of placing, when first case and second case amalgamation, the compact heap is located the holding tank and leaves the interval directly over and between the two. The utility model has the advantages of can avoid integrated circuit chip to collide with the damage at the pin on the way of the transportation.

Description

Storage device for integrated circuit chip transportation
Technical Field
The utility model relates to an integrated circuit chip technical field, concretely relates to strorage device of integrated circuit chip transportation usefulness.
Background
An integrated circuit chip is a miniature electronic device or component. The elements such as transistor, resistor, capacitor and inductance and wiring required in a circuit are interconnected together by adopting a certain process, manufactured on a small piece or a plurality of small pieces of semiconductor wafers or medium substrates, and then packaged in a shell to form a micro-structure with the required circuit function; all the elements are structurally integrated, so that the electronic elements are greatly miniaturized, low in power consumption, intelligent and high in reliability. The semiconductor industry today is mostly using silicon-based integrated circuits.
Referring to fig. 1-2, an integrated circuit chip in the prior art includes a chip body, a package housing 1 and pins 2, the chip body is packaged in the package housing 1, the pins 2 are inserted into the package housing 1, and one end of each pin is electrically connected to the chip body, wherein the package housing 1 plays a role in placing, fixing and protecting the chip body. At present, the integrated circuit chip has a problem in the transportation process: because a part of the pin 2 is exposed outside the package housing 1, and the transportation tool is difficult to avoid bumping during transportation, the integrated circuit chip can also follow vibration, and the pin 2 is easy to be skewed or broken with other objects, so that the integrated circuit chip can not be normally used.
SUMMERY OF THE UTILITY MODEL
Technical problem to be solved
Not enough to prior art, the utility model provides a strorage device of integrated circuit chip transportation usefulness to the integrated circuit chip who solves among the prior art in the transportation problem that the pin collided with the damage easily.
(II) technical scheme
In order to achieve the above purpose, the technical scheme of the utility model is as follows:
a storage device for transporting integrated circuit chips comprises a storage box, wherein the storage box comprises a lower half box and an upper half box, the lower half box is hinged to one side of the upper half box, the lower half box and the upper half box can be spliced and opened in a rotating mode, and a locking assembly for locking and fixing the upper half box and the lower half box is arranged between the upper half box and the lower half box;
the inner bottom surface array of the lower half box is provided with a plurality of placing stations, each placing station comprises a placing groove and a containing groove, each placing groove is used for placing a packaging shell of the integrated circuit chip, each containing groove is arranged around the corresponding placing groove, and each containing groove is used for containing pins of the integrated circuit chip; the interior top surface of first case is provided with a plurality of compact heap, the quantity of compact heap is the same with the quantity of placing the station, and is a plurality of compact heap and a plurality of station one-to-one setting of placing, work as when first case and second case amalgamation, the compact heap is located the holding tank directly over and leaves the interval between the two.
Further, the inner wall of the placing groove is attached to the packaging shell of the integrated circuit chip, and all the inner walls of the containing groove are not in contact with pins of the integrated circuit chip.
Furthermore, the surface of the compressing block, which deviates from the top surface in the upper half box, is provided with a protective layer, and the protective layer is an elastic material layer.
Furthermore, locking Assembly includes lock ring and check lock lever, the lock ring is the elasticity circle, a little fixed connection of lock ring is in the lower half case keep away from with the vertical lateral wall of first half case pin joint, the lock lever level sets up in the upper half case keep away from with the vertical lateral wall of lower half case pin joint, the lock ring cover is established on the check lock lever and is in the state of tightening.
Furthermore, an anti-slip groove is formed in the side wall of the locking rod in a surrounding mode, anti-slip lines are arranged on the inner wall of the anti-slip groove, and the part, in contact with the locking rod, of the locking ring is located in the anti-slip groove.
(III) advantageous technical effects
To sum up, the utility model discloses a following beneficial technological effect:
1. when transporting the integrated circuit chip, place the chip on placing the station, the encapsulation shell of the chip is located in the holding tank, the pin of the chip is located in the holding tank, then put together the first half case and the second half case, and lock the first half case and the second half case fixedly through the locking assembly, the compact heap that is located in the first half case can contact with the encapsulation shell of the chip at this moment, and slightly press the encapsulation shell in the holding tank, therefore the compact heap can limit the chip to take place the movement in the vertical direction, and the holding tank can limit the chip to take place the movement in the horizontal direction, so the compact heap cooperates with the holding tank and can lock the position of the chip fixedly, thus avoid the chip and other objects from colliding and damaging the pin in the course of transporting, in conclusion, the utility model has the advantages of avoiding the integrated circuit chip from causing the pin to damage in the course of transporting by accident;
2. because the inner walls of the placing grooves are attached to the packaging shell of the integrated circuit chip, the placing grooves can limit the chip to move in the horizontal direction; because all inner walls of the containing groove are not contacted with the pins of the integrated circuit chip, the pins and the inner walls of the containing groove can be prevented from being accidentally collided in the chip transportation process, and the effect of protecting the pins is improved;
3. because the surface of the pressing block, which is deviated from the inner top surface of the upper half box, is provided with the protective layer, and the protective layer is an elastic material layer, the effect of protecting the packaging shell of the chip can be achieved, and the packaging shell is prevented from being abraded;
4. the locking assembly comprises a locking ring and a locking rod, the locking ring is an elastic ring, one point of the locking ring is fixedly connected to the vertical outer side wall of the lower half box far away from the hinge joint with the upper half box, the locking rod is horizontally arranged on the vertical outer side wall of the upper half box far away from the hinge joint with the lower half box, and the locking ring is sleeved on the locking rod and is in a tightening state; therefore, when the locking ring is sleeved on the locking rod, the upper half box and the lower half box can be locked and fixed, and when the locking ring is taken down from the locking rod, the upper half box and the lower half box can be rotated and opened, so that the operation is simple and convenient;
5. because the side wall of the locking rod is provided with the anti-skidding grooves in an encircling manner, the inner walls of the anti-skidding grooves are provided with the anti-skidding lines, and the part of the locking ring, which is in contact with the locking rod, is positioned in the anti-skidding grooves, through the arrangement, the locking ring can be prevented from accidentally sliding after being sleeved on the locking rod, so that the stability and the reliability of the locking assembly are improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following descriptions are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a front view of an integrated circuit chip of the prior art;
FIG. 2 is a top view of an integrated circuit chip according to the prior art;
FIG. 3 is a schematic diagram illustrating an internal structure of a storage device for transporting IC chips according to an embodiment;
FIG. 4 is an enlarged view of portion A of FIG. 3;
FIG. 5 is a partial vertical sectional view of the storage device for transporting integrated circuit chips in accordance with one embodiment of the present invention, when the storage device is mounted on a chip;
FIG. 6 is a schematic diagram illustrating an overall structure of a storage device for transporting IC chips according to an embodiment.
Description of the reference numerals:
in the figure, 1, a package housing; 2. a pin; 3. placing a box; 31. an upper half box; 32. a lower half box; 4. a locking assembly; 41. a locking ring; 42. a locking lever; 5. placing a station; 51. a placement groove; 52. accommodating grooves; 6. a compression block; 7. a protective layer; 8. and (4) an anti-slip groove.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making any creative effort shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the application described herein may be used. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In this application, the terms "upper", "lower", "left", "right", "front", "rear", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. These terms are used primarily to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation.
Moreover, some of the above terms may be used to indicate other meanings besides the orientation or positional relationship, for example, the term "on" may also be used to indicate some kind of attachment or connection relationship in some cases. The specific meaning of these terms in this application will be understood by those of ordinary skill in the art as appropriate.
In addition, the term "plurality" shall mean two as well as more than two.
It should be noted that, in the present application, the embodiments and features of the embodiments may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
Example (b):
referring to fig. 1-5, for the utility model discloses a strorage device of integrated circuit chip transportation usefulness, including the case 3 of placing of cuboid form, place case 3 and include second half case 32 and first half case 31, second half case 32 passes through the hinge with first half case 31 one side and articulates, second half case 32 and first half case 31 can rotate the amalgamation and open, be provided with between first half case 31 and the second half case 32 to be used for locking the fixed locking Assembly 4 of the two.
Locking Assembly 4 includes check ring 41 and check ring 42, and check ring 41 is the elastic rubber circle, and one point fixed connection of check ring 41 keeps away from the vertical lateral wall with first half case 31 pin joint in second half case 32, and check ring 42 level sets up and keeps away from the vertical lateral wall with second half case 32 pin joint in first half case 31, and check ring 41 cover is established on check ring 42 and is in the state of tightening.
Through the arrangement, the locking fixation of the upper half box 31 and the lower half box 32 can be realized when the locking ring 41 is sleeved on the locking rod 42, and when the locking ring 41 is taken down from the locking rod 42, the upper half box 31 and the lower half box 32 can be rotated and opened, so that the operation is simple and convenient.
In addition, in order to prevent the locking ring 41 sleeved on the locking rod 42 from accidentally sliding, the side wall of the locking rod 42 is provided with an anti-slip groove 8 in a surrounding manner, the inner wall of the anti-slip groove 8 is provided with anti-slip threads, and the contact part of the locking ring 41 and the locking rod 42 is positioned in the protective groove. Through the above arrangement, the stability and reliability of the locking assembly 4 can be further improved.
Further, the inner bottom surface array of the lower half box 32 is provided with a plurality of placing stations 5, and the placing stations 5 comprise placing grooves 51 and containing grooves 52. The placing groove 51 is used for placing the package housing 1 of the integrated circuit chip, the accommodating groove 52 is arranged around the placing groove 51, and the accommodating groove 52 is used for accommodating the pin 2 of the integrated circuit chip. The interior top surface of first case 31 is provided with a plurality of compact heap 6, and the quantity of compact heap 6 is the same with the quantity of placing station 5, and a plurality of compact heap 6 and a plurality of station 5 one-to-one setting of placing, when first case 31 and second case 32 amalgamation, compact heap 6 is located holding tank 52 directly over and leaves the interval between the two.
Through the aforesaid setting, during the transportation integrated circuit chip, place the chip on placing station 5, the encapsulation shell 1 of chip is located standing groove 51, the pin 2 of chip is located holding tank 52, then with first case 31 and second case 32 amalgamation, and it is fixed with first case 31 and second case 32 locking through locking Assembly 4, the compact heap 6 that is located first case 31 this moment can contact with the encapsulation shell 1 of chip, and gently press encapsulation shell 1 in standing groove 51, consequently, compact heap 6 can restrict the chip and take place the ascending removal of vertical side, and standing groove 51 can restrict the chip and take place the ascending removal of horizontal direction, so compact heap 6 cooperation standing groove 51 can be fixed with the position locking of chip, thereby avoid transporting the chip and bumping and damaging pin 2 with other objects on the way.
In addition, the inner walls of the placing grooves 51 are all attached to the package housing 1 of the integrated circuit chip, so that the placing grooves 51 can limit the movement of the chip in the horizontal direction; all inner walls of the accommodating groove 52 are not in contact with the pins 2 of the integrated circuit chip, so that the pins 2 and the inner walls of the accommodating groove 52 can be prevented from being accidentally collided in the chip transportation process, and the effect of improving the protection effect on the pins 2 is achieved.
Further, in order to avoid wearing and tearing between compact heap 6 and the encapsulation shell 1, the surface that compact heap 6 deviates from the internal top surface of first case 31 is provided with protective layer 7, and protective layer 7 is elastic material layer (for example, rubber layer), and through the setting, when first case 31 and second case 32 amalgamation, compact heap 6 can compress tightly protective layer 7 on the encapsulation shell 1 of chip to play the effect of protection encapsulation shell 1.
The working principle of the embodiment is as follows: when the integrated circuit chip is transported, the chip is placed on the placing station 5, the packaging shell 1 of the chip is positioned in the placing groove 51, the pins 2 of the chip are positioned in the containing grooves 52, then the upper half box 31 and the lower half box 32 are spliced, and the upper half box 31 and the lower half box 32 are locked and fixed through the locking assembly 4, at the moment, the pressing block 6 positioned in the upper half box 31 can be in contact with the packaging shell 1 of the chip, and the packaging shell 1 is lightly pressed in the placing groove 51, so that the pressing block 6 can limit the chip to move in the vertical direction, the placing groove 51 can limit the chip to move in the horizontal direction, the pressing block 6 is matched with the placing groove 51 to lock and fix the position of the chip, and the chip is prevented from colliding with other objects in the transportation process to damage the pins 2; in summary, the storage device provided in this embodiment has the advantage of preventing the integrated circuit chip from accidentally colliding during transportation to cause the damage to the pins 2
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications can be made without departing from the scope of the invention.

Claims (5)

1. A storage device for transporting integrated circuit chips, comprising: the device comprises a placing box (3), wherein the placing box (3) comprises a lower half box (32) and an upper half box (31), the lower half box (32) is hinged with one side of the upper half box (31), the lower half box (32) and the upper half box (31) can be rotatably spliced and opened, and a locking assembly (4) for locking and fixing the upper half box (31) and the lower half box (32) is arranged between the upper half box (31) and the lower half box (32);
the interior bottom surface array of half case (32) down is provided with a plurality of stations (5) of placing, place station (5) including standing groove (51) and holding tank (52), standing groove (51) are used for placing integrated circuit chip's encapsulation shell (1), holding tank (52) encircle standing groove (51) and set up, holding tank (52) are used for holding integrated circuit chip's pin (2): the interior top surface of first half case (31) is provided with a plurality of compact heap (6), the quantity of compact heap (6) is the same with the quantity of placing station (5), and is a plurality of compact heap (6) and a plurality of station (5) one-to-one setting of placing work, work as when first half case (31) and second half case (32) amalgamate, compact heap (6) are located holding tank (52) directly over and leave the interval between the two.
2. A storage device for transporting ic chips as claimed in claim 1, wherein: the inner wall of the placing groove (51) is attached to a packaging shell (1) of the integrated circuit chip, and all the inner walls of the containing groove (52) are not in contact with pins (2) of the integrated circuit chip.
3. A storage device for transporting ic chips as claimed in claim 2, wherein: the surface that compact heap (6) deviate from top surface in first half case (31) is provided with protective layer (7), protective layer (7) are elastic material layer.
4. A storage device for transporting ic chips as claimed in claim 1, wherein: locking Assembly (4) include check ring (41) and check lock lever (42), check ring (41) are the elastic ring, one point fixed connection of check ring (41) keeps away from the vertical lateral wall with first semi-tank (31) pin joint in second semi-tank (32), check lock lever (42) level sets up last semi-tank (31) keep away from with the vertical lateral wall of second semi-tank (32) pin joint, check lock ring (41) cover is established and is in on check lock lever (42) and in the state of tightening.
5. The storage device of claim 4, wherein: the anti-skidding type locking device is characterized in that anti-skidding grooves (8) are arranged on the side walls of the locking rods (42) in a surrounding mode, anti-skidding threads are arranged on the inner walls of the anti-skidding grooves (8), and the parts, in contact with the locking rods (42), of the locking rings (41) are located in the anti-skidding grooves (8).
CN202222064589.4U 2022-08-05 2022-08-05 Storage device for integrated circuit chip transportation Active CN218022974U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202222064589.4U CN218022974U (en) 2022-08-05 2022-08-05 Storage device for integrated circuit chip transportation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202222064589.4U CN218022974U (en) 2022-08-05 2022-08-05 Storage device for integrated circuit chip transportation

Publications (1)

Publication Number Publication Date
CN218022974U true CN218022974U (en) 2022-12-13

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

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Assignee: XUZHOU XINFA MACHINERY Co.,Ltd.

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

Contract record no.: X2023980051101

Denomination of utility model: A storage device for transportation of integrated circuit chips

Granted publication date: 20221213

License type: Common License

Record date: 20231209

Assignee: Xuzhou Zhenwu Machinery Factory

Assignor: Xuzhou Kaslaite Intelligent Control Research Institute Co.,Ltd.

Contract record no.: X2023980051089

Denomination of utility model: A storage device for transportation of integrated circuit chips

Granted publication date: 20221213

License type: Common License

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Assignee: XUZHOU ZHONGXIN MACHINERY TECHNOLOGY Co.,Ltd.

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Denomination of utility model: A storage device for transportation of integrated circuit chips

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