CN217902701U - Binding voltage generation circuit, display panel and display device - Google Patents

Binding voltage generation circuit, display panel and display device Download PDF

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CN217902701U
CN217902701U CN202221978180.7U CN202221978180U CN217902701U CN 217902701 U CN217902701 U CN 217902701U CN 202221978180 U CN202221978180 U CN 202221978180U CN 217902701 U CN217902701 U CN 217902701U
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circuit
binding
voltage
output
tie
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王赟
李冠群
樊涛
袁海江
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HKC Co Ltd
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HKC Co Ltd
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Abstract

The application discloses tie point voltage generation circuit, display panel and display device, wherein, tie point voltage generation circuit includes: the source electrode driving circuit comprises a binding voltage generating circuit and a binding voltage switching circuit, wherein a controlled end of the binding voltage switching circuit is used for accessing a first switching signal or a second switching signal, a plurality of first output ends of the binding voltage generating circuit are used for outputting a plurality of paths of binding voltages to a source electrode driving integrated circuit, and a second input end of the binding voltage generating circuit is used for outputting one path of binding voltage to the binding voltage switching circuit; the tie point voltage switching circuit is used for outputting the accessed tie point voltage to the source electrode driving integrated circuit from the first output end after receiving the first switching signal; and outputting the accessed tie point voltage to the source electrode driving integrated circuit from the second output end after receiving the second switching signal. The technical scheme can save the debugging time of the binding voltage.

Description

Binding voltage generation circuit, display panel and display device
Technical Field
The application relates to the technical field of display, in particular to a binding voltage generating circuit, a display panel and a display device.
Background
At present, in the mass production of the display panel, the binding voltage needs to be adjusted on the display panel, however, the existing adjustment process of the binding voltage needs to consume a lot of time, which is not beneficial to the mass production of the display panel.
SUMMERY OF THE UTILITY MODEL
The main objective of this application is to provide a tie point voltage generation circuit, aims at solving the inconvenient problem of tie point voltage adjustment.
For realizing above-mentioned purpose, the tie voltage generation circuit that this application provided for display panel, display panel includes source drive integrated circuit, source drive integrated circuit is used for binding the corresponding grey scale with the multichannel tie voltage of access to be used for to bind multichannel tie voltage conversion behind the corresponding grey scale and be multichannel grey scale voltage output, its characterized in that, tie voltage generation circuit includes:
a plurality of first output ends of the tie voltage generating circuit are respectively connected with one input end of the source electrode driving integrated circuit; and (c) a second step of,
the input end of the binding voltage switching circuit is connected with the second output end of the binding voltage generating circuit, the controlled end of the binding voltage switching circuit is used for accessing a first switching signal or a second switching signal, and the first output end and the second output end of the binding voltage switching circuit are respectively connected with one input end of the source electrode driving integrated circuit;
a plurality of first output ends of the binding voltage generating circuit are used for outputting a plurality of paths of binding voltages to the source electrode driving integrated circuit, and a second input end of the binding voltage generating circuit is used for outputting a path of binding voltages to the binding voltage switching circuit;
the binding point voltage switching circuit is used for outputting the accessed binding point voltage to the source electrode driving integrated circuit from a first output end after receiving the first switching signal; and outputting the accessed binding point voltage to the source electrode driving integrated circuit from a second output end after receiving the second switching signal.
Optionally, the binding voltage switching circuit includes:
the controlled end of the switch circuit is used for being connected with the first switching signal or the second switching signal, the input end of the switch circuit is connected with the second input end of the binding voltage generating circuit, and the first output end and the second output end of the switch circuit are respectively connected with one input end of the source electrode driving integrated circuit through one path of first resistor circuit.
Optionally, the switching circuit comprises a first switching circuit and a second switching circuit;
the controlled end of the first switch circuit and the controlled end of the second switch circuit are used for accessing the first switching signal or the second switching signal, the input end of the first switch circuit and the input end of the second switch circuit are connected with the second input end of the binding voltage generating circuit, and the output end of the first switch circuit and the output end of the second switch circuit are respectively connected with one input end of the source electrode driving integrated circuit through one path of first resistor circuit;
when the controlled end of the binding point voltage switching circuit receives the first switching signal or the second switching signal, one of the first switching circuit and the second switching circuit is turned on, and the other is turned off.
Optionally, the tie voltage generating circuit has a plurality of second output terminals;
the number of the binding voltage switching circuits corresponds to the number of the second output ends of the binding voltage generating circuits, the input end of each binding voltage switching circuit is connected with one second output end of the binding voltage generating circuit, the controlled end of each binding voltage switching circuit is used for accessing one path of first switching signal or one path of second switching signal, and the first output end and the second output end of each binding voltage switching circuit are respectively connected with one input end of the source electrode driving integrated circuit;
each binding point voltage switching circuit is used for outputting the accessed binding point voltage to the corresponding input end of the source electrode driving integrated circuit from a first output end after receiving the first switching signal; and outputting the accessed binding point voltage to the corresponding input end of the source electrode driving integrated circuit from a second output end after receiving the second switching signal.
Optionally, the binding voltage generating circuit includes:
and each first output end of the gamma integrated circuit is connected with one input end of the source electrode driving integrated circuit through one path of second resistor circuit, and each second output end of the gamma integrated circuit is connected with one path of input end of the binding voltage switching circuit.
Optionally, the number of the first output terminals of the gamma integrated circuit is 10, and the number of the second output terminals of the gamma integrated circuit is 4.
Optionally, the gamma integrated circuit has 14 output terminals, which are respectively a first output terminal, a second output terminal, a third output terminal, a fourth output terminal, a fifth output terminal, a sixth output terminal, a seventh output terminal, an eighth output terminal, a ninth output terminal, a tenth output terminal, an eleventh output terminal, a twelfth output terminal, a thirteenth output terminal and a fourteenth output terminal, and the voltage values of the binding point voltages output by the 14 output terminals of the gamma integrated circuit gradually decrease;
the 10 first input ends of the gamma integrated circuit are respectively a first output end, a second output end, a fourth output end, a sixth output end, a seventh output end, an eighth output end, a ninth output end, an eleventh output end, a thirteenth output end and a fourteenth output end of the gamma integrated circuit;
the 4 second output ends of the gamma integrated circuit are respectively a third output end, a fifth output end, a tenth output end and a twelfth output end of the gamma integrated circuit.
The present application further proposes a display panel, which includes:
the source electrode driving integrated circuit is used for binding the accessed multi-channel binding voltage with the corresponding gray scale and converting the multi-channel binding voltage after the corresponding gray scale is bound into multi-channel gray scale voltage for output; and the number of the first and second groups,
as described above, the tie voltage generation circuit is connected to the plurality of input terminals of the source driver integrated circuit.
Optionally, the display panel further comprises:
and the time sequence controller is connected with the binding point voltage generating circuit and is used for outputting a first switching signal or a second switching signal to the binding point voltage generating circuit.
The application also provides a display device which comprises the display panel.
This application technical scheme is through adopting tie voltage to produce circuit and tie voltage switching circuit to make a plurality of first output exports multichannel tie voltage to source drive integrated circuit of tie voltage production circuit, and tie voltage production circuit's second input exports tie voltage to tie voltage switching circuit all the way, so that tie voltage switching circuit can be according to received first switching signal or second switching signal, it is exported to source drive integrated circuit by first output or second output to correspond the tie voltage that will insert. According to the technical scheme, the gray scales bound by the multi-channel binding voltage accessed by the source electrode driving integrated circuit can have two different gray scale combinations, so that the gray scales bound by the binding voltage in the source electrode driving integrated circuit can be switched in the two gray scale combinations by controlling the first switching signal or the second switching signal accessed by the binding voltage switching circuit, and the two gray scale combinations can be adjusted by adjusting the positions of the second output end of the binding voltage switching circuit in all the output ends of the binding voltage switching circuit. The binding positions of the pins of the source electrode driving integrated circuit and the binding voltage generating circuit and the wiring mode of the circuit board where the source electrode driving integrated circuit and the binding voltage generating circuit are located do not need to be changed, so that the time consumed in the debugging process is saved, and the problem that the binding voltage is not changed in debugging is solved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a block diagram of a tie-point voltage generation circuit according to an embodiment of the present disclosure;
FIG. 2 is a block diagram of a switch module in a tie-point voltage generation circuit according to an embodiment of the present disclosure;
fig. 3 is a circuit diagram of a tie voltage generating circuit according to an embodiment of the disclosure.
The reference numbers illustrate:
Figure BDA0003770542660000041
Figure BDA0003770542660000051
the implementation, functional features and advantages of the object of the present application will be further explained with reference to the embodiments, and with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In addition, descriptions in this application as to "first", "second", etc. are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit to the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the feature. In addition, technical solutions between the embodiments may be combined with each other, but must be based on the realization of the technical solutions by a person skilled in the art, and when the technical solutions are contradictory to each other or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope claimed in the present application.
The first embodiment is as follows:
the application provides a tie voltage generating circuit for a liquid crystal display panel.
At present, the color of the dark field gray scale is obviously improved by performing gamma correction on the display panel, the color error of each gray scale is obviously reduced, the dark field color is clear in detail, the image lighting value is consistent in color, the transparent lighting value is good, and the contrast is obvious. The display panel may include a source driver ic, and the source driver ic (also called a source driver) may bind the accessed multiple binding voltages with corresponding gray scales, and convert the multiple binding voltages with the corresponding gray scales into multiple corresponding gray scale voltages through an internal integrated resistor voltage divider network for output. The prior art realizes gamma correction of a display panel by adjusting multiple gray scale voltages output by a source driver integrated circuit, but in practical production, for example: subsequent changes to the optical application of the display panel, etc., require adjustments to the tie voltage. When the situation occurs, the source driver integrated circuit needs to be adjusted to access a new binding voltage and rebind the gray scale, but because the electrical connection between the source driver integrated circuit and the binding voltage generating circuit is already selected, the adjusting process needs to change the stitch binding position between the source driver integrated circuit and the binding voltage generating circuit, and also needs to change the wiring mode of a circuit board where the source driver integrated circuit and the binding voltage generating circuit are located. This undoubtedly makes the debugging process of the binding voltage to be time-consuming, which is not favorable for mass production of display panels.
To solve the above problem, referring to fig. 1, in a first embodiment, the tie voltage generating circuit includes:
a plurality of first output ends of the tie point voltage generating circuit 10 are respectively connected with an input end of the source Driver-IC; and (c) a second step of,
the input end of the tie point voltage switching circuit 20 is connected with the second output end of the tie point voltage generating circuit 10, the controlled end of the tie point voltage switching circuit 20 is used for accessing a first switching signal S1 or a second switching signal S2, and the first output end and the second output end of the tie point voltage switching circuit 20 are respectively connected with one input end of the source Driver-IC;
a plurality of first output terminals of the tie voltage generating circuit 10 are configured to output a plurality of tie voltages to the source Driver-IC, and a second input terminal of the tie voltage generating circuit 10 is configured to output a tie voltage to the tie voltage switching circuit 20;
the tie-point voltage switching circuit 20 is configured to output a tie-point voltage received from a first output terminal to the source Driver-IC when receiving the first switching signal S1; and outputting the accessed binding point voltage to the source Driver-IC from a second output end after receiving the second switching signal S2.
The tie voltage generating circuit 10 may be integrated with the first resistor network. In this embodiment, the tie voltage generating circuit 10 may have one input terminal, a plurality of first output terminals, and one second output terminal connected to the first resistance network, respectively; the input end is used for accessing a power supply voltage AVdd output by the power management integrated circuit and outputting the power supply voltage AVdd to the first resistance network so as to divide the voltage by the first resistance network to obtain N +1 binding point voltages, N paths in the N +1 binding point voltages can be respectively output by a plurality of output ends, and the rest binding point voltages can be output by the second output end. In other words, N is the number of the first output terminals and is a positive integer. It should be noted that, the plurality of first output terminals and the second output terminal form N +1 output terminals of the binding voltage generating circuit 10, the voltage value of the binding voltage output by each output terminal gradually decreases from the first output terminal to the N +1 th output terminal of the N +1 output terminals, and the specific position of the second output terminal in the N +1 output terminals can be determined according to actual needs, which is not limited herein.
The tie voltage switching circuit 20 may be implemented by being constructed of a plurality of switching devices. The controlled end of the binding voltage switching circuit 20 may be connected to the timing controller or the dedicated control device to access the first switching signal S1 or the second switching signal S2 output by the timing controller or the dedicated control device; the dedicated control device may be a microprocessor such as an MCU, a DSP, or an FPGA, or may also be a main control chip, which is not limited herein. The tie point voltage switching circuit 20 may control the corresponding switching device to be turned on or off to form an electrical path between the input terminal and the first output terminal or the second output terminal when receiving the first switching signal S1 or the second switching signal S2, so as to access the tie point voltage output by the second output terminal of the tie point voltage generating circuit 10, and output the tie point voltage to the source Driver-IC from the first output terminal or the second output terminal.
It should be noted that the source Driver IC Driver-IC can bind the binding voltage connected to each input terminal to the corresponding gray scale, and the binding voltage switching circuit 20 can output the binding voltage to any one of the two input terminals of the source Driver IC Driver-IC, so that the gray scales bound by the multiple binding voltages connected to the source Driver IC Driver-IC can have two different gray scale combinations. Therefore, in the technical scheme of the application, the gray scales bound by the binding voltages in the source Driver-IC can be switched between the two gray scale combinations by controlling the first switching signal S1 or the second switching signal S2 accessed by the binding voltage switching circuit 20, and the two gray scale combinations can be adjusted by adjusting the position of the second output end of the binding voltage switching circuit 20 in all the output ends of the second output end. The binding positions of pins of the source Driver-IC and the binding voltage generation circuit and the wiring mode of the circuit board where the source Driver-IC and the binding voltage generation circuit are located do not need to be changed, so that the time consumed in the debugging process is saved, and the problem that the binding voltage is not changed in debugging is solved.
Referring to fig. 2, in the first embodiment, the tie-point voltage switching circuit 20 includes:
the switch circuit 21, the controlled end of switch circuit 21 is used for inserting first switching signal S1 or second switching signal S2, switch circuit 21 ' S input with the second input of tie point voltage generation circuit 10 is connected, switch circuit 21 ' S first output and second output respectively through the first resistance circuit 30 of a way with a source drive integrated circuit Driver-IC ' S an input is connected.
The switch circuit 21 may control the corresponding switch device in itself to be turned on or off to correspondingly form an electrical path between the input terminal and the first output terminal or the second output terminal when receiving the first switching signal S1 or the second switching signal S2, so as to access the tie point voltage output by the second output terminal of the tie point voltage generating circuit 10, and output the tie point voltage to the source Driver-IC through the corresponding first resistor circuit 30 from the first output terminal or the second output terminal. The first resistor circuit 30 may include at least one resistor R connected in series between the bonding voltage processing circuit and the source Driver IC, and the first resistor circuit 30 may effectively prevent the source Driver IC from being damaged by a short-circuit large current.
Alternatively, the switch circuit 21 includes a first switch circuit 21A and a second switch circuit 21B;
the controlled end of the first switch circuit 21A and the controlled end of the second switch circuit 21B are used for accessing the first switching signal S1 or the second switching signal S2, the input end of the first switch circuit 21A and the input end of the second switch circuit 21B are connected with the second input end of the tie point voltage generating circuit 10, and the output end of the first switch circuit 21A and the output end of the second switch circuit 21B are respectively connected with one input end of the source Driver-IC through one path of the first resistor circuit 30;
when the controlled terminal of the tie-point voltage switching circuit 20 receives the first switching signal S1 or the second switching signal S2, one of the first switch circuit 21A and the second switch circuit 21B is turned on, and the other is turned off.
When the binding voltage switching circuit 20 receives the first switching signal S1, the first switch circuit 21A is turned on, the second switch circuit 21B is turned off, and the first switch circuit 21A accesses the binding voltage output from the second output terminal of the binding voltage generating circuit 10 and outputs the binding voltage; when the second switching signal S2 is received by the binding voltage switching circuit 20, the first switch circuit 21A is turned off, the second switch circuit 21B is turned on, and the second switch circuit 21B accesses the binding voltage output from the second output terminal of the binding voltage generating circuit 10 and outputs the binding voltage. In the present embodiment, one of the first switching signal S1 and the second switching signal S2 may be a high level signal, and the other may be a low level signal. In the embodiment shown in fig. 2, the first switch circuit 21A includes an N-type thin film transistor N1, and the second switch circuit 21B includes a P-type thin film transistor P1, i.e. when the first switching signal S1 is a high level signal, the second switching signal S2 is a low level signal.
Referring to fig. 3, in the first embodiment, the tie voltage generating circuit 10 has a plurality of second output terminals;
the number of the tie point voltage switching circuits 20 corresponds to the number of the second output ends of the tie point voltage generating circuits 10, the input end of each tie point voltage switching circuit 20 is connected with one second output end of the tie point voltage generating circuit 10, the controlled end of each tie point voltage switching circuit 20 is used for accessing one path of first switching signal S1 or one path of second switching signal S2, and the first output end and the second output end of each tie point voltage switching circuit 20 are respectively connected with one input end of the source Driver-IC;
each of the tie-point voltage switching circuits 20 is configured to output a tie-point voltage received from a first output terminal to a corresponding input terminal of the source Driver-IC upon receiving the first switching signal S1; and outputting the accessed binding point voltage to the corresponding input end of the source electrode driving integrated circuit Driver-IC from a second output end after receiving the second switching signal S2.
In this embodiment, the tie voltage generating circuit 10 may have an input terminal, a plurality of first output terminals and a plurality of second output terminals, where N first output terminals and M second output terminals constitute N + M output terminals of the tie voltage generating circuit 10, M is the number of the second output terminals, and M is not less than 2. The binding voltage generating circuit 10 may convert the accessed reference voltage into N + M binding voltages through the first resistor network, and output the N + M binding voltages through the plurality of first output terminals and the plurality of second output terminals, respectively. It should be noted that, the voltage value of the binding voltage output by each output terminal of the N + M output terminals decreases gradually from the first output terminal to the N + M output terminals, and the specific position of the second output terminal in the binding voltage generating circuit 10n + M output terminals may be determined according to actual needs, which is not limited herein.
Each tie voltage switching circuit 20 is capable of controlling a corresponding switching device to be turned on or off to form an electrical path between its input terminal and the first output terminal or the second output terminal when receiving the first switching signal S1 or the second switching signal S2, so as to access the tie voltage output by the corresponding second output terminal of the plurality of second output terminals of the tie voltage generating circuit 10 and output the tie voltage to the corresponding input terminal of the source Driver-IC from the first output terminal or the second output terminal.
Thus, the multi-path tie voltage switching circuit 20 can respectively output the tie voltage to any one of the two input terminals of the source Driver-IC, and the gray scales bound by the multi-path tie voltage accessed by the source Driver-IC can have various gray scale combinations. Therefore, in the technical scheme of the application, the gray scales bound by the binding voltages in the source Driver-IC can be switched among various gray scale combinations by controlling the first switching signal S1 or the second switching signal S2 accessed by each binding voltage switching circuit 20, and the various gray scale combinations can be adjusted by adjusting the positions of the second output ends of the binding voltage switching circuit 20 in all the output ends thereof, so that the flexibility and the comprehensiveness of the binding voltage adjustment are improved, and the time consumed in the debugging process is further saved.
Optionally, the binding voltage generating circuit 10 includes:
each first output end of the gamma integrated circuit Gmma-IC is connected with one input end of the source electrode driving integrated circuit Driver-IC through one path of second resistor circuit 40, and each second output end of the gamma integrated circuit Gmma-IC is connected with one input end of the binding point voltage switching circuit 20.
In this embodiment, the first resistor network may be integrated in the gamma integrated circuit Gmma-IC, and the gamma integrated circuit Gmma-IC may convert the connected supply voltage AVdd into the M + N tie point voltage with gradually decreasing voltage value by using the integrated first resistor network, and output the tie point voltage to the source Driver-IC through the second resistor circuit 40 or the tie point voltage switching circuit 20. At this time, the second resistor circuit 40 may include at least one resistor R connected in series between the gamma IC Gmma-IC and the source Driver-IC, and the second resistor circuit 40 may effectively prevent the source Driver-IC from being damaged by a short-circuit large current. In addition, the gamma integrated circuit Gmma-IC can effectively reduce the circuit board area occupied by the binding voltage generating circuit 10.
Optionally, the number of the first output terminals of the gamma integrated circuits Gmma-IC is 10, and the number of the second output terminals of the gamma integrated circuits Gmma-IC is 4.
In this embodiment, when the number of the first output terminals of the gamma integrated circuit Gmma-IC is 10 and the number of the second output terminals is 4, the number of the output terminals of the first resistor network may be 14, the number of the output terminals of the binding voltage generating circuit 10 may be 14, the number of the binding voltage switching circuits 20 is four, and the number of the output terminals of the binding voltage generating circuit is 18. It can be understood that the number of the input terminals of the source Driver integrated circuit Driver-IC may also be 18, in other words, the gamma integrated circuit Gmma-IC with 14 outputs may be compatible with the source Driver-IC with 18 inputs according to the technical solution of the present application.
Optionally, the gamma integrated circuit Gmma-IC has 14 output terminals, which are respectively a first output terminal, a second output terminal, a third output terminal, a fourth output terminal, a fifth output terminal, a sixth output terminal, a seventh output terminal, an eighth output terminal, a ninth output terminal, a tenth output terminal, an eleventh output terminal, a twelfth output terminal, a thirteenth output terminal and a fourteenth output terminal, and the voltage values of the tie point voltages output by the 14 output terminals of the gamma integrated circuit Gmma-IC are gradually decreased;
the 10 first input ends are respectively a first output end, a second output end, a fourth output end, a sixth output end, a seventh output end, an eighth output end, a ninth output end, an eleventh output end, a thirteenth output end and a fourteenth output end of the gamma integrated circuit Gmma-IC;
and the 4 second output ends are respectively a third output end, a fifth output end, a tenth output end and a twelfth output end of the gamma integrated circuit Gmma-IC.
It should be noted that, based on different designs of the display panel, the number and specific setting of the gray scales to be bound by each binding voltage in the source Driver-IC may be different, and this embodiment describes the number of the bound gray scales as 7, and the number of the bindable gray scales as 9, where the 9 gray scales may be 0 gray scale, 1 gray scale, 31 gray scale, 63 gray scale, 127 gray scale, 191, 223 gray scale, 254 gray scale, and 255 gray scale, respectively. As can be seen from the above gray scales, in the embodiment, the 8-bit display panel is used for illustration, the 0 gray scale is the lowest gray scale and is represented as black in the gray scale image, the 255 gray scale is the highest gray scale and is represented as white in the gray scale image; therefore, on the basis of this embodiment, if the color data with other bits, such as the 10-bit color data, is applied, the setting can be performed with respect to the 8-bit color data, which is not described herein again.
Setting 14 binding point voltages which can be output by the gamma integrated circuit Gmma-IC to be GM 1-GM 14 respectively, and setting the binding point voltages which can be accessed by 18 input ends of the source Driver-IC to be: GM1, GM2, GM3, GM4, GM5, GM6, GM7, GM8, GM9, GM10, GM11, GM12, GM13, GM14. The binding point voltage accessed by two input ends of the gamma integrated circuit Gmma-IC can bind a gray scale, and the method specifically comprises the following steps: GM1 and GM14 accessed by the first input end and the eighteenth input end are used for binding 255 gray scales, GM2 and GM13 accessed by the second input end and the seventeenth input end are used for binding 254 gray scales, GM3 and GM12 accessed by the third input end and the sixteenth input end are used for binding 223 gray scales, GM3 and GM12 accessed by the fourth input end and the fifteenth input end are used for binding 191 gray scales, GM4 and GM11 accessed by the fifth input end and the fourteenth input end are used for binding 127 gray scales, GM5 and GM10 accessed by the sixth input end and the thirteenth input end are used for binding 63 gray scales, GM5 and GM10 accessed by the seventh input end and the twelfth input end are used for binding 31 gray scales, GM6 and GM9 accessed by the eighth input end and the eleventh input end are used for binding 1 gray scale, and GM7 and GM8 accessed by the ninth input end and the tenth input end are used for binding 1 gray scale.
The four binding voltage switching circuits 20 connected to the third output terminal, the fifth output terminal, the tenth output terminal, and the twelfth output terminal of the gamma integrated circuit Gmma-IC are respectively set as a first binding voltage switching circuit 20A, a second binding voltage switching circuit 20B, a third binding voltage switching circuit 20C, and a fourth binding voltage switching circuit 20D. As can be seen from the binding relationship between each gray scale and the corresponding binding voltage, in the technical scheme of the present application, the first switching signal S1 is output to the first binding voltage switching circuit 20A, and the second switching signal S2 is output to the fourth binding voltage switching circuit 20D, so that the binding gray scale of the source Driver-IC is switched to the 191 gray scale due to the switching to the 223 gray scale; the second switching signal S2 is outputted to the first binding voltage switching circuit 20A, and the first switching signal S1 is outputted to the fourth binding voltage switching circuit 20D, so that the binding gray scale of the source Driver-IC is switched to the gray scale of 223 as the binding gray scale is switched to the 191 gray scale. In addition, according to the technical scheme of the application, the first switching signal S1 is output to the second binding point voltage switching circuit 20B, and the second switching signal S2 is output to the third binding point voltage switching circuit 20C, so that the binding gray scale of the source Driver-IC is switched to 63 gray scales due to the fact that the binding gray scale is switched to 31 gray scales; the second switching signal S2 is outputted to the second tie voltage switching circuit 20B, and the first switching signal S1 is outputted to the third tie voltage switching circuit 20C, so that the gray level of the source Driver-IC is switched to 31 gray level due to the switching from 63 gray levels.
In short, the technical scheme of the application reserves adjusting channels of two gray scales, namely a Driver-IC31 gray scale/63 gray scale and a 223 gray scale/191 gray scale, of a source driving integrated circuit in the 8-bit display panel, and greatly saves the time consumed in the binding voltage debugging process of the 8-bit display panel.
Example two:
the present application further provides a display panel, where the display panel includes a source Driver-IC and a tie-point voltage generating circuit, and the specific structure of the tie-point voltage generating circuit refers to the first embodiment, and the display panel adopts all technical solutions of all the first embodiments, so that the display panel at least has all beneficial effects brought by the technical solution of the first embodiment, and further description is omitted here.
The display panel may include a display region and a non-display region, and the source Driver-IC and the tie voltage generating circuit may be disposed in the non-display region. The tie point voltage generating circuit is connected with a plurality of input ends of the source electrode driving integrated circuit Driver-IC and used for outputting corresponding multi-path tie point voltages to the source electrode driving integrated circuit Driver-IC according to the accessed first switching signal S1 and the accessed second switching signal S2, so that the source electrode driving integrated circuit Driver-IC can respectively tie the accessed multi-path tie point voltages with corresponding gray scales. The source electrode driving integrated circuit Driver-IC can also convert a plurality of binding point voltages bound with corresponding gray scales into a plurality of paths of corresponding gray scale voltages through an internal integrated resistor R voltage division network and output the gray scale voltages to a display area.
Optionally, the display panel further comprises:
and a timing controller connected to the binding voltage generating circuit 10, the timing controller being configured to output the first switching signal S1 or the second switching signal S2 to the binding voltage generating circuit 10.
When the number of the tie voltage switching circuits 20 in the tie voltage generating circuit 10 is multiple, the timing controller may be further connected to the controlled terminal of each tie voltage switching circuit 20 to provide the first switching signal S1 or the second switching signal S2 required for switching the tie voltage to each tie voltage switching circuit 20, thereby implementing flexible adjustment and switching of various gray scale combinations in the source Driver-IC.
Example three:
the present application further provides a display device, which includes a display panel, and the specific structure of the tie-point voltage generating circuit refers to the second embodiment, and since the display device adopts all the technical solutions of the second embodiment, the display device at least has all the beneficial effects brought by the technical solutions of the second embodiment, and further description is omitted here.
The above description is only an alternative embodiment of the present application, and not intended to limit the scope of the present application, and all modifications and equivalents of the technical solutions that can be directly or indirectly applied to other related fields without departing from the spirit of the present application are intended to be included in the scope of the present application.

Claims (10)

1. The utility model provides a tie voltage generation circuit for display panel, display panel includes source drive integrated circuit, source drive integrated circuit is used for binding the corresponding grey scale with the multichannel tie voltage of access, and is used for will binding the multichannel tie voltage after the corresponding grey scale and convert multichannel grey scale voltage into multichannel grey scale voltage output, its characterized in that, tie voltage generation circuit includes:
a plurality of first output ends of the tie voltage generating circuit are respectively connected with one input end of the source electrode driving integrated circuit; and (c) a second step of,
the input end of the tie voltage switching circuit is connected with the second output end of the tie voltage generating circuit, the controlled end of the tie voltage switching circuit is used for accessing a first switching signal or a second switching signal, and the first output end and the second output end of the tie voltage switching circuit are respectively connected with one input end of the source electrode driving integrated circuit;
a plurality of first output ends of the binding voltage generating circuit are used for outputting a plurality of paths of binding voltages to the source electrode driving integrated circuit, and a second input end of the binding voltage generating circuit is used for outputting one path of binding voltages to the binding voltage switching circuit;
the binding point voltage switching circuit is used for outputting the accessed binding point voltage to the source electrode driving integrated circuit from a first output end after receiving the first switching signal; and outputting the accessed binding point voltage to the source electrode driving integrated circuit from a second output end after receiving the second switching signal.
2. The tie voltage generation circuit of claim 1, wherein the tie voltage switching circuit comprises:
the controlled end of the switch circuit is used for being connected with the first switching signal or the second switching signal, the input end of the switch circuit is connected with the second input end of the binding voltage generating circuit, and the first output end and the second output end of the switch circuit are respectively connected with one input end of the source electrode driving integrated circuit through one path of first resistor circuit.
3. The tie voltage generation circuit of claim 2, wherein the switching circuit comprises a first switching circuit and a second switching circuit;
the controlled end of the first switch circuit and the controlled end of the second switch circuit are used for accessing the first switching signal or the second switching signal, the input end of the first switch circuit and the input end of the second switch circuit are connected with the second input end of the binding voltage generating circuit, and the output end of the first switch circuit and the output end of the second switch circuit are respectively connected with one input end of the source electrode driving integrated circuit through one path of first resistor circuit;
when the controlled end of the binding point voltage switching circuit receives the first switching signal or the second switching signal, one of the first switching circuit and the second switching circuit is turned on, and the other is turned off.
4. The tie voltage generating circuit of claim 1, wherein the tie voltage generating circuit has a plurality of second output terminals;
the number of the binding voltage switching circuits corresponds to the number of the second output ends of the binding voltage generating circuits, the input end of each binding voltage switching circuit is connected with one second output end of the binding voltage generating circuit, the controlled end of each binding voltage switching circuit is used for accessing one path of first switching signal or one path of second switching signal, and the first output end and the second output end of each binding voltage switching circuit are respectively connected with one input end of the source electrode driving integrated circuit;
each binding point voltage switching circuit is used for outputting the accessed binding point voltage to the corresponding input end of the source electrode driving integrated circuit from a first output end after receiving the first switching signal; and outputting the accessed tie point voltage to the corresponding input end of the source electrode driving integrated circuit from a second output end after receiving the second switching signal.
5. The tie voltage generation circuit of claim 4, wherein the tie voltage generation circuit comprises:
and each first output end of the gamma integrated circuit is connected with one input end of the source electrode driving integrated circuit through one path of second resistor circuit, and each second output end of the gamma integrated circuit is connected with one path of input end of the binding voltage switching circuit.
6. The binding voltage generating circuit of claim 5, wherein the number of the first output terminals of the gamma integrated circuit is 10, and the number of the second output terminals of the gamma integrated circuit is 4.
7. The tie point voltage generating circuit of claim 6, wherein the gamma integrated circuit has 14 output terminals, respectively, a first output terminal, a second output terminal, a third output terminal, a fourth output terminal, a fifth output terminal, a sixth output terminal, a seventh output terminal, an eighth output terminal, a ninth output terminal, a tenth output terminal, an eleventh output terminal, a twelfth output terminal, a thirteenth output terminal, and a fourteenth output terminal, and the voltage values of the tie point voltages output from the 14 output terminals of the gamma integrated circuit are gradually decreased;
the 10 first input ends of the gamma integrated circuit are respectively a first output end, a second output end, a fourth output end, a sixth output end, a seventh output end, an eighth output end, a ninth output end, an eleventh output end, a thirteenth output end and a fourteenth output end of the gamma integrated circuit;
the 4 second output ends of the gamma integrated circuit are respectively a third output end, a fifth output end, a tenth output end and a twelfth output end of the gamma integrated circuit.
8. A display panel, comprising:
the source electrode driving integrated circuit is used for binding the accessed multi-channel binding voltage with the corresponding gray scale and converting the multi-channel binding voltage after the corresponding gray scale is bound into multi-channel gray scale voltage for output; and the number of the first and second groups,
the tie voltage generation circuit of any of claims 1 to 7 connected to a plurality of inputs of the source driver integrated circuit.
9. The display panel according to claim 8, wherein the display panel further comprises:
and the time sequence controller is connected with the binding point voltage generating circuit and is used for outputting a first switching signal or a second switching signal to the binding point voltage generating circuit.
10. A display device characterized in that it comprises a display panel as claimed in claim 8 or 9.
CN202221978180.7U 2022-07-28 2022-07-28 Binding voltage generation circuit, display panel and display device Active CN217902701U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221978180.7U CN217902701U (en) 2022-07-28 2022-07-28 Binding voltage generation circuit, display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221978180.7U CN217902701U (en) 2022-07-28 2022-07-28 Binding voltage generation circuit, display panel and display device

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CN217902701U true CN217902701U (en) 2022-11-25

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