CN113672023A - Gamma voltage generation circuit and display device - Google Patents
Gamma voltage generation circuit and display device Download PDFInfo
- Publication number
- CN113672023A CN113672023A CN202110943098.4A CN202110943098A CN113672023A CN 113672023 A CN113672023 A CN 113672023A CN 202110943098 A CN202110943098 A CN 202110943098A CN 113672023 A CN113672023 A CN 113672023A
- Authority
- CN
- China
- Prior art keywords
- voltage
- selector
- register
- subunit
- buffer amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009966 trimming Methods 0.000 claims description 42
- 230000011664 signaling Effects 0.000 claims description 15
- HODRFAVLXIFVTR-RKDXNWHRSA-N tevenel Chemical compound NS(=O)(=O)C1=CC=C([C@@H](O)[C@@H](CO)NC(=O)C(Cl)Cl)C=C1 HODRFAVLXIFVTR-RKDXNWHRSA-N 0.000 description 12
- 241001270131 Agaricus moelleri Species 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/625—Regulating voltage or current wherein it is irrelevant whether the variable actually regulated is ac or dc
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of El Displays (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The application discloses gamma voltage generation circuit and display device, display device include first OLED panel and second OLED panel, and gamma voltage generation circuit includes: a first gamma voltage generation module and a second gamma voltage generation module; the first gamma voltage generating module includes: the first voltage division unit is connected with a reference power supply, and the first fine tuning unit is connected with the first voltage division unit; the first voltage division unit is used for outputting a first reference voltage according to the reference power supply after receiving the first signal; the first fine tuning unit is used for outputting a first gamma voltage according to a first reference voltage, and the first gamma voltage is used for driving the first OLED panel; the second gamma voltage generation module comprises a second fine tuning unit, is connected with the first voltage division unit and is used for outputting a second gamma voltage according to the first reference voltage, and the second gamma voltage drives the second OLED panel. The brightness difference generated when the OLED panel is driven by the plurality of OLED driving chips can be reduced.
Description
Technical Field
The application relates to the field of OLED panel drive control, in particular to a gamma voltage generation circuit and display equipment.
Background
In recent years, as the demand for the size of the OLED panel has increased, the related configuration of the OLED panel product has also increased. As shown in fig. 1, in a large OLED panel, especially a foldable terminal device, a plurality of OLED driving chips are generally used to drive the large OLED panel. However, in such an OLED panel, since a plurality of OLED driving chips are used for driving and the gamma voltage generating circuits of the plurality of OLED driving chips are all connected to the same reference power supply, although the output voltages of the same reference power supply are equal, when the gamma voltage generating circuits of different OLED driving chips are output, voltage deviation occurs, and the OLED panel is characterized in that even if a slight voltage deviation occurs, a significant brightness difference occurs in the OLED panel.
Disclosure of Invention
The embodiment of the application provides a gamma voltage generation circuit and display equipment, so as to reduce brightness difference generated when an OLED panel is driven by a plurality of OLED driving chips.
The application provides a gamma voltage generation circuit, is applied to among the display device, and display device includes first OLED panel and second OLED panel, and gamma voltage generation circuit includes: a first gamma voltage generating module and a second gamma voltage generating module, the first gamma voltage generating module including:
the first voltage division unit is connected with the reference power supply and used for outputting a first reference voltage according to the reference power supply after receiving the first signal;
the first fine tuning unit is connected with the first voltage division unit and used for outputting a first gamma voltage according to a first reference voltage, and the first gamma voltage is used for driving the first OLED panel;
the second gamma voltage generating module includes: and the second fine tuning unit is connected with the first voltage division unit and used for outputting a second gamma voltage according to the first reference voltage, and the second gamma voltage drives the second OLED panel.
Optionally, the first voltage dividing unit comprises a first voltage dividing subunit, a first reference subunit and a second reference subunit;
one end of the first voltage division subunit is connected with the anode of the reference power supply, the other end of the first voltage division subunit is connected with the cathode of the reference power supply, and the first voltage division subunit comprises a plurality of first resistors which are connected in series;
the first reference subunit comprises a first selector, a first register and a first buffer amplifier, wherein the control end of the first selector is connected with the first register, and the channel of the first selector is connected with the connection point of every two first resistors; the output end of the first selector is connected with a first buffer amplifier, and the output end of the first buffer amplifier is connected with a first fine tuning unit and a second gamma voltage generation module;
the first register is used for receiving the first register signal and controlling the first selector to select voltage according to the first register signal; the first buffer amplifier is used for outputting a first reference high level to the first fine tuning unit according to the voltage selected by the first selector after receiving the first signal;
the second reference subunit comprises a second selector, a second register and a second buffer amplifier, wherein the control end of the second selector is connected with the second register, and the channel of the second selector is connected with the connection point of every two first resistors; the output end of the second selector is connected with a second buffer amplifier, and the output end of the second buffer amplifier is connected with a second fine tuning unit and a second gamma voltage generation module;
the second register is used for receiving a second register signal and controlling the second selector to select voltage according to the second register signal; the second buffer amplifier is used for outputting a first reference low level to the first fine adjustment unit according to the voltage selected by the second selector after receiving the first signal.
Optionally, the first trimming unit comprises: the second voltage division subunit, the plurality of first trimming subunits and the plurality of second resistors connected in series;
one end of the second voltage division subunit is connected with the first reference subunit, and the other end of the second voltage division subunit is connected with the second reference subunit; the second voltage division subunit is used for dividing the first reference voltage; the second voltage-dividing subunit comprises a plurality of third resistors connected in series.
The first fine tuning subunit comprises a third selector, a third register and a third buffer amplifier, and a channel of the third selector is connected to the connection point of every two third resistors; the output end of the third selector is connected with a third buffer amplifier, and the output end of the third buffer amplifier is connected with the connection points of every two second resistors;
the third register is used for receiving a third register signal and controlling the third selector to select voltage according to the third register signal; the third buffer amplifier outputs the first gamma voltage through a connection point of the second resistor according to the voltage selected by the third selector.
Optionally, the number of channels of the third selector is n3The number of bits of the third register is k3The number of the first fine tuning sub-units is w1And satisfies the following conditions:
wherein D is1Is the gray scale number, w, of the first OLED panel1Is a preset value.
Optionally, the second trimming unit comprises: the third voltage division subunit, a plurality of second trimmer subunits and a plurality of fourth resistors connected in series;
one end of the third voltage division subunit is connected with the first reference subunit, the other end of the third voltage division subunit is connected with the second reference subunit, and the third voltage division subunit comprises a plurality of fifth resistors which are connected in series;
the second fine tuning subunit comprises a fourth selector, a fourth register and a fourth buffer amplifier, and a channel of the fourth selector is connected to the connection point of every two fifth resistors; the output end of the fourth selector is connected with a fourth buffer amplifier, and the output end of the fourth buffer amplifier is connected with the connection point of every two fourth resistors;
the fourth register is used for receiving a fourth register signal and controlling the fourth selector to select voltage according to the fourth register signal; the fourth buffer amplifier outputs the second gamma voltage through a connection point of the fourth resistor according to the voltage selected by the fourth selector.
Optionally, the fourth selector has n channels4The fourth register has a number of bits k4The number of the second fine tuning sub-units is w2And satisfies:
wherein D is2Is the gray scale number, w, of the second OLED panel2Is a preset value.
Optionally, the second gamma voltage generating module further includes a second voltage dividing unit, connected to the reference power supply, and configured to output a second reference voltage according to the reference power supply after receiving the second signal;
the second trimming unit is further used for outputting a third gamma voltage according to the second reference voltage, and the third gamma voltage drives the second OLED panel.
Optionally, the second voltage division unit includes: a fourth voltage dividing subunit, a third reference subunit and a fourth reference subunit;
one end of the fourth voltage dividing subunit is connected with the anode of the reference power supply, the other end of the fourth voltage dividing subunit is connected with the cathode of the reference power supply, and the fourth voltage dividing subunit comprises a plurality of sixth resistors which are connected in series;
the third reference subunit comprises a fifth selector, a fifth register and a fifth buffer amplifier, wherein the control end of the fifth selector is connected with the fifth register, and the channel of the fifth selector is connected with the connection point of every two sixth resistors; the output end of the fifth selector is connected with a fifth buffer amplifier, and the output end of the fifth buffer amplifier is connected with the second fine tuning unit;
the fifth register is used for receiving a fifth register signal and controlling the fifth selector to select voltage according to the fifth register signal; the fifth buffer amplifier is used for outputting a second reference high level to the second fine tuning unit according to the voltage selected by the fifth selector after receiving the second signal;
the fourth reference subunit comprises a sixth selector, a sixth register and a sixth buffer amplifier, wherein the control end of the sixth selector is connected with the sixth register, and a channel of the sixth selector is connected to the connection point of every two sixth resistors; the output end of the sixth selector is connected with a sixth buffer amplifier, and the output end of the sixth buffer amplifier is connected with a sixth fine tuning unit;
the sixth register is used for receiving a sixth register signal and controlling the sixth selector to select voltage according to the sixth register signal; and the sixth buffer amplifier is used for outputting a second reference low level to the second fine adjustment unit according to the voltage selected by the sixth selector after receiving the second signal.
The application also provides a display device which comprises the gamma voltage generating circuit.
The gamma voltage generating circuit and the display device output a first reference voltage through the first voltage dividing unit, and the first fine tuning unit is connected with the first voltage dividing unit, and the second fine tuning unit is connected with the first voltage dividing unit, so that the first reference voltage is output to the second fine tuning unit through the first voltage dividing unit, the first fine tuning unit and the second fine tuning unit adopt the same voltage, namely the first reference voltage, to carry out fine tuning, so that a first gamma voltage and a second gamma voltage are generated, and then the offset between the first gamma voltage and the second gamma voltage is reduced, so that the brightness difference between the first OLED panel and the first OLED panel is reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments of the present application will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive exercise.
Fig. 1 is a hardware block diagram of a conventional display device;
FIG. 2 is a hardware block diagram of a display device according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a gamma voltage generation circuit according to an embodiment of the present application;
FIG. 4 is a circuit diagram of a gamma voltage generating circuit according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is noted that the terms "first", "second", "third", and the like are used merely for distinguishing between descriptions and are not intended to indicate or imply relative importance.
In the description of the present application, it is also to be noted that, unless otherwise explicitly specified or limited, the terms "disposed" and "connected" are to be interpreted broadly, e.g., as meaning either a fixed connection, a detachable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
The gamma voltage generation circuit provided by the embodiment of the application can be applied to display equipment, the display equipment comprises a first OLED panel and a second OLED panel, and the gray scale number of the first OLED panel and the gray scale number of the second OLED panel can be equal or unequal. Specifically, referring to fig. 2 and 3, the gamma voltage generating circuit includes: the display device includes a first gamma voltage generating module 10 and a second gamma voltage generating module 20, wherein the first gamma voltage generating module 10 is coupled with a first OLED panel, and the second gamma voltage generating module 20 is coupled with a second OLED panel.
Wherein, the first gamma voltage generating module 10 includes: the first voltage division unit 11 and the first fine tuning unit 12, and the first voltage division unit 11 is connected with the reference power supply, and the first fine tuning unit 12 is connected with the first voltage division unit 11.
The first voltage division unit 11 is configured to output a first reference voltage according to the reference power supply 30 after receiving the first signal; the first trimming unit 12 is configured to output a first gamma voltage according to a first reference voltage, the first gamma voltage being used to drive the first OLED panel.
The first voltage dividing unit 11 is configured to divide the voltage output by the reference power supply 30 and output a first reference voltage. The reference power supply 30 may be an external power supply, which mainly functions to supply power to the first voltage division unit 11. The first signal is applied to the first voltage division unit 11 to operate the first voltage division unit 11, thereby generating a first reference voltage. The first trimming unit 12 is used for performing voltage trimming according to a first reference voltage, thereby outputting a first gamma voltage.
The second gamma voltage generating module 20 includes: the second trimming unit 21 is connected to the first voltage dividing unit 11. The second trimming unit 21 is configured to output a second gamma voltage according to the first reference voltage, and the second gamma voltage drives the second OLED panel. The second trimming unit 21 is used for performing voltage trimming according to the first reference voltage, thereby outputting a second gamma voltage.
In the above embodiment, the first voltage dividing unit 11 outputs the first reference voltage, and the first trimming unit 12 is connected to the first voltage dividing unit 11, and the second trimming unit 21 is connected to the first voltage dividing unit 11, so that the first reference voltage is output to the second trimming unit 21 through the first voltage dividing unit 11, and the first trimming unit 12 and the second trimming unit 21 perform trimming using the same voltage, i.e., the first reference voltage, thereby generating the first gamma voltage and the second gamma voltage, and further reducing the offset between the first gamma voltage and the second gamma voltage, so as to reduce the brightness difference between the first OLED panel and the first OLED panel.
In one embodiment, as shown in fig. 4, the first voltage dividing unit 11 includes a first voltage dividing subunit 111, a first reference subunit 112, and a second reference subunit 113; the first voltage-dividing subunit 111 has one end connected to the positive electrode of the reference power supply 30 and the other end connected to the negative electrode of the reference power supply 30, and the first voltage-dividing subunit 111 includes a plurality of first resistors R1 connected in series.
The first reference subunit 112 includes a first selector S1, a first register RE1 and a first buffer amplifier amp1, a control terminal of the first selector S1 is connected to the first register RE1, and a channel of the first selector S1 is connected to a connection point of two first resistors R1; an output terminal of the first selector S1 is connected to the first buffer amplifier amp1, and an output terminal of the first buffer amplifier amp1 is connected to the first trimming unit 12 and the second gamma voltage generating module 20.
The first register RE1 is configured to receive the first register signal and control the first selector S1 to select a voltage according to the first register signal; the first buffer amplifier amp1 is used for outputting a first reference high level V0_ REF to the first trimming unit 12 according to the voltage selected by the first selector S1 after receiving the first signal.
The first register RE1 may be connected to a control module of the display device to obtain a first register signal output by the control module. The first register signal is a multi-bit digital code for controlling the first selector S1 to select the voltage. Since the plurality of first resistors R1 are connected in series to form a resistor voltage dividing circuit, the first reference voltage is divided, and the first selector S1 controls the first selector S1 to select a divided voltage from the plurality of channels by connecting the channels of the first selector S1 between two pairs of first resistors R1. Specifically, the number n of channels of the first selector S11And bit number k of first register RE11In relation to, the relationship is: n is1＝2k1Here, the first register RE1 can control the first selector S1 to randomly select a divided voltage.
The first signal is used to control the operation of the first buffer amplifier amp1, and specifically, the first buffer amplifier amp1 outputs a first reference high level to the first trimming unit 12 after receiving the first signal, where the first signal may be a voltage signal for controlling the operation of the first buffer amplifier amp1, and for example, the first signal acts on the power supply terminal VCC of the first buffer amplifier amp1, so as to supply power to the first buffer amplifier amp1, so as to operate the first buffer amplifier amp 1.
The second reference subunit 113 comprises a second selector S2, a second register RE2 and a second buffer amplifier amp2, a control terminal of the second selector S2 is connected with the second register RE2, and a channel of the second selector S2 is connected with a connection point of two pairs of first resistors R1; the output terminal of the second selector S2 is connected to the second buffer amplifier amp2, and the output terminal of the second buffer amplifier amp2 is connected to the second fine tuning unit 21 and the second gamma voltage generation module 20;
the second register RE2 is configured to receive the second register signal and control the second selector S2 to select a voltage according to the second register signal; the second buffer amplifier amp2 is used for outputting a first reference low level V1023_ REF to the first trimming unit 12 according to the voltage selected by the second selector S2 after receiving the first signal.
The second register RE2 may be connected to a control module of the display device to obtain a second register signal output by the control module. The second register signal is a multi-bit digital code for controlling the second selector S2 to select the voltage. Since the plurality of first resistors R1 are connected in series to form a resistor voltage dividing circuit, the first reference voltage is divided, and the second selector S2 controls the second selector S2 to select a divided voltage from the plurality of channels by connecting the channels of the second selector S2 between two pairs of first resistors R1. Specifically, the number n of channels of the second selector S22And bit number k of second register RE22In relation to, the relationship is: n is2＝2k2Here, the second register RE2 can control the second selector S2 to randomly select a divided voltage.
The first signal is further used to control the second buffer amplifier amp2 to operate, and specifically, the second buffer amplifier amp2 outputs a first reference low level to the second trimming unit 21 after receiving the first signal, where the first signal may be a voltage signal for controlling the second buffer amplifier amp2 to operate, for example, the first signal acts on the power supply terminal VCC of the second buffer amplifier amp2 to supply power to the second buffer amplifier amp2, so as to operate the second buffer amplifier amp 2.
It is understood that the difference between the first reference low level and the first reference high level is the first reference voltage.
The above-described embodiment outputs the first reference high level through the first reference sub-unit 112, outputs the first reference low level through the second reference sub-unit 113, and outputs the first reference high level and the first reference low level to the first and second trimming units 12 and 21, so that each of the first and second trimming units 12 and 21 performs trimming according to the first reference high level and the first reference low level, thereby outputting the first and second gamma voltages, and reduces the voltage offset between the first and second gamma voltages, thereby reducing the luminance difference between the first OLED panel and the first OLED panel.
In one embodiment, the first trimming unit 12 includes: a second voltage dividing subunit 121, a plurality of first trimming subunits 122, and a plurality of second resistors R2 connected in series; one end of the second voltage dividing subunit 121 is connected to the first reference subunit 112, and the other end is connected to the second reference subunit 113; the second voltage division subunit 121 is configured to divide the first reference voltage; the second voltage-dividing subunit 121 includes a plurality of third resistors R3 connected in series.
The first trimming subunit 122 includes a third selector S3, a third register RE3 and a third buffer amplifier amp3, and the channel of the third selector S3 is connected to the connection point of two third resistors R3; the output end of the third selector S3 is connected with a third buffer amplifier amp3, and the output end of the third buffer amplifier amp3 is connected with the connection point of every two second resistors R2;
the third register RE3 is used for receiving a third register signal and controlling the third selector S3 to select a voltage according to the third register signal; the third buffer amplifier amp3 outputs the first gamma voltage through the connection point of the second resistor R2 according to the voltage selected by the third selector S3.
The number of the first fine tuning sub-units 122 can be set according to actual requirements. Specifically, the number of channels of the third selector S3 is n3The third register RE3 has a bit number of k3The number of the first fine tuning sub-units 122 is w1And satisfies the following conditions:
wherein D is1Is the gray scale number, w, of the first OLED panel1Is a preset value, n3And rounding up.
Taking fig. 4 as an example, the first OLED panel is a panel with 1024 gray scales, and the number of the first fine tuning sub-units 122 is 9, which is equivalent to arranging one first fine tuning sub-unit 122 every 128 gray scales. In determining the first gamma voltage of the gray scale V <0>, the third selector S3 selects one of the levels from the plurality of channels, which is denoted as V0_ M for easy distinction, and then outputs to the third buffer amplifier amp3 using the third register RE3 as a control, at which the level output from the third buffer amplifier amp3 is V0_ M + am, where am denotes the inherent offset of the third buffer amplifier amp3, and the resolution of the gray scale may be controlled to be 1mV or less, thereby controlling am to be ± 1mV or less, by the control of the third register RE3 and the selection of the third selector S3 of the plurality of channels.
When the first gamma voltage of the gray scale V <1023> is determined, the third selector S3 selects one of the levels V1023_ M from the plurality of channels and then outputs to the third buffer amp3, at which time the level output by the third buffer amp3 is V1023_ M + im, where im represents the inherent offset of the third buffer amp3, and by the control of the third register RE3 and the selection of the third selector S3 of the plurality of channels, the resolution of the gray scale can be controlled to 1mV or less, thereby controlling im to ± 1mV or less.
Similarly, the offsets of the third buffer amplifier amp3 corresponding to the gray levels V <128>, V <256>, …, and V <896> are bm, cm, …, hm, respectively, and the offsets are controlled to be ± 1mV or less.
In one embodiment, the second trimming unit 21 includes: a third voltage dividing subunit 211, a plurality of second trimming subunits 212, and a plurality of series-connected fourth resistors R4; the third voltage dividing subunit 211 is connected at one end to the first reference subunit 112 and at the other end to the second reference subunit 113, the third voltage dividing subunit 211 comprising a plurality of fifth resistors R5 connected in series.
The second trimming subunit 212 includes a fourth selector S4, a fourth register RE4 and a fourth buffer amplifier amp4, the channel of the fourth selector S4 is connected to the connection point of two fifth resistors R5; the output terminal of the fourth selector S4 is connected to the fourth buffer amplifier amp4, and the output terminal of the fourth buffer amplifier amp4 is connected to the connection point of two fourth resistors R4.
The fourth register RE4 is used for receiving a fourth register signal and controlling the fourth selector S4 to select the voltage according to the fourth register signal; the fourth buffer amplifier amp4 outputs the second gamma voltage through the connection point of the fourth resistor R4 according to the voltage selected by the fourth selector S4.
The number of the second fine tuning sub-units 212 can be set according to actual requirements. Specifically, the number of channels of the fourth selector S4 is n4The fourth register RE4 has a bit number of k4The number of the second fine tuning sub-units 212 is w2And satisfies:
wherein D is2Is the gray scale number, w, of the second OLED panel2Is a preset value, n4And rounding up.
Taking fig. X as an example, the second OLED panel is a panel with 1024 gray scales, and the number of the second fine tuning sub-units 212 is 9, which is equivalent to setting one second fine tuning sub-unit 212 every 128 gray scales. In determining the second gamma voltage of the gray scale V < 0' > using the third register RE3 as control, the third selector S3 selects one of the levels from the plurality of channels, which is denoted as V0_ S for easy distinction, and then outputs the selected level to the fourth buffer amplifier amp4, at which time the output level of the fourth buffer amplifier amp4 is V0_ S + as, where as denotes the inherent offset of the fourth buffer amplifier amp4, and the resolution of the gray scale can be controlled to be 1mV or less by controlling the fourth register RE4 and selecting the fourth selector S4 of the plurality of channels, thereby controlling as to be ± 1mV or less.
When the second gamma voltage of the gray scale V < 1023' > is determined, the fourth selector S4 selects one of the levels V1023_ S from the plurality of channels and then outputs to the fourth buffer amplifier amp4, at which time the level output by the fourth buffer amplifier amp4 is V1023_ S + is, where is represents the inherent offset of the fourth buffer amplifier amp4, and the resolution of the gray scale can be controlled to be 1mV or less by the control of the fourth register RE4 and the selection of the fourth selector S4 of the plurality of channels, thereby controlling is to be ± 1mV or less.
Similarly, the offsets of the fourth buffer amplifier amp4 corresponding to the gray levels V <128 ' >, V <256 ' >, …, and V <896 ' > are bs, cs, …, and hs, respectively, and are controlled to be ± 1mV or less.
In the above embodiment, the voltage offset between the gamma voltage corresponding to the gray scale V <0> of the first gamma voltage generation module 10 being V0_ M + am and the gray scale V < 0' > of the second gamma voltage generation module 20 being V0_ S + as is: v0_ M-V0_ S + am-as, since the first and second trimming units 12 and 21 perform trimming according to the first reference high level and the first reference low level, V0_ M-V0_ S can be approximately 0, and the offsets of the third and fourth buffer amplifiers amp3 and amp4 are controlled to be less than ± 1mV, so the voltage offset V0_ M-V0_ S + am-as can be controlled to be less than ± 2mV, which greatly reduces the voltage offset between the first and second gamma voltages.
In an embodiment, the second gamma voltage generating module 20 further includes a second voltage dividing unit connected to the reference power supply 30, for outputting a second reference voltage according to the reference power supply 30 after receiving the second signal;
the second trimming unit 21 is further configured to output a third gamma voltage according to the second reference voltage, and the third gamma voltage drives the second OLED panel.
The second signal can control the second voltage division unit to work. By providing the second voltage division unit in the second gamma voltage generation module 20, the second OLED panel can be driven alone. Note that, in the gamma voltage generating circuit, the first signal and the second signal are not simultaneously available. That is, when the first voltage dividing unit 11 does not receive the first signal and the second voltage dividing unit receives the second signal, only the second voltage dividing unit operates; when the first voltage dividing unit 11 receives the first signal and the second voltage dividing unit does not receive the second signal, only the first voltage dividing unit 11 operates, so that the second OLED panel can be driven to operate independently.
In one embodiment, the second voltage division unit includes: a fourth voltage division subunit 221, a third reference subunit 222 and a fourth reference subunit 223; one end of the fourth voltage dividing subunit 221 is connected to the positive electrode of the reference power supply 30, and the other end is connected to the negative electrode of the reference power supply 30, and the fourth voltage dividing subunit 221 includes a plurality of sixth resistors connected in series;
the third reference subunit 222 includes a fifth selector S5, a fifth register RE5 and a fifth buffer amplifier amp5, a control terminal of the fifth selector S5 is connected to the fifth register RE5, and a channel of the fifth selector S5 is connected to a connection point of two sixth resistors R6; the output terminal of the fifth selector S5 is connected to the fifth buffer amplifier amp5, and the output terminal of the fifth buffer amplifier amp5 is connected to the second trimming unit 21;
the fifth register RE5 is configured to receive the fifth register signal and control the fifth selector S5 to select a voltage according to the fifth register signal; the fifth buffer amplifier amp5 is used for outputting a second reference high level to the second trimming unit 21 according to the voltage selected by the fifth selector S5 after receiving the second signal;
the fourth reference sub-unit 223 includes a sixth selector S6, a sixth register, and a sixth buffer amplifier, a control terminal of the sixth selector S6 is connected to the sixth register, and a channel of the sixth selector S6 is connected to a connection point of two sixth resistors R6; the output end of the sixth selector S6 is connected to the sixth buffer amplifier, and the output end of the sixth buffer amplifier is connected to the sixth trimming unit;
the sixth register is used for receiving a sixth register signal and controlling the sixth selector S6 to select the voltage according to the sixth register signal; the sixth buffer amplifier is configured to output a second reference low level to the second trimming unit 21 according to the voltage selected by the sixth selector S6 after receiving the second signal.
The above-described embodiment outputs the second reference high level by the action of the fifth selector S5, the fifth register RE5, and the fifth buffer amplifier amp5 of the third reference sub-unit 222 by setting the third reference sub-unit 222, and outputs the second reference low level by the action of the sixth selector S6, the sixth register RE6, and the sixth buffer amplifier amp6 of the fourth reference sub-unit 223 by setting the fourth reference sub-unit 223, so that the second fine tuning sub-unit 212 outputs the third gamma voltage according to the second reference high level and the second reference low level, thereby controlling the second OLED panel to operate alone.
It should be noted thatThe relationship between the number n of selector channels and the number k of register bits in the above-described embodiment is n-2kAnd k is a positive integer greater than 1.
An embodiment of the present application also provides a display device, as shown in fig. 2, including the gamma voltage generating circuit of the above embodiment. The specific definition of the display device can refer to the gamma voltage generation circuit, and is not described herein.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.
Claims (9)
1. A gamma voltage generation circuit applied to a display device including a first OLED panel and a second OLED panel, the gamma voltage generation circuit comprising: a first gamma voltage generation module and a second gamma voltage generation module, wherein the first gamma voltage generation module comprises:
the first voltage division unit is connected with the reference power supply and used for outputting a first reference voltage according to the reference power supply after receiving the first signal;
the first fine tuning unit is connected with the first voltage division unit and used for outputting a first gamma voltage according to the first reference voltage, and the first gamma voltage is used for driving the first OLED panel;
the second gamma voltage generating module includes: and the second fine tuning unit is connected with the first voltage division unit and used for outputting a second gamma voltage according to the first reference voltage, and the second gamma voltage drives the second OLED panel.
2. The gamma voltage generation circuit of claim 1, wherein the first voltage division unit includes a first voltage division subunit, a first reference subunit, and a second reference subunit;
one end of the first voltage division subunit is connected with the anode of the reference power supply, the other end of the first voltage division subunit is connected with the cathode of the reference power supply, and the first voltage division subunit comprises a plurality of first resistors which are connected in series;
the first reference subunit comprises a first selector, a first register and a first buffer amplifier, wherein the control end of the first selector is connected with the first register, and the channel of the first selector is connected with the connection point of every two first resistors; the output end of the first selector is connected with the first buffer amplifier, and the output end of the first buffer amplifier is connected with the first fine tuning unit and the second gamma voltage generation module;
the first register is used for receiving a first register signal and controlling the first selector to select voltage according to the first register signal; the first buffer amplifier is used for outputting a first reference high level to the first fine tuning unit according to the voltage selected by the first selector after receiving the first signal;
the second reference subunit comprises a second selector, a second register and a second buffer amplifier, wherein the control end of the second selector is connected with the second register, and channels of the second selector are connected to the connection points of every two first resistors; the output end of the second selector is connected with the second buffer amplifier, and the output end of the second buffer amplifier is connected with the second fine tuning unit and the second gamma voltage generation module;
the second register is used for receiving a second register signal and controlling the second selector to select voltage according to the second register signal; and the second buffer amplifier is used for outputting a first reference low level to the first fine adjustment unit according to the voltage selected by the second selector after receiving the first signal.
3. The gamma voltage generation circuit of claim 2, wherein the first trimming unit comprises: the second voltage division subunit, the plurality of first trimming subunits and the plurality of second resistors connected in series;
one end of the second voltage division subunit is connected with the first reference subunit, and the other end of the second voltage division subunit is connected with the second reference subunit; the second voltage division subunit is used for dividing the first reference voltage; the second voltage division subunit comprises a plurality of third resistors connected in series;
the first fine tuning subunit comprises a third selector, a third register and a third buffer amplifier, and a channel of the third selector is connected to the connection point of every two third resistors; the output end of the third selector is connected with the third buffer amplifier, and the output end of the third buffer amplifier is connected with the connection point of every two second resistors;
the third register is used for receiving a third register signal and controlling the third selector to select voltage according to the third register signal; the third buffer amplifier outputs a first gamma voltage through a connection point of the second resistor according to the voltage selected by the third selector.
4. The gamma voltage generating circuit of claim 3, wherein the third selector has n channels3The number of bits of the third register is k3The number of the first fine tuning sub-units is w1And satisfies the following conditions:
wherein D is1Is the gray scale number, w, of the first OLED panel1Is a preset value.
5. The gamma voltage generation circuit of claim 2, wherein the second trimming unit comprises: the third voltage division subunit, a plurality of second trimmer subunits and a plurality of fourth resistors connected in series;
one end of the third voltage division subunit is connected with the first reference subunit, the other end of the third voltage division subunit is connected with the second reference subunit, and the third voltage division subunit comprises a plurality of fifth resistors which are connected in series;
the second fine tuning subunit comprises a fourth selector, a fourth register and a fourth buffer amplifier, and a channel of the fourth selector is connected to a connection point of every two fifth resistors; the output end of the fourth selector is connected with the fourth buffer amplifier, and the output end of the fourth buffer amplifier is connected with the connection point of every two fourth resistors;
the fourth register is used for receiving a fourth register signal and controlling the fourth selector to select voltage according to the fourth register signal; the fourth buffer amplifier outputs a second gamma voltage through a connection point of the fourth resistor according to the voltage selected by the fourth selector.
6. The gamma voltage generating circuit of claim 5, wherein the fourth selector has n channels4The number of bits of the fourth register is k4The number of the second fine tuning sub-units is w2And satisfies:
wherein D is2Is the gray scale number, w, of the second OLED panel2Is a preset value.
7. The gamma voltage generating circuit of claim 4, wherein the second gamma voltage generating module further comprises a second voltage dividing unit connected to the reference power source for outputting a second reference voltage according to the reference power source after receiving the second signal;
the second trimming unit is further configured to output a third gamma voltage according to the second reference voltage, and the third gamma voltage drives the second OLED panel.
8. The gamma voltage generation circuit of claim 4, wherein the second voltage division unit comprises: a fourth voltage dividing subunit, a third reference subunit and a fourth reference subunit;
one end of the fourth voltage dividing subunit is connected with the anode of the reference power supply, the other end of the fourth voltage dividing subunit is connected with the cathode of the reference power supply, and the fourth voltage dividing subunit comprises a plurality of sixth resistors which are connected in series;
the third reference subunit comprises a fifth selector, a fifth register and a fifth buffer amplifier, wherein the control end of the fifth selector is connected with the fifth register, and the channel of the fifth selector is connected with the connection point of every two sixth resistors; the output end of the fifth selector is connected with the fifth buffer amplifier, and the output end of the fifth buffer amplifier is connected with the second fine tuning unit;
the fifth register is used for receiving a fifth register signal and controlling the fifth selector to select voltage according to the fifth register signal; the fifth buffer amplifier is used for outputting a second reference high level to the second fine tuning unit according to the voltage selected by the fifth selector after receiving the second signal;
the fourth reference subunit comprises a sixth selector, a sixth register and a sixth buffer amplifier, wherein the control end of the sixth selector is connected with the sixth register, and the channel of the sixth selector is connected with the connection point of every two sixth resistors; the output end of the sixth selector is connected with the sixth buffer amplifier, and the output end of the sixth buffer amplifier is connected with the sixth fine tuning unit;
the sixth register is used for receiving a sixth register signal and controlling the sixth selector to select voltage according to the sixth register signal; and the sixth buffer amplifier is used for outputting a second reference low level to the second fine tuning unit according to the voltage selected by the sixth selector after receiving the second signal.
9. A display device characterized by comprising the gamma voltage generation circuit according to any one of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110943098.4A CN113672023A (en) | 2021-08-17 | 2021-08-17 | Gamma voltage generation circuit and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110943098.4A CN113672023A (en) | 2021-08-17 | 2021-08-17 | Gamma voltage generation circuit and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113672023A true CN113672023A (en) | 2021-11-19 |
Family
ID=78543288
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110943098.4A Pending CN113672023A (en) | 2021-08-17 | 2021-08-17 | Gamma voltage generation circuit and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113672023A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114267280A (en) * | 2021-12-24 | 2022-04-01 | 绵阳惠科光电科技有限公司 | Gamma voltage generating circuit and display device |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1632848A (en) * | 2001-06-07 | 2005-06-29 | 株式会社日立制作所 | Display device and drive circuit for displaying |
| CN1797531A (en) * | 2004-12-28 | 2006-07-05 | 三星电子株式会社 | Gamma voltage generating apparatus and method of testing a gamma voltage |
| US20070188430A1 (en) * | 2006-02-14 | 2007-08-16 | Samsung Electronics Co., Ltd. | Gamma-reference-voltage generating circuit and apparatus for generating gamma-voltages and display device having the circuit |
| CN103050101A (en) * | 2011-10-11 | 2013-04-17 | 乐金显示有限公司 | Liquid crystal display device and method for driving the same |
| US20130271507A1 (en) * | 2012-04-13 | 2013-10-17 | Samsung Electronics Co., Ltd. | Gradation voltage generator and display driving apparatus |
| CN104575415A (en) * | 2013-10-18 | 2015-04-29 | 辛纳普蒂克斯显像装置株式会社 | Display device and display driver |
| CN109658896A (en) * | 2019-02-25 | 2019-04-19 | 京东方科技集团股份有限公司 | A kind of gamma electric voltage generative circuit, driving circuit and display device |
| CN110299096A (en) * | 2018-03-21 | 2019-10-01 | 三星电子株式会社 | Gamma adjustment circuitry and the display driving circuit for using gamma adjustment circuitry |
| CN113053282A (en) * | 2019-12-26 | 2021-06-29 | 乐金显示有限公司 | Foldable display device |
-
2021
- 2021-08-17 CN CN202110943098.4A patent/CN113672023A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1632848A (en) * | 2001-06-07 | 2005-06-29 | 株式会社日立制作所 | Display device and drive circuit for displaying |
| CN1797531A (en) * | 2004-12-28 | 2006-07-05 | 三星电子株式会社 | Gamma voltage generating apparatus and method of testing a gamma voltage |
| US20070188430A1 (en) * | 2006-02-14 | 2007-08-16 | Samsung Electronics Co., Ltd. | Gamma-reference-voltage generating circuit and apparatus for generating gamma-voltages and display device having the circuit |
| CN103050101A (en) * | 2011-10-11 | 2013-04-17 | 乐金显示有限公司 | Liquid crystal display device and method for driving the same |
| US20130271507A1 (en) * | 2012-04-13 | 2013-10-17 | Samsung Electronics Co., Ltd. | Gradation voltage generator and display driving apparatus |
| CN104575415A (en) * | 2013-10-18 | 2015-04-29 | 辛纳普蒂克斯显像装置株式会社 | Display device and display driver |
| CN110299096A (en) * | 2018-03-21 | 2019-10-01 | 三星电子株式会社 | Gamma adjustment circuitry and the display driving circuit for using gamma adjustment circuitry |
| CN109658896A (en) * | 2019-02-25 | 2019-04-19 | 京东方科技集团股份有限公司 | A kind of gamma electric voltage generative circuit, driving circuit and display device |
| CN113053282A (en) * | 2019-12-26 | 2021-06-29 | 乐金显示有限公司 | Foldable display device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114267280A (en) * | 2021-12-24 | 2022-04-01 | 绵阳惠科光电科技有限公司 | Gamma voltage generating circuit and display device |
| CN114267280B (en) * | 2021-12-24 | 2023-10-13 | 绵阳惠科光电科技有限公司 | Gamma voltage generation circuit and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100553279B1 (en) | Gamma correcting circuit and panel drive apparatus equipped with gamma correcting circuit | |
| US20080079683A1 (en) | Display device, driver circuit therefor, and method of driving same | |
| CN109658896B (en) | Gamma voltage generation circuit, driving circuit and display device | |
| CN101369803B (en) | Differential amplifier circuit and drive circuit of liquid crystal display unit using the same | |
| JP4367308B2 (en) | Display driver, electro-optical device, electronic apparatus, and gamma correction method | |
| US8089438B2 (en) | Data line driver circuit for display panel and method of testing the same | |
| JP2002366115A (en) | Liquid crystal driving device | |
| KR20090068342A (en) | Reducing power consumption associated with high bias currents in systems that drive or otherwise control displays | |
| US8242992B2 (en) | Driving apparatus and driving method thereof | |
| US20040075633A1 (en) | Electronic circuit and liquid crystal display apparatus including same | |
| CN113672023A (en) | Gamma voltage generation circuit and display device | |
| CN109841188B (en) | Display driver and semiconductor device | |
| JP4118355B2 (en) | Auto-calibrated digital / analog converter for video display | |
| CN105609038B (en) | A kind of compensation method of drive signal, compensation circuit and display panel | |
| JP2005063147A (en) | Voltage generating circuit and method | |
| CN116110329A (en) | VF detection compensation circuit, driving chip and display device | |
| US20090219307A1 (en) | Lcd driver circuit | |
| CN114596803A (en) | Pixel sensing circuit and pixel sensing method | |
| KR20090105148A (en) | Display apparatus | |
| CN217902701U (en) | Binding voltage generation circuit, display panel and display device | |
| US20200184917A1 (en) | Display driver, electro-optical device, and electronic apparatus | |
| JP4046617B2 (en) | Organic EL drive circuit and organic EL display device using the same | |
| KR100508038B1 (en) | Driving circuit for liquid crystal display device to adjust gradation voltage | |
| KR20100110608A (en) | Apparatus for driving display | |
| EP3297168A1 (en) | Digital-to-analog converter circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20211119 |