KR20100110608A - Apparatus for driving display - Google Patents

Abstract

PURPOSE: An apparatus for driving display is provided to improve the temperature of heat generated in the device by reducing a driving current. CONSTITUTION: A first liquid driving part(200) amplifies a first input signal to a first output signal. The first output signal has the level which is variable between first voltage and common voltage. A second liquid driving part(300) amplifies a second input signal to a second output signal. The second output signal has a level which is variable between second voltage and the common voltage. A common voltage generation part(100) generates the common voltage.

Description

Display driving device {Apparatus for driving display}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display, and more particularly, to a display driving apparatus including a source driver for driving a liquid crystal display (LCD).

In general, liquid crystal display (hereinafter, referred to as LCD) driving chips (LDI: LCD Driver ICs) come in various forms, ranging from small for mobile phones to large for monitor televisions. An example of a structure for a liquid crystal display is disclosed in US Pat. No. US7292217. The LCD disclosed herein is composed of a thin film transistor (not shown), a source driver (not shown), and a gate driver (not shown). LCDs use thin film transistors as switches. The gate driver outputs a signal for turning on the thin film transistor, the source driver outputs image data to the liquid crystal, and the liquid crystal changes its state according to the image data.

1 is a schematic block diagram of a general source driver, which includes a shift register 10, a latch 12, a level shifter 14, and a digital-to-analog converter (DAC). to Analog Converter) 16 and output buffer 20. The shift register 10 sequentially writes digital image data to the latch 12, and when the image data stored in the latch 12 is sufficient to display a horizontal line, the latch 12 moves the image to the level shifter 204. Output the data. The level shifter 14 changes the voltage level of the digital image data and outputs the image data to the DAC 16. The DAC 16 receives the digital image data, converts it into analog image data, and outputs the converted result to the output buffer 20. The output buffer 20 writes the image data OUT_1 to OUT_N on the liquid crystal. For this purpose, the output buffer 20 consists of a drive buffer 22 and an output switch 24. The drive buffer 22 is implemented with unit-gain and negative feedback operational amplifiers (not shown).

In order to prevent the liquid crystal from receiving the ionic effect, the polarity of the plurality of voltage signals applied to the liquid crystal must continuously change. Thus, some of the drive devices, such as the DAC 16 and the output buffer 20, are classified into positive and negative forms.

FIG. 2 is a general circuit diagram of a part of the drive buffer 22 shown in FIG. 1, and is composed of an odd channel buffer section 22A and an even channel buffer section 22B.

Each buffer section 22A and 22B has a preceding amplifier section 30 and 32 and transistors PDR and NDR at the output stage. In addition, each of the buffer sections 22A and 22B is provided with a supply voltage VDD and a ground voltage, respectively, and load resistors RL1 and RL2 and load capacitors CL1 and CL2 are provided at respective output sides thereof. ) Is connected. The preceding amplifier 30 amplifies the positive signal input through the input terminal IN1 and outputs the amplified result OUT_n, and the preceding amplifier 32 receives the negative signal input through the input terminal IN2. Amplify the signal and output the amplified result (OUT_n + 1).

FIG. 3 shows a waveform diagram of the voltage output from the drive buffer 22 shown in FIG.

2 and 3, since the charging currents ① and ④ are supplied from the supply voltage VDD and the discharge currents ② and ③ are discharged directly toward the ground voltage, the charge stored in the load capacitor CL1 is recycled. Can not. Recently, the liquid crystal panel has been miniaturized, multi-channel, high integration, and light weight. On the contrary, as the liquid crystal panel is increasingly high resolution, high speed, and large, the dynamic current consumption of the driving device is unnecessarily increased, resulting in high temperature of the integrated circuit. The problem of reliability may occur.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a display driving apparatus in which a heat generation temperature is improved while reducing dynamic current consumed to drive a low power liquid crystal display.

In order to achieve the above object, the display driving apparatus according to the present invention comprising at least one source driver, amplifies the first input signal into a first output signal having a level that varies between the first supply voltage and the common voltage and outputs the first input signal. A first liquid crystal driver configured to amplify and output a second input signal with a second output signal having a level varying between a second supply voltage having a lower level than the first supply voltage and the common voltage; And a common voltage generator for generating the common voltage.

Since the display driving apparatus according to the present invention generates the first and second output signals for driving the source using a common voltage, the display driving apparatus does not need to supply the supply voltage VDD for each liquid crystal driving unit and can recycle electric charges. It can reduce the consumption of dyanmic current by about 50% compared to this, which can reduce the chip temperature by about 50%, eliminating the need for additional devices to reduce heat generation during operation, and thermal damage. In terms of reliability,

Since the common voltage (VCR) can be shared by all source drivers, it is possible to overcome the deterioration of the image quality, which may be caused by different levels of the common voltage (VCR) due to the offset of each source driver,

Stabilization capacitors can be shared and used by all source drives, further reducing the size of the driver IC to facilitate integration.

By allowing all components of the source driver to be embedded, it is possible to solve the problem of cost increase due to the addition of a separate external circuit.

Hereinafter, the configuration and operation of a display driving apparatus according to an embodiment of the present invention will be described with reference to the accompanying drawings.

4 is a block diagram of a display driving apparatus according to the present invention.

The display driving apparatus illustrated in FIG. 4 includes a common voltage generator 100, first and second liquid crystal drivers 200 and 300, and an output switch 400.

In general, the display driving apparatus includes at least one source driver (not shown). The display driving apparatus shown in FIG. 4 is a kind of source driver that performs the role of the driving buffer 22 and the output switch 24 shown in FIG. That is, the common voltage generator 100, the first and second liquid crystal drivers 200 and 300 serve as the driving buffer 22 shown in FIG. 1, and the output switch 400 is shown in FIG. 1. Plays the same role as the output switch 24. However, the display driving apparatus according to the present invention is not limited to the structure of the general source driver shown in FIG. That is, although the shift register 10, the latch 12, and the level shifter 14 illustrated in FIG. 1 may be implemented in other forms, the display driving apparatus according to the present invention may be applied.

First, the common voltage generator 100 generates a common voltage VCR, and outputs the generated common voltage VCR to the first and second liquid crystal drivers 200 and 300, and also to the outside. have. In addition, the common voltage generator 100 may compensate for the shortage of the current flowing from the first liquid crystal driver 200 to the second liquid crystal driver 300 or store the surplus amount.

According to the present invention, the level of the common voltage VCR may be expressed by Equation 1 below.

Here, VSS ≦ α ≦ VDD, VDD means a first supply voltage, and VSS means a second supply voltage having a level lower than the first supply voltage.

The first liquid crystal driver 200 amplifies and outputs the first input signal IN_n into a first output signal having a level varying between the first supply voltage VDD and the common voltage VCR. Where 1 ≦ n ≦ N. The second liquid crystal driver 300 amplifies and outputs the second input signal IN_n + 1 as a second output signal having a level varying between the second supply voltage VSS and the common voltage VCR. The first output signal generated by the first liquid crystal driver 200 serves to drive an odd channel of the liquid crystal, and the second output signal generated by the second liquid crystal driver 300 is even of the liquid crystal. It acts to drive the channel.

According to the present invention, the first and second input signals IN_n and IN_n + 1 are output from the DAC 16 shown in FIG. 1, and the first input signal IN_n is a positive gray signal. The second input signal IN_n + 1 may be a negative gray signal.

The output switch 400 is switched in response to the switching control signal S to alternately select the first and second output signals output from the first and second liquid crystal drivers 200 and 300, thereby providing a first switch. The output signal and the second output signal are alternately output (OUT_n and OUT_n + 1) to the first and second output terminals O1 and O2.

Here, the output signals OUT_n and OUT_n + 1 may drive the source of the display in a column inversion method or an N dot inversion method.

Hereinafter, preferred embodiments according to the present invention of each of the parts 100, 200, 300, and 400 shown in FIG. 4 will be described as follows.

FIG. 5 is a circuit diagram illustrating an embodiment of a display driving apparatus according to the present invention shown in FIG. 4.

First, the common voltage generator 100 may include a reference voltage generator 110, a voltage regulator and an analog buffer 120, and at least one stabilizing capacitor SC1 to SCM. Here, M is a positive integer of 1 or more. In FIG. 5, it is assumed that M = 2, but the present invention is not limited thereto.

The reference voltage generator 110 generates a reference voltage VREF having an arbitrary level between the first supply voltage VDD and the second supply voltage VSS, and converts the generated reference voltage VREF into a voltage regulator. And outputs to the analog buffer 120. To this end, the reference voltage generator 110 may be implemented as a general bandgap reference voltage generator (not shown).

The voltage regulator and the analog buffer 120 generate a common voltage VCR from the reference voltage output from the reference voltage generator 110. For example, the voltage regulator and the analog buffer 120 may be implemented as a low drop voltage (LDO) regulator (not shown) and an analog buffer (not shown) to generate an internal constant voltage.

In the driving apparatus according to the present invention described above, as long as a common voltage is generated and the generated common voltage is provided to the first and second liquid crystal drivers 200 and 300, the first and second liquid crystal drivers 200 and 300 may be used. The output switch 400 and the load stage 500 may have a form different from that shown in FIG. 5.

Hereinafter, the reference voltage generator 110 and the voltage regulator and the analog buffer 120 according to the exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

6 is a block diagram illustrating a reference voltage generator 110A, a voltage regulator, and an analog buffer 120 according to an embodiment of the present invention.

As shown in FIG. 6, the reference voltage generator 110 may be implemented by only the voltage divider 110A. The voltage divider 110A has a plurality of resistors (not shown) connected between the first supply voltage VDD and the second supply voltage VSS, and the plurality of different levels of the first supply voltage VDD are different from each other. And divides one of the divided voltages into the voltage regulator and the analog buffer 120 as a reference voltage. In this case, the voltage regulator and the analog buffer 120 may be implemented as one voltage regulator and the analog buffer 122 as shown in FIG. 5, and as illustrated in FIG. 6, the voltage regulator and the analog buffer ( 122A and 122B).

7 is a block diagram of the reference voltage generator 110B according to another embodiment of the present invention, and includes a voltage divider 112 and a voltage selector 114.

The voltage divider 112 has a plurality of resistors connected between the first supply voltage VDD and the second supply voltage VSS, divides the first supply voltage VDD into a plurality of different levels, and divides the voltage. The result is output to the voltage selector 114.

The voltage divider 110A or 112 illustrated in FIG. 6 or 7 may adjust the level of the first supply voltage VDD to a plurality of levels by using a plurality of resistors connected in parallel or in series, or in combination with the parallel and series. It can be divided. Here, as a plurality of resistors, a gamma correction resistor array (not shown) embedded in an integrated circuit of a conventional source driving device may be used. Here, since the gamma correction resistor array is generally a device embedded in a source driving integrated circuit, a detailed description thereof will be omitted.

The voltage selector 114 selects one of the voltages divided by the voltage divider 112 in response to the selection signal SD, and selects the selected result as a reference voltage through the output terminal OUTX as the reference voltage regulator and the analog buffer 120. ) Here, the selection signal SD may be generated from a timing controller (not shown), may be given from the outside of the display, or may have a form of any i (where i is a positive integer) bit.

Meanwhile, referring to FIG. 5, each of the stabilizing capacitors SC1 and SC2 is connected between the common voltage VCR and the second supply voltage VSS. The common voltage generator 100 uses the stabilizing capacitors SC1 and SC2 when the amount of current to flow from the first liquid crystal driver 200 to the second liquid crystal driver 300 is insufficient. Serves to supply 300. In addition, by using the stabilizing capacitors SC1 and SC2, the common voltage generator 100 is left in excess when the current to flow from the first liquid crystal driver 200 to the second liquid crystal driver 300 is not short. You can also save it.

According to the present invention, as shown in FIG. 4, the common voltage generator 100 may be enabled or disabled in response to an enable signal EN generated from a timing controller (not shown) or given from outside of the display. Can be. For example, the voltage regulator and the analog buffer 120 shown in FIG. 4 or 5 may be enabled in response to the enable signal EN. When the voltage regulator and the analog buffer 120 are disabled, the common voltage VCR does not occur.

As shown in FIG. 5, the first liquid crystal driver 200 may be implemented as a first preceding amplifier 202 and a first output terminal.

The first preceding amplifier 202 amplifies the first input signal IN_n received from the DAC 16 and outputs the amplified result to the first output terminal. The first output terminal is connected between the first supply voltage VDD and the common voltage VCR, and outputs the result amplified by the first preceding amplifier 202 as the first output signal OUT_n. To this end, the first output terminal may be implemented with a PMOS transistor M1 and an NMOS transistor M2.

Similarly, the second preceding amplifier 302 amplifies the second input signal IN_n + 1 received from the DAC 16 and outputs the amplified result to the second output terminal. The second output terminal is connected between the common voltage VCR and the second supply voltage VSS to output the result amplified by the second preceding amplifier 302 as the second output signal OUT_n + 1. To this end, the second output terminal may be implemented with a PMOS transistor M3 and an NMOS transistor M4.

Meanwhile, the output switch 400 may be implemented with the first and second switches 402 and 404. The first switch 402 selectively selects the first output signal OUT_n and the second output signal OUT_n + 1 coming into the first terminal 1 and the second terminal 2 in response to the switching control signal S1. To the first output terminal O1. The second switch 404 selectively selects the first output signal OUT_n and the second output signal OUT_n + 1 coming into the first terminal 1 and the second terminal 2 in response to the switching control signal S2. To the second output terminal O2.

Here, the switching control signals S1 and S2 may be generated from a timing controller (not shown), and S2 may take an inverted form of S1.

The display driving apparatus according to the present invention may further include a load stage 500. The load terminal 500 may include a first load resistor RL1 and a first load capacitor CL1 and a second output terminal O2 connected in series between the first output terminal O1 and the second supply voltage VSS. The second load resistor RL2 and the second load capacitor CL2 are connected in series between the second supply voltage VSS.

Hereinafter, the common voltage generator 100 shown in FIG. 5 has only the stabilization capacitor SC1 among the stabilization capacitors SC1 and SC2, and the first switch 402 shown in FIG. 5 is the first terminal 1. Assuming that the second switch 404 is connected to the second terminal 2, the operation of the display driving apparatus according to the present invention having the above-described configuration will be described as follows with reference to the accompanying drawings.

8 is a circuit diagram illustrating a first operation example of the driving apparatus illustrated in FIG. 5, and FIG. 9 is a waveform diagram of signals output from the driving apparatus illustrated in FIG. 8.

The first operation example will be described with reference to FIGS. 8 and 9.

In the first section shown in FIG. 9, a current flows from the first supply voltage VDD to the first load capacitor CL1 in the direction of the arrow ① so that charge is charged in the first load capacitor CL1. At the same time, the charges charged in the second load capacitor CL2 are discharged in the arrow direction ③ in the first section.

Subsequently, the charges charged in the first load capacitor CL1 are discharged toward the transistors M2 in the arrow direction ② in the second section, and the discharged charges are discharged in the second direction in the arrow direction ④ via the transistor M3. The load capacitor CL2 is charged. Therefore, it can be seen that the charge stored in the first load capacitor CL1 is charged and recycled to the second load capacitor CL2 through the paths of the arrows (2) and (4). In this case, when the amount of charge charged in the second load capacitor CL2 is insufficient, the amount of insufficient charge is supplied from the voltage regulator and the analog buffer 122.

FIG. 10 is a circuit diagram illustrating a second operation example of the driving apparatus illustrated in FIG. 5, and FIG. 11 is a waveform diagram of signals output from the driving apparatus illustrated in FIG. 10.

The second operation example will be described with reference to FIGS. 10 and 11 as follows.

In the second section shown in FIG. 11, a current flows from the first supply voltage VDD to the first load capacitor CL1 in the direction of the arrow ② to charge the first load capacitor CL1. At the same time, the charge charged in the stabilizing capacitor SC1 is discharged in the direction of the arrow ④ in the second section and then charged in the second load capacitor CL2 via the transistor M3. Thereafter, the charge charged in the first load capacitor CL1 is discharged in the direction of the arrow ① toward the stabilizing capacitor SC1 through the transistors M2 in the first section, and simultaneously charged in the second load capacitor CL2. The charged electric charges are discharged in the arrow direction ③ via the transistor M4. In this case, when the amount of charge charged in the second load capacitor CL2 is insufficient, the amount of insufficient charge is supplied from the voltage regulator and the analog buffer 122.

Therefore, the charge stored in the first load capacitor CL1 is charged and recycled to the stabilizing capacitor SC1 through the path of the arrow direction ①, and the charge stored in the stabilizing capacitor SC1 is thus stored in the arrow direction ④. It can be seen that the second load capacitor CL2 is charged and recycled through the path.

As shown in FIG. 9 or 11, the display driving apparatus described above reduces the current consumption in different forms according to the types of the first and second output signals OUT_n and OUT_n + 1. If the voltage regulator and the analog buffer 122 generate a common voltage VCR having a level of VDD / 2 using the voltage input through the input terminal IN3, the present invention shown in FIGS. The current consumption reduction efficiency of the driving device may be expressed as shown in Table 1 below.

division Charge current Discharge current Charge recycling path Current consumption reduction efficiency First operation example ①④ ②③ ②④ 50% Second operation example ②④ ①③ ①④ 50%

FIG. 12 is a schematic block diagram illustrating a wiring structure of a display including a display driving apparatus according to the present invention, and includes a liquid crystal panel 600, a source printed circuit board 700, and FIG. 4. Or a driving device as shown in FIG. 5, that is, a source driver 800. Here, the voltage divider 110A, the voltage regulator, and the analog buffer 120 shown in FIG. 6 may be formed in the source PCB 700.

According to the present invention, the common voltages VCRs generated by the common voltage generator 100 of each of the plurality of source drivers 800 included in the display may be connected to each other. That is, the display driving apparatus according to the present invention has a wiring structure such that the common voltages VCRs generated by the common voltage generators of the plurality of source drivers 800 are connected to each other.

 As such, when the common voltages VCR are not connected to each other, the common voltages VCRs generated in the source drivers 800 may be different from each other by a unique offset of each source driver 800. However, according to the present invention, since the common voltages VCR generated in all the source drivers 800 are connected to each other, the same common voltage VCR may be used in the source drivers 800. For this reason, deterioration of the image quality which arises due to an offset difference can be prevented.

In addition, one of the stabilization capacitors SC1 to SCM SCm (where m is 1 ≦ m ≦ M) included in the common voltage generator 100 may be shared by all source drivers 800. . In this case, when the driving device is integrated as described below, since the stabilization capacitor SCm is external, the plurality of source drivers 800 included in the display may share the stabilization capacitor SCm. Thus, the integrated size of each drive device can be reduced.

FIG. 13 illustrates an appearance in which the display driving apparatus according to the present invention described above is configured with an integrated circuit (IC) 1000.

Referring to FIG. 13, the IC of the display driving apparatus may have various pins 1111 to 1120. The first supply voltage VDD is supplied through pin 1112, the second supply voltage VSS is supplied through pin 1120, and the first and second output signals V1 through the pins 1114 and 1118. OUT_n and OUT_n + 1 may be respectively output, and the common voltage VCR may be output through the pin 1116. In addition, the signals EN, IN_n, IN_n + 1, S1, and S2 input to the driving device illustrated in FIG. 4 or 5 may be received through the pin 111.

Meanwhile, the display driving apparatus according to the present invention described above may be integrated in various forms.

According to an embodiment of the present invention, both the first and second liquid crystal drivers 200 and 300 and the common voltage generator 100 illustrated in FIG. 4 or 5 may be implemented as integrated circuits.

According to another exemplary embodiment of the present invention, only a part of the first and second liquid crystal drivers 200 and 300 and the common voltage generator 100 may be implemented as an integrated circuit.

For example, in the common voltage generator 100 illustrated in FIG. 4 or 5, the reference voltage generator 110 may be provided outside of the driving device IC 1000, but may be provided externally, and may include a voltage regulator or an analog buffer ( 120 and 122 may be included in the IC 1000. If the reference voltage generator 110 is provided outside the driving device IC 1000, all the source drivers 800 may share the reference voltage generated by the reference voltage generator 110 provided outside. have.

In addition, at least one of the stabilizing capacitors SC1 to SCM may be provided outside the driving device IC 1000. For example, all of the stabilizing capacitors SC1 to SCM are included in the interior of the IC 1000, are provided externally, or some of the stabilizing capacitors SC1 to SCM are located outside the IC 1000. The other part SC2 may be included in the IC 1000. As such, an external stabilization capacitor may be connected to the voltage regulator and the analog buffers 120 and 122 through the pin 1116 of the IC 1000.

The present invention described above is not limited to the above-described embodiment and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

1 is a schematic block diagram of a general source driver.

FIG. 2 is a general circuit diagram of a portion of the driving buffer shown in FIG. 1.

3 is a waveform diagram of a voltage output from the driving buffer shown in FIG. 2.

4 is a block diagram of a display driving apparatus according to the present invention.

FIG. 5 is a circuit diagram illustrating an embodiment of a display driving apparatus according to the present invention shown in FIG. 4.

6 is a block diagram illustrating a reference voltage generator, a voltage regulator, and an analog buffer according to an embodiment of the present invention.

7 is a block diagram of a reference voltage generator according to another exemplary embodiment of the present invention.

FIG. 8 is a circuit diagram for describing a first operation example of the driving apparatus illustrated in FIG. 5.

9 is a waveform diagram of a signal output from the driving apparatus shown in FIG. 8.

FIG. 10 is a circuit diagram for describing a second operation example of the driving apparatus illustrated in FIG. 5.

FIG. 11 shows a waveform diagram of a signal output from the driving device shown in FIG. 10.

12 is a schematic block diagram illustrating a wiring structure of a display including a display driving apparatus according to the present invention.

Fig. 13 shows an appearance in which the display driving apparatus according to the present invention described above is formed of an integrated circuit.

DESCRIPTION OF THE REFERENCE NUMERALS

100: common voltage generator 110: reference voltage generator

110A, 112: voltage divider 114: voltage selector

120, 122A, 122B: Voltage Regulators and Analog Buffers

200: first liquid crystal driver 300: second liquid crystal driver

400: output switch 500: load stage

Claims (22)

A display driving apparatus including at least one source driver, A first liquid crystal driver for amplifying and outputting a first input signal into a first output signal having a level varying between the first supply voltage and the common voltage; A second liquid crystal driver for amplifying and outputting a second input signal with a second output signal having a level varying between a second supply voltage having a level lower than the first supply voltage and the common voltage; And And a common voltage generator configured to generate the common voltage. The method of claim 1, wherein the common voltage generator The display driving device of claim 1, wherein the amount of the current flowing from the first liquid crystal driver to the second liquid crystal driver is compensated for, or the surplus is stored. The method of claim 2, wherein the common voltage generator A reference voltage generator configured to generate a reference voltage having an arbitrary level between the first supply voltage and the second supply voltage; And And at least one voltage regulator or analog buffer for generating said common voltage from said reference voltage. The method of claim 3, wherein the common voltage generator And at least one stabilizing capacitor connected between the common voltage and the second supply voltage to supply the shortage or store the surplus. The method of claim 3, wherein the reference voltage generator A voltage having a plurality of resistors connected between the first supply voltage and the second supply voltage, dividing the first supply voltage to a plurality of different levels, and outputting one of the divided voltages as the reference voltage; And a distribution unit. The method of claim 3, wherein the reference voltage generator A voltage divider having a plurality of resistors connected between the first supply voltage and the second supply voltage and dividing the first supply voltage into a plurality of different levels to output the divided voltages; And And a voltage selector which selects one of the divided voltages in response to a selection signal and outputs the selected result as the reference voltage. The liquid crystal display of claim 1, wherein the first liquid crystal driver A first preceding amplifier for amplifying the first input signal; And And a first output terminal connected between the first supply voltage and the common voltage and outputting a result amplified by the first preceding amplifier as the first output signal. The liquid crystal display of claim 1, wherein the second liquid crystal driver A second preceding amplifier for amplifying the second input signal; And And a second output terminal connected between the common voltage and the second supply voltage and outputting the result amplified by the second preceding amplifier as the second output signal. The display apparatus of claim 1, wherein the display driving device is And an output switch configured to alternately output the first output signal and the second output signal generated from the first and second liquid crystal drivers to the first and second output terminals, respectively, in response to a switching control signal. Display driving apparatus, characterized in that. The display apparatus of claim 9, wherein the display driving device is A first load resistor and a first load capacitor connected in series between the first output terminal and the second supply voltage; And And a second load resistor and a second load capacitor connected in series between the second output terminal and the second supply voltage. The display driving apparatus of claim 1, wherein the display driving apparatus has a wiring structure such that the common voltages generated by the common voltage generator of each of the plurality of source drivers are connected to each other. The display driving apparatus of claim 1, wherein the common voltage has a level as follows.

(VCR represents the common voltage, VDD represents the first supply voltage, VSS ≦ α ≦ VDD, and VSS represents the second supply voltage, respectively.) The method according to any one of claims 1 to 10, And a portion of the first and second liquid crystal drivers and the common voltage generator are implemented as integrated circuits. The display driving apparatus of claim 13, wherein the reference voltage generator is provided outside the integrated circuit and the voltage regulator or the analog buffer is included inside the integrated circuit. The display driving apparatus of claim 13, wherein the stabilizing capacitor is included inside or outside the integrated circuit. The display driving apparatus of claim 13, wherein a part of the stabilizing capacitor is provided outside the integrated circuit, and the other part of the stabilizing capacitor is included inside the integrated circuit. The display driving apparatus of claim 4, wherein each of the plurality of source drivers included in the display shares the stabilizing capacitor. The display driving apparatus of claim 1, wherein the first and second output signals drive a source of the display in a column inverting manner. The display driving apparatus of claim 1, wherein the first and second output signals drive a source of the display in an N dot inversion scheme. The display driving apparatus of claim 1, wherein the first input signal is a positive gray signal, and the second input signal is a negative gray signal. The display driving apparatus of claim 1, wherein the common voltage generator is enabled in response to an enable signal. 4. The display driving apparatus of claim 3, wherein the voltage regulator and the analog buffer are enabled in response to an enable signal.

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