CN217902421U

CN217902421U - Data computing system and server with built-in data computing system

Info

Publication number: CN217902421U
Application number: CN202221399822.8U
Authority: CN
Inventors: 杨文娟
Original assignee: Ziguang Hengyue Technology Co ltd
Current assignee: Ziguang Hengyue Technology Co ltd
Priority date: 2022-06-07
Filing date: 2022-06-07
Publication date: 2022-11-25
Anticipated expiration: 2032-06-07

Abstract

The utility model provides a data computing system and built-in this system's server, the system includes central processing unit 1, central processing unit 2, central processing unit 3, central processing unit 4, BMC management controller 1, BMC management controller 2, CPLD programmable logic device 1 and CPLD programmable logic device 2, central processing unit 1 passes through the GMI interface and is connected with central processing unit 2, central processing unit 3 and central processing unit 4, central processing unit 2 passes through the GMI interface and is connected with central processing unit 3 and central processing unit 4, central processing unit 3 passes through the GMI interface and is connected with central processing unit 4. The utility model discloses the server that records has following advantage: 1. the system is more stable and safe; 2. the running speed is higher, and the performance is obviously improved; 3. the system is localized, safe and controllable; 4. the configuration is flexible, and is more practical and convenient.

Description

Data computing system and server with built-in data computing system

Technical Field

The utility model belongs to data calculation processing field, concretely relates to data computing system and built-in this system's server.

Background

A server is one of computers that runs faster, is more heavily loaded, and is more expensive than a regular computer. The server provides calculation or application services for other clients (such as terminals like PC, smart phone, ATM and the like and even large equipment like train system and the like) in the network. The server has high-speed CPU computing capability, long-time reliable operation, strong I/O external data throughput capability and better expansibility. With the wide application of cloud computing, higher requirements are put forward on the operation speed, stability, safety and domestic safety controllability of the server.

The utility model provides a data computing system and built-in this data computing system's server, the server system contains 2 BMC supervisory control wares and 2 CPLD programmable logic devices, makes BMC supervisory control ware and CPLD programmable logic device have the backup, and the system can be more stable and safe; the system comprises 4 paths of servers, and CPUs are in work division and cooperation, so that the running speed is higher, and the performance is improved remarkably; the system is localized, safe and controllable; the configuration is flexible, the corresponding configuration can be freely selected, various combinations are realized, and the use is more practical and convenient.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a data computing system and built-in this data computing system's server aims at satisfying the information security requirement, the controllable server of homemade safety.

In order to realize the above object, the utility model provides a data computing system, the system includes central processing unit 1, central processing unit 2, central processing unit 3, central processing unit 4, BMC management controller 1, BMC management controller 2, CPLD programmable logic device 1 and CPLD programmable logic device 2, central processing unit 1 passes through the GMI interface and is connected with central processing unit 2, central processing unit 3 and central processing unit 4, central processing unit 2 passes through the GMI interface and is connected with central processing unit 3 and central processing unit 4, central processing unit 3 passes through the GMI interface and is connected with central processing unit 4.

Further, central processing unit 1 passes through EMMC interface and DDR4 memory bank slot connection, central processing unit 1 passes through the USB interface and is connected with USB3.0 management mouth, central processing unit 2 passes through the EMMC interface and is connected with DDR4 memory bank slot connection, central processing unit 2 passes through the USB interface and is connected with USB3.0 management mouth, central processing unit 3 passes through the EMMC interface and is connected with DDR4 memory bank slot connection, central processing unit 3 passes through PCle bus interface and is connected with SATA equipment management mouth, central processing unit 4 passes through the EMMC interface and is connected with DDR4 memory bank slot connection, central processing unit 4 passes through PCle bus interface and M.2 equipment interface connection.

Further, the central processing unit 1 is connected to the BMC management controller 1 through an I2C interface and a PCle bus interface, and the central processing unit 2 is connected to the BMC management controller 2 through an I2C interface and a PCle bus interface.

Further, the BMC management controller 1 is connected with the VGA interface 1 through a VGA conversion circuit, the BMC management controller 1 is connected with the internet access through an MDI interface, the BMC management controller 1 is connected with the RJ45 serial port through a UART interface, the BMC management controller 2 is connected with the VGA interface 2 through a VGA conversion circuit, the BMC management controller 2 is connected with the internet access through an MDI interface, and the BMC management controller 2 is connected with the RJ45 serial port through a UART interface.

Furthermore, the CPLD programmable logic device 1 is connected with the BMC management controller 1 through a Local bus interface and a JTAG interface, and the CPLD programmable logic device 2 is connected with the BMC management controller 2 through a Local bus interface and a JTAG interface.

Furthermore, the CPLD programmable logic device 1 and the CPLD programmable logic device 2 are both connected with a system indicator light and a fan through a lighting interface and an I2C interface.

Further, the central processing unit 2 is connected with a RAID card through a PCle bus interface, and the RAID card is connected with a HDD backplane through an SAS interface.

Further, the central processing unit 4 is connected to the PCIE controller 2 through a PCle bus interface, and the PCIE controller 2 is connected to the PCle slot through the PCle interface.

Further, the central processing unit 3 is connected to the PCIE controller 1 through a PCle bus interface, and the PCIE controller 1 is connected to the PCle slot through a PCle interface.

Further, the server includes at least the data computing system of any of the above.

Compared with the prior art, the utility model discloses the server that records has following advantage: 1. the system is more stable and safe; 2. the running speed is higher, and the performance is obviously improved; 3. the system is localized, safe and controllable; 4. the configuration is flexible, and is more practical and convenient.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

Fig. 1 is a logic structure diagram of the present invention.

Detailed Description

The following embodiments of the present invention are provided by way of specific examples, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

Please refer to fig. 1. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the invention in a schematic manner, and only the components related to the invention are shown in the drawings rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, quantity and proportion of the components in actual implementation may be changed at will, and the layout of the components may be more complicated.

As shown in fig. 1, the present embodiment provides the logic structure diagram of the present invention.

The utility model provides a data computing system contains 4 central processing unit, 2 BMC supervisory controller, 2 CPLD programmable logic device. Wherein, the Central Processing Unit (CPU) adopts Intel. The 4 CPUs are connected through GMI bus, and the data exchange rate is unidirectional 100GB/s. The central processing unit is externally configured with 4 groups of 4 EMMC interfaces, and correspondingly supports 16 DDR4 memory bank slots of 4 groups.

The system CPU1 realizes data transmission with the BMC management controller 1 through an I2C bus and a PCIe bus. The USB interface is connected with the USB management port through the USB interface, supports 4 USB3.0 interfaces at most, and is connected with the left and right hangers and 2 USB3.0 interfaces respectively on the left and right of the front panel of the server through the connection extension line.

The system CPU2, similar to the CPU1, also realizes data transmission with the BMC management controller 2 through an I2C bus and a PCIe bus. The USB interface is connected with the USB management port through the USB interface, and supports 4 USB3.0 interfaces at most, except that the USB interface is connected with the rear panel of the server through a connection extension line, and 2 USB3.0 interfaces are arranged at the upper part and the lower part respectively. Meanwhile, the CPU2 provides 1 PCIe x16 slot outwards through a self-contained PCIe bus interface, and supports installation of 1 PCIe x16 Riser card, and 1 RAID card can be installed on the Riser card. 2 SAS interfaces (x 8) on the RAID card are connected with the SAS interface (x 8) on the HDD backboard through an SAS bus, and RAID card service is provided.

The system CPU3 and the system CPU4 are connected with a PCIe controller through a PCIe bus, a PCIe4.0 protocol is adopted, and the bidirectional bandwidth can reach 32GB/S. The PCIe controller of the CPU3 provides 3 PCIe x16 slots outwards, and the PCIe controller of the CPU4 provides 2 PCIe x16 slots and 1 PCIe x8 slot outwards. 1 PCIe x16 slot can be provided with 1 PCIe x16 or 2 PCIe x8 Riser cards. CPU3 provides 4 SATA3.0 device interface slots through PCIe bus, CPU4 provides M.2 device interface slot through PCIe bus. 1 M.2 slot can be connected with 1 M.2 board, and 1 M.2 board can be connected with 2 M.2 hard disks at most.

A BMC management controller in the system provides 1 VGA interface externally through a VGA conversion circuit, the VGA interface is connected with a left suspension loop of a front backboard of a server through an extension line, 1080P resolution is supported to the maximum, and the BMC management controller is connected with a display and can display high-definition pictures. The BMC management controller is connected with the RJ45 serial port through a UART interface, and the RJ45 serial port is mainly used for research and development and internal debugging. The MDI interface of the BMC management controller is connected with an external network port, the external network port comprises a server management network port, and remote control of a webpage of the BMC management controller can be realized by logging in an IP address of the management port.

A Local bus interface and a JTAG interface on a CPLD programmable logic device in the system realize data exchange and connection with a BMC management controller through a Local bus and a JTAG bus respectively. The CPLD programmable logic device comprises a register, can read information such as server startup and state and the like, and transmits the information to the BMC management controller. The lighting interface on the CPLD programmable logic device can be externally connected with the system indicator lamp through the extension line, and the health state of the server is read through the register to feed back to the corresponding system indicator lamp. The I2C interface of the CPLD programmable logic device can externally provide a fan controller, is connected with a fan slot, and the register reads fan information. And feeding back information such as the rotating speed of the fan and the like to the BMC management controller.

The utility model provides a data computing system, the system includes central processing unit 1, central processing unit 2, central processing unit 3, central processing unit 4, BMC management controller 1, BMC management controller 2, CPLD programmable logic device 1 and CPLD programmable logic device 2, central processing unit 1 is connected with central processing unit 2, central processing unit 3 and central processing unit 4 through the GMI interface, central processing unit 2 is connected with central processing unit 3 and central processing unit 4 through the GMI interface, central processing unit 3 is connected with central processing unit 4 through the GMI interface.

Further, central processing unit 1 passes through EMMC interface and DDR4 DRAM slot connection, central processing unit 1 passes through the USB interface and is connected with USB3.0 management mouth, central processing unit 2 passes through the EMMC interface and DDR4 DRAM slot connection, central processing unit 2 passes through the USB interface and is connected with USB3.0 management mouth, central processing unit 3 passes through the EMMC interface and DDR4 DRAM slot connection, central processing unit 3 passes through PCle bus interface and SATA equipment management mouth and is connected, central processing unit 4 passes through the EMMC interface and DDR4 DRAM slot connection, central processing unit 4 passes through PCle bus interface and M.2 equipment interface connection.

Further, the central processing unit 1 is connected with the BMC management controller 1 through an I2C interface and a PCle bus interface, and the central processing unit 2 is connected with the BMC management controller 2 through an I2C interface and a PCle bus interface.

Further, the central processing unit 4 is connected to the PCIE controller 2 through a PCIE bus interface, and the PCIE controller 2 is connected to the PCIE slot through a PCIE interface.

A server is provided comprising at least the data computing system described above. And taking a circuit board inside the server as a carrier. The other hardware configuration of the server is not particularly limited. The utility model provides a relevant necessary hardware structure such as shell, antenna that the server has general server and possesses.

The embodiments described above are only a part of the embodiments of the present invention, and not all of them. The components of embodiments of the present invention, as generally described and illustrated herein and in the figures, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the accompanying drawings, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiments of the present invention, all other changes or substitutions obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention.

Claims

1. A data computing system is characterized by comprising a central processing unit 1, a central processing unit 2, a central processing unit 3, a central processing unit 4, a BMC management controller 1, a BMC management controller 2, a CPLD programmable logic device 1 and a CPLD programmable logic device 2, wherein the central processing unit 1 is connected with the central processing unit 2, the central processing unit 3 and the central processing unit 4 through GMI interfaces, the central processing unit 2 is connected with the central processing unit 3 and the central processing unit 4 through GMI interfaces, and the central processing unit 3 is connected with the central processing unit 4 through GMI interfaces 1.

2. The data computing system of claim 1, wherein the central processing unit 1 is connected to the DDR4 memory bank slot through an EMMC interface, the central processing unit 1 is connected to the USB3.0 management port through a USB interface, the central processing unit 2 is connected to the DDR4 memory bank slot through an EMMC interface, the central processing unit 2 is connected to the USB3.0 management port through a USB interface, the central processing unit 3 is connected to the DDR4 memory bank slot through an EMMC interface, the central processing unit 3 is connected to the SATA device management port through a pci bus interface, the central processing unit 4 is connected to the DDR4 memory bank slot through an EMMC interface, and the central processing unit 4 is connected to the m.2 device interface through a pci bus interface.

3. The data computing system of claim 2, wherein the central processing unit 1 is connected to the BMC management controller 1 through an I2C interface and a PCle bus interface, and the central processing unit 2 is connected to the BMC management controller 2 through an I2C interface and a PCle bus interface.

4. The data computing system of claim 3, wherein the BMC management controller 1 is connected to the VGA interface 1 through a VGA conversion circuit, the BMC management controller 1 is connected to the network interface through an MDI interface, the BMC management controller 1 is connected to the RJ45 serial port through a UART interface, the BMC management controller 2 is connected to the VGA interface 2 through a VGA conversion circuit, the BMC management controller 2 is connected to the network interface through an MDI interface, and the BMC management controller 2 is connected to the RJ45 serial port through a UART interface.

5. The data computing system of claim 4, wherein the CPLD programmable logic device 1 is connected with the BMC management controller 1 through a Local bus interface and a JTAG interface, and the CPLD programmable logic device 2 is connected with the BMC management controller 2 through a Local bus interface and a JTAG interface.

6. The data computing system of claim 5, wherein the CPLD programmable logic device 1 and the CPLD programmable logic device 2 are connected with a system indicator light and a fan through a lighting interface and an I2C interface.

7. The data computing system of claim 6, wherein the central processing unit 2 is connected to the RAID card through a PCle bus interface, and the RAID card is connected to the HDD backplane through an SAS interface.

8. The data computing system of claim 7, wherein the central processing unit 4 is connected to the PCIE controller 2 through a PCIE bus interface, and the PCIE controller 2 is connected to a PCIE slot through a PCIE interface.

9. The data computing system of claim 8, wherein the central processing unit 3 is connected to the PCIE controller 1 through a PCle bus interface, and the PCIE controller 1 is connected to the PCle slot through a PCle interface.

10. A server, characterized in that it comprises at least a data computing system according to any one of claims 1 to 9.