CN217689348U - Intelligent detection device for signal line connectivity - Google Patents
Intelligent detection device for signal line connectivity Download PDFInfo
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- CN217689348U CN217689348U CN202221125953.7U CN202221125953U CN217689348U CN 217689348 U CN217689348 U CN 217689348U CN 202221125953 U CN202221125953 U CN 202221125953U CN 217689348 U CN217689348 U CN 217689348U
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Abstract
The utility model provides a signal line connectivity intellectual detection system device, detection device includes: the single chip microcomputer STM32 and the three-state gate logic circuits are arranged, and the three-state gate logic circuits are in electric signal connection with GPIO pins of the single chip microcomputer STM32; and each tri-state gate logic circuit is connected with one signal line interface corresponding to the electric signal. The beneficial effects of the utility model reside in that: can carry out continuity open circuit/short circuit test to the signal line, through the input or output state that sets up high-speed GPIO pin, detect the connected state of the inside different signal lines of wire rod, can both obtain solving in the twinkling of an eye opening short circuit test short slab and the unable test problems of embedded chip wire rod etc. difficult problem, and the passageway can reach two-way 24 way.
Description
Technical Field
The utility model belongs to the technical field of the signal line detects technique and specifically relates to indicate a signal line connectivity intellectual detection system device.
Background
With the development of power electronic technology, microelectronic technology and modern test theory, various conduction test technologies have been developed rapidly, and due to the increasing market demand, wire conduction test devices have also been widely used. In the wire conduction testing device, in order to ensure the safety of the application of the electrical circuit, whether the wire has a short circuit or an open circuit needs to be tested by a wire conduction tester. The prior art still has the problems of low testing speed, few channels, incapability of detecting transient abnormality, need of testing or verifying the open/short circuit of the wire rod in the production and processing process, poor contact, incapability of detecting the embedded chip wire rod and the like.
SUMMERY OF THE UTILITY MODEL
The utility model discloses the technical problem that will solve is: provided is a signal line connectivity intelligent detection device.
In order to solve the technical problem, the utility model discloses a technical scheme be: an intelligent detection device for signal line connectivity comprises,
the single chip microcomputer STM32;
the three-state gate logic circuits are arranged and are in electrical signal connection with GPIO pins of the single chip microcomputer STM32;
and each tri-state gate logic circuit is connected with one signal line interface corresponding to the electric signal.
Furthermore, the input end and the enabling end of the tristate gate logic circuit are both provided with pull-up circuits.
Further, the internal crystal oscillator frequency of the single chip microcomputer STM32 is 16MHz, and the frequency multiplication is 180MHz.
Furthermore, the output interface electrical signal of singlechip STM32 is connected with two kinds of LED pilot lamps for show the state of the signal line that detects.
Furthermore, the output interface of singlechip STM32 passes through IO extension chip control two kinds of LED pilot lamps.
Furthermore, the output interface electric signal of singlechip STM32 is connected with the buzzer for when the signal line trouble, send the suggestion sound.
The utility model also provides an intelligent detection method of signal line connectivity, which is applied to the intelligent detection device of signal line connectivity, and comprises a broken circuit detection flow and a short circuit detection flow, wherein the broken circuit detection flow comprises,
s11, issuing a test command to the single chip microcomputer STM32 through the upper computer;
s12, opening the tri-state gate logic circuit at the end of the GND corresponding to the signal line of the Lightning line, sending a high level, and enabling the tri-state gate logic circuits of other lines to be in a closed state;
s13, the single chip microcomputer STM32 carries out open circuit test, whether all receiving ends of the single chip microcomputer STM32 receive high levels except the GND corresponding signal line end is judged, if the high levels are received, the Lightning lines are not opened, and if the receiving ends do not receive the high levels, the lines which do not receive the high levels are opened;
s14, synchronously uploading the level data detected by the singlechip STM32 to serial port software of an upper computer to display in a waveform form;
the short-circuit detection process comprises the following steps,
s21, transmitting a high level to the other lines than GND of the lighting line from the first line, determining whether the other lines except the line transmitting the high level receive the high level, if the other lines do not receive the high level, the signal line is not shorted, and if the signal line receives the high level, the short circuit occurs between the lines receiving the high level.
Further, the open circuit detection process further includes,
and S15, if the signal line is broken, controlling the LED indicator light corresponding to the broken line to light a red light, controlling the buzzer to continuously sound for two times, and simultaneously enabling the waveform corresponding to the broken line of the serial port software to be a straight line on the zero-degree scale line.
Further, the short circuit detection process further comprises,
and S22, if the signal line is short-circuited, controlling the LED indicating lamp corresponding to the short-circuited line to light a red light, controlling the buzzer to continuously sound three sounds, and simultaneously enabling the waveform corresponding to the short-circuited line of the serial port software to be a straight line on the high-level scale line.
Furthermore, the intelligent detection method for the connectivity of the signal wire further comprises the steps of,
and S30, if the signal line is not broken or short-circuited, displaying the corresponding square wave on serial port software.
The beneficial effects of the utility model reside in that:
on one hand: the utility model discloses a signal line connectivity intellectual detection system device is equipped with singlechip STM32, and tristate gate logic circuit is connected with singlechip STM 32's GPIO pin, can carry out the continuity test that opens circuit/short circuit to the signal line, through the input or the output state who sets up high-speed GPIO pin, detects the intercommunication state of the inside different signal lines of wire rod, can both obtain solving in the twinkling of an eye opening short circuit test short slab and the unable difficult problems such as test problem of embedded chip wire rod, and the passageway can reach two-way 24 way.
On the other hand, the utility model discloses a signal line connectivity intellectual detection system method, GPIO pin input/output function through singlechip STM32 carries out the continuity short circuit test that opens circuit, output or input state through setting up the GPIO pin, detect the connected state of the inside different signal lines of wire rod, embedded chip wire rod test, among the embedded chip circuit of Lighting flashing wire, each signal line all has diode protection circuit to GND, utilize this characteristics, can make the GPIO pin output high level signal who connects GND, the GPIO pin of connecting other signal lines all has the high level to pass through diode input, the test that opens circuit: and enabling the GPIO pin connected with the GND to output a high-level signal, and detecting whether the GPIO pin connected with other signal lines has high-level input or not, wherein under the normal condition, the GPIO pin connected with other signal lines detects that the GPIO pin has high-level input, and if not, the disconnection phenomenon occurs. Short circuit test: when GPIOs except GPIO connected with GND output high level in sequence, no GPIO pin inputs high level, if so, short circuit occurs, and faster signal reaction speed can be obtained by internal crystal oscillator frequency multiplication of the single chip microcomputer. The test device solves the problem that the wire instantaneous short circuit test short plate and the embedded chip wire cannot be tested every 1M times in the prior art, and also solves the problems of low test speed, few channels and the like in the prior art, and saves the test time.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the mechanisms shown in the drawings without creative efforts.
Fig. 1 is an overall frame diagram of an intelligent detection device for signal line connectivity according to an embodiment of the present invention;
fig. 2 is an overall frame diagram of another intelligent detection apparatus for signal line connectivity according to an embodiment of the present invention;
fig. 3 is a flowchart of an intelligent detection method for signal line connectivity according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that the description of the invention referring to "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implying any number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory to each other or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
As shown in fig. 1 and fig. 2, fig. 1 is an intelligent connectivity test for a dual-head signal line, and fig. 2 is an intelligent connectivity test for a single-head signal line.
The utility model discloses a first embodiment does: an intelligent detection device for signal line connectivity comprises a single chip microcomputer STM32;
the three-state gate logic circuits are arranged and are in electrical signal connection with GPIO pins of the single chip microcomputer STM32;
and each tri-state gate logic circuit is connected with one signal line interface corresponding to the electric signal.
And the input end and the enabling end of the tristate gate logic circuit are both provided with pull-up circuits.
The internal crystal oscillator frequency of the single chip microcomputer STM32 is 16MHz, and the frequency doubling frequency is 180MHz.
The output interface of the single chip microcomputer STM32 is in electric signal connection with two LED indicator lamps and used for displaying the state of a detected signal line. The LED indicator light is controlled by a CAT9555 chip.
And an output interface of the single chip microcomputer STM32 controls two LED indicator lamps through an IO expansion chip.
The output interface of the single chip microcomputer STM32 is connected with a buzzer in an electric signal mode and used for sending out prompting sound when a signal line is in fault.
The utility model discloses a signal line connectivity intellectual detection system device can have input, output, three kinds of states of high resistance, specifically does: GPIO pins of a single chip microcomputer STM32 (such as STM32F429ZGT 6) are matched with enable tri-state gate logic circuits, so that the tri-state gate logic circuits have the functions of outputting high level, inputting detection and high-resistance anti-interference, can perform continuous open circuit and short circuit detection, and display a test result through an LED indicator lamp and prompt through a buzzer. The internal crystal oscillator frequency of the single chip microcomputer STM32 is 16MHz, the frequency multiplication is 180MHz, 4 ten thousand times of tests can be completed in 1 second, the test of a signal line of 24 channels can be realized, the problems of low test speed, few channels and the like of the conventional device are solved, and the test time is saved.
In this embodiment: the utility model discloses a signal line connectivity intellectual detection system device is equipped with singlechip STM32, and tristate gate logic circuit is connected with singlechip STM 32's GPIO pin, can carry out the continuity test that opens circuit/short circuit to the signal line, through the input or the output state who sets up high-speed GPIO pin, detects the intercommunication state of the inside different signal lines of wire rod, can both obtain solving in the twinkling of an eye opening short circuit test short slab and the unable test problem scheduling difficult problem of embedded chip wire rod, and the passageway can reach two-way 24 ways.
As shown in fig. 3, another embodiment of the present invention is an intelligent detection method for signal line connectivity, which is applied to the intelligent detection apparatus for signal line connectivity, and comprises an open circuit detection process and a short circuit detection process, wherein the open circuit detection process comprises,
s11, issuing a test command to the single chip microcomputer STM32 through the upper computer;
in the step, the program is initialized, then the upper computer sends a test command, and the open circuit test is started after the upper computer sends the test command.
S12, opening the tri-state gate logic circuit at the end of the GND corresponding to the signal line of the Lightning line, sending a high level, and enabling the tri-state gate logic circuits of other lines to be in a closed state;
in this step, the tri-state gate logic circuit can be understood as a switch, which has an enable port, and when the enable port is at a low level, the switch is turned off, the line is turned on, and the other tri-state gate logic circuits are not changed and are in a turned-off state; the input and the enabling end of the tristate gate logic circuit are both provided with pull-up circuits, and the enabling end of the tristate gate logic circuit is enabled by low level, so that the enabling end of the tristate gate in a conventional state is in a high level and is in a closed state.
S13, the single chip microcomputer STM32 carries out open circuit test, whether all receiving ends of the single chip microcomputer STM32 receive high levels except the GND corresponding signal line end is judged, if the high levels are received, the Lightning lines are not opened, and if the receiving ends do not receive the high levels, the lines which do not receive the high levels are opened;
s14, synchronously uploading the level data detected by the singlechip STM32 to serial port software of an upper computer to display in a waveform form;
in the step, level data detected by the single chip microcomputer STM32 are uploaded to serial port software of an upper computer to be displayed, and the serial port software is a serial port debugging assistant and displays the data in a waveform mode.
The short-circuit detection process comprises the following steps,
s21, transmitting a high level to the other lines than GND of the lighting line from the first line, determining whether the other lines except the line transmitting the high level receive the high level, if the other lines do not receive the high level, the signal line is not shorted, and if the signal line receives the high level, the short circuit occurs between the lines receiving the high level.
Wherein the open circuit detection process further comprises,
and S15, if the signal line is broken, controlling the LED indicating lamp corresponding to the broken line to light a red light, controlling the buzzer to continuously sound for two times, and simultaneously enabling the waveform corresponding to the broken line of the serial port software to be a straight line on the zero-degree scale line.
Wherein the short circuit detection process further comprises,
and S22, if the signal line is short-circuited, controlling the LED indicator light corresponding to the short-circuited line to light a red light, controlling the buzzer to continuously sound three sounds, and simultaneously enabling the waveforms corresponding to the short-circuited line of the serial port software to be in a straight line on the high-level scale line.
Wherein, the intelligent detection method for the connectivity of the signal wire further comprises the steps of,
and S30, if the signal line is not broken or short-circuited, displaying the corresponding square wave on serial port software.
In this step, after about 1 second and 11 ten thousand rounds of testing, if no problem occurs in the testing, the green light is turned on, and the serial port debugging assistant displays that the testing is completed.
In this embodiment, the utility model discloses a signal line connectivity intellectual detection system method, GPIO pin input/output function through singlechip STM32 carries out the continuity short circuit test that opens circuit, output or input state through setting up the GPIO pin, detect the intercommunication state of the inside different signal lines of wire rod, embedded chip wire rod test, lighting flashes in the embedded chip circuit of electric wire, each signal line all has diode protection circuit to GND, utilize this characteristics, can make the GPIO pin output high level signal who connects GND, the GPIO pin of connecting other signal lines all has the high level to pass through diode input, the test that opens circuit: and enabling the GPIO pin connected with the GND to output a high-level signal, detecting whether the GPIO pin connected with other signal lines has high-level input or not, under the normal condition, detecting whether the GPIO pin connected with other signal lines has high-level input or not, and if not, generating a circuit breaking phenomenon. Short circuit test: when the GPIOs except the GPIO connected with the GND output high levels in sequence, no GPIO pin inputs the high levels, if the GPIO pin outputs the high levels, a short circuit phenomenon occurs, and faster signal reaction speed can be obtained by adopting internal crystal oscillator frequency multiplication of the single chip microcomputer. The test device solves the problem that the wire instantaneous short circuit test short plate and the embedded chip wire cannot be tested every 1M times in the prior art, and also solves the problems of low test speed, few channels and the like in the prior art, and saves the test time.
The above only is the embodiment of the present invention, not limiting the patent scope of the present invention, all the equivalent structures or equivalent processes that are used in the specification and the attached drawings or directly or indirectly applied to other related technical fields are included in the patent protection scope of the present invention.
Claims (6)
1. The utility model provides a signal line connectivity intellectual detection system device which characterized in that: comprises the steps of (a) preparing a substrate,
the single chip microcomputer STM32;
the three-state gate logic circuits are arranged and are in electrical signal connection with GPIO pins of the single chip microcomputer STM32;
and each tri-state gate logic circuit is connected with one signal line interface corresponding to the electric signal.
2. The intelligent detection device for signal line connectivity according to claim 1, characterized in that: and the input end and the enabling end of the tristate gate logic circuit are both provided with pull-up circuits.
3. The intelligent detection device for signal line connectivity according to claim 1, characterized in that: the internal crystal oscillator frequency of the single chip microcomputer STM32 is 16MHz, and the frequency multiplication frequency is 180MHz.
4. The intelligent detection device for signal line connectivity according to claim 1, characterized in that: and an output interface electric signal of the single chip microcomputer STM32 is connected with two LED indicating lamps and used for displaying the state of a detected signal line.
5. The intelligent detection device for signal line connectivity according to claim 4, characterized in that: and an output interface of the single chip microcomputer STM32 controls two LED indicator lamps through an IO expansion chip.
6. The intelligent detection apparatus for signal line connectivity according to claim 5, wherein: and an output interface of the single chip microcomputer STM32 is in electric signal connection with a buzzer and used for giving out a prompt sound when a signal line fails.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202221125953.7U CN217689348U (en) | 2022-05-11 | 2022-05-11 | Intelligent detection device for signal line connectivity |
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| CN202221125953.7U CN217689348U (en) | 2022-05-11 | 2022-05-11 | Intelligent detection device for signal line connectivity |
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| CN217689348U true CN217689348U (en) | 2022-10-28 |
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