CN217605960U - No-load detection circuit for charging chip - Google Patents

No-load detection circuit for charging chip Download PDF

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CN217605960U
CN217605960U CN202221340120.2U CN202221340120U CN217605960U CN 217605960 U CN217605960 U CN 217605960U CN 202221340120 U CN202221340120 U CN 202221340120U CN 217605960 U CN217605960 U CN 217605960U
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charging
discharging
output end
pin
vout
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不公告发明人
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Xinlu Technology Suzhou Co ltd
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Xinlu Technology Suzhou Co ltd
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Abstract

The invention discloses a no-load detection circuit for a charging chip, which comprises an input power supply VIN, an output end VOUT, a charging switch MOS connected between the input power supply VIN and the output end VOUT, a capacitor Cout connected on the output end VOUT, a clock module connected on the charging switch MOS and used for controlling charging and discharging moments, a discharging module used for discharging output voltage at discharging moments, and a detection module used for detecting load change of the output end VOUT during charging and discharging, wherein the grid electrode of the charging switch MOS is electrically connected with the clock module, the source electrode of the charging switch MOS is connected with the input power supply VIN, and the drain electrode of the charging switch MOS is connected with the output end VOUT. The invention can monitor the load condition in real time without influencing the normal charging time, and is suitable for a single-battery structure and a multi-battery series structure; meanwhile, the structure is simple, and the device is also suitable for being combined by separating devices.

Description

No-load detection circuit for charging chip
Technical Field
The invention relates to a no-load detection circuit for a charging chip.
Background
As shown in fig. 1, in the conventional charger, VIN is a high voltage or USB 5V input, and the output is connected to a single battery or multiple batteries. The status of the charger is indicated by the LED on. Normally, the battery is in a charged state, the charge indicator lamp L1 is turned on, and the standby indicator lamp L2 is turned off. When the battery is full, the charging indicator lamp L1 is turned off, and the standby indicator lamp L2 is turned on. The battery pin is typically connected in parallel with an output capacitor Cout to ground.
In the use process of the system, the VOUT pin has 3 states: NO Load, namely the VOUT pin is not connected with a battery; 2. the battery is normal and is continuously charged; 3. and the battery is fully charged, and the system enters standby. When the VOUT pin is in the state 1, the output capacitor Cout of the VOUT terminal is quickly fully charged, and the voltage is maintained at 4.2V (assuming that the system sets the full voltage of the battery to be 4.2V). Because COUT is always kept full of voltage, the conventional charger cannot distinguish between the following 2 states: a. the system is unloaded; b. the battery is already fully charged. The customer can not be quickly identified from the LED (human-computer interface), the system battery is disconnected or the battery is fully charged, and certain confusion is caused to the customer. At present, the common charging result is the same as that of full charging in no-load and full charging, a user cannot recognize the charging result through an indicator light, and the man-machine interaction is incomplete.
Disclosure of Invention
The invention aims to provide a no-load detection circuit for a charging chip, which does not influence normal charging time and can monitor the load condition in real time.
In order to solve the technical problems, the invention adopts the following technical scheme: the utility model provides a no-load detection circuit for charging chip, its includes input power VIN, output VOUT, connects the switch MOS that charges between input power VIN and output VOUT and connects the electric capacity Cout on output VOUT, no-load detection circuit is still including connecting the clock module that is used for controlling the time of charging and discharging on the switch MOS that charges, is used for discharging the module of discharging to output VOUT when discharging, and is used for detecting the detection module of the load change on output VOUT when charging and discharging, and the grid of the switch MOS that charges is connected with clock module electricity, and its source is connected with input power VIN, and its drain electrode is connected with output VOUT.
Preferably, the detection module comprises a plurality of comparison units for threshold determination and a final trigger for locking the output voltage state of the comparison units, and when the comparison units determine that the load change of the output terminal VOUT exceeds the threshold of the comparison units, the output terminal VOUT is unloaded, otherwise, the output terminal VOUT is in a normal charging state.
Preferably, the comparison units are connected in sequence, each comparison unit comprises a comparator and a flip-flop, each flip-flop is provided with a pin D, a pin Q, a pin Clk and a pin QB, the output end of the comparator of the same comparison unit is connected with the pin Clk of the flip-flop, the pin Q of the previous flip-flop is connected with the pin D of the next flip-flop, and the pin Clk of the final flip-flop is connected with the pin Q of the flip-flop connected with the final flip-flop; different output capacitors and charging structures can be compatible.
Preferably, the rated voltage of the non-inverting input end of the previous comparator is greater than the rated voltage of the non-inverting input end of the next comparator.
Preferably, the discharging module comprises a discharging resistor R3 with one end connected between the drain electrode of the charging switch MOS and the output end VOUT, and a discharging switch K3 connected with the other end of the discharging resistor R3, wherein the discharging switch K3 is grounded and is controlled by the clock module to be switched on during discharging and switched off during charging.
The invention also provides a no-load detection method based on the no-load detection circuit for the charging chip, which is characterized by comprising the following steps of:
a. the clock module is used for controlling the input power VIN to charge the battery at intervals, and the output end VOUT is discharged within the interval time period of the charging time period;
b. the detection module is used for detecting the load change of the battery and comparing the load change with the threshold values VTH1 and VTH2 set by the comparison unit, when the voltage V0 of the load on the output end VOUT is reduced from being higher than VTH1 to being lower than VTH2 in the same discharging time period, the circuit is unloaded, wherein V0> VTH1> VTH2.
The invention has the beneficial effects that: the invention can monitor the load condition in real time without influencing the normal charging time, and is suitable for a single-battery structure and a multi-battery series structure; meanwhile, the structure is simple, and the device is also suitable for being combined by separating devices; the threshold value can be set to be a plurality of according to the requirement, and the detection accuracy is improved.
Drawings
FIG. 1 is a prior art charging circuit diagram;
FIG. 2 is a circuit diagram of the no-load detection circuit of the present invention;
FIG. 3 is a schematic diagram showing the variation of the output voltage V0 during idling;
FIG. 4 is a schematic diagram of the clock module output clock signal;
FIG. 5 is a circuit diagram of a detection module;
fig. 6 is a schematic connection diagram of the no-load detection circuit.
Detailed Description
The invention is described in detail below with reference to embodiments shown in the drawings to which:
as shown in fig. 2, the no-load detection circuit for the charging chip includes an input power source VIN, an output terminal VOUT, a charging switch MOS connected between the input power source VIN and the output terminal VOUT, and a capacitor Cout connected to the output terminal VOUT, the no-load detection circuit further includes a clock module connected to the charging switch MOS for controlling charging and discharging times, a discharging module for discharging the output terminal VOUT at the discharging time, and a detection module for detecting a load change on the output terminal VOUT at the charging and discharging times, a gate of the charging switch MOS is electrically connected to the clock module, a source thereof is connected to the input power source VIN, and a drain thereof is connected to the output terminal VOUT.
The discharging module comprises a discharging resistor R3 with one end connected between the drain electrode of the charging switch MOS and the output end VOUT, and a discharging switch K3 connected with the other end of the discharging resistor R3, wherein the discharging switch K3 is grounded, and is controlled by the clock module to be switched on during discharging and switched off during charging.
As shown in fig. 5, the detection module includes several comparison units for threshold determination and a final stage flip-flop for locking the output voltage state of the comparison units, and when the comparison units determine that the load variation of the output terminal VOUT exceeds the threshold of the comparison units, the output terminal VOUT is unloaded, otherwise, the output terminal VOUT is in a normal charging state. In order to improve the detection accuracy, a plurality of comparison units are sequentially connected, each comparison unit comprises a comparator and a trigger, each trigger is provided with a pin D, a pin Q, a pin Clk and a pin QB, the output end of the comparator of the same comparison unit is connected with the pin Clk of the trigger, the pin Q of the previous trigger is connected with the pin D of the next trigger, and the pin Clk of the final trigger is connected with the pin Q of the trigger connected with the final trigger; different output capacitors and charging structures can be compatible. The rated voltage of the non-inverting input end of the previous comparator is larger than that of the non-inverting input end of the next comparator.
As shown in fig. 4, the clock module receives the standard clock signal OSC outputted from the system oscillator and generates two clock signals with opposite phases to control the gate of the charge switch MOS and the discharge switch K3, respectively. The clock module can be implemented by using a digital code program method, and can also be implemented by splicing digital basic units (the clock module is not the key point of the invention, and is not described herein any more).
The charging switch MOS is not always turned on, but is turned on intermittently according to fig. 3. And in the time T _ C, K3 is opened, the charging switch MOS is normally conducted, and the battery BAT is charged. And in the T _ D time, K3 is closed, the charging switch MOS circuit, and K3 and R3 form a discharging network of the BAT terminal.
The no-load detection method of the no-load detection circuit for the charging chip comprises the following steps: a. the clock module is used for controlling the input power VIN to charge the battery at intervals, and the output end VOUT is discharged within the interval time period of the charging time period; b. the detection module is used for detecting the load change of the output end VOUT and comparing the load change with the threshold VTH1 and VTH2 set by the comparison unit, when the voltage V0 of the load on the output end VOUT is reduced from being higher than VTH1 to being lower than VTH2 in the same discharging time period, the circuit is unloaded, wherein V0> VTH1> VTH2. Specifically, a discharge detection period (T _ D) for detecting a change in load is inserted at intervals throughout the charging period (T _ C). If the output suddenly idles (the battery is disconnected), the voltage VO of the output terminal VOUT is discharged from 4.2V in a discharge detection period (T _ D), the voltage of the VO is different at the end of the discharge detection period (T _ D). In order to determine more accurately, a plurality of thresholds are set in the circuit, here, two thresholds VTH1 and VTH2 are taken as examples, for example, VTH1=4.0V (which should be lower than the saturation voltage), VTH2=2.0V, and in a discharge detection period (T _ D), if the system detects that VOUT slowly decreases, the VOUT crosses VTH1 and TH2 successively, that is, the output is considered to be open-circuited, and the output is not connected to the battery, that is, whether the circuit is idle can be determined quickly.
The above embodiments are merely illustrative of the technical ideas and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and not to limit the protection scope of the present invention. All equivalent changes or modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.

Claims (5)

1. The utility model provides a no-load detection circuit for charging chip, its includes input power VIN, output VOUT, connects the switch MOS that charges between input power VIN and output VOUT and connects the electric capacity Cout on output VOUT, its characterized in that: the no-load detection circuit further comprises a clock module connected to the charging switch MOS and used for controlling charging and discharging time, a discharging module used for discharging the output end VOUT in the discharging time, and a detection module used for detecting load change on the output end VOUT in the charging and discharging processes, wherein the grid electrode of the charging switch MOS is electrically connected with the clock module, the source electrode of the charging switch MOS is connected with the input power supply VIN, and the drain electrode of the charging switch MOS is connected with the output end VOUT.
2. The empty-load detection circuit for the charging chip as claimed in claim 1, wherein: the detection module comprises a plurality of comparison units for threshold value determination and a final trigger for locking the output voltage state of the comparison units, when the comparison units determine that the load change of the output end VOUT exceeds the threshold value of the comparison units, the output end VOUT is unloaded, otherwise, the output end VOUT is in a normal charging state.
3. The empty-load detection circuit for the charging chip as claimed in claim 2, wherein: the comparator comprises a plurality of comparators and a trigger, each trigger comprises a pin D, a pin Q, a pin Clk and a pin QB, the comparator output end of the same comparator is connected with the pin Clk of the trigger, the pin Q of the former trigger is connected with the pin D of the latter trigger, and the pin Clk of the final-stage trigger is connected with the pin Q of the trigger connected with the pin Clk.
4. The empty-load detection circuit for the charging chip as recited in claim 3, wherein: the rated voltage of the non-inverting input end of the previous comparator is larger than that of the non-inverting input end of the next comparator.
5. The empty-load detection circuit for the charging chip as claimed in claim 1, wherein: the discharging module comprises a discharging resistor R3 with one end connected between the drain electrode of the charging switch MOS and the output end VOUT, and a discharging switch K3 connected with the other end of the discharging resistor R3, wherein the discharging switch K3 is grounded, and is controlled by the clock module to be switched on during discharging and switched off during charging.
CN202221340120.2U 2022-05-31 2022-05-31 No-load detection circuit for charging chip Active CN217605960U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221340120.2U CN217605960U (en) 2022-05-31 2022-05-31 No-load detection circuit for charging chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221340120.2U CN217605960U (en) 2022-05-31 2022-05-31 No-load detection circuit for charging chip

Publications (1)

Publication Number Publication Date
CN217605960U true CN217605960U (en) 2022-10-18

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CN202221340120.2U Active CN217605960U (en) 2022-05-31 2022-05-31 No-load detection circuit for charging chip

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CN (1) CN217605960U (en)

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