CN200947595Y - Key-press circuit for switch - Google Patents
Key-press circuit for switch Download PDFInfo
- Publication number
- CN200947595Y CN200947595Y CNU2006200179332U CN200620017933U CN200947595Y CN 200947595 Y CN200947595 Y CN 200947595Y CN U2006200179332 U CNU2006200179332 U CN U2006200179332U CN 200620017933 U CN200620017933 U CN 200620017933U CN 200947595 Y CN200947595 Y CN 200947595Y
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- Prior art keywords
- circuit
- decoder
- button
- delay
- control
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- 238000007493 shaping process Methods 0.000 claims abstract description 35
- 239000003990 capacitor Substances 0.000 claims description 39
- 238000001914 filtration Methods 0.000 claims description 6
- 230000005540 biological transmission Effects 0.000 claims description 5
- 230000005611 electricity Effects 0.000 claims description 4
- 238000012544 monitoring process Methods 0.000 abstract description 2
- 238000004088 simulation Methods 0.000 description 8
- 230000000630 rising effect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000003825 pressing Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000284 resting effect Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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- Charge And Discharge Circuits For Batteries Or The Like (AREA)
- Electronic Switches (AREA)
Abstract
The utility model discloses a keyswitch circuit. The keyswitch circuit comprises batteries, a keystoke and a control switch controlling the on-off of the batteries and also comprises a keying delay shaping circuit and a keying control hold circuit. The keying delay shaping circuit is connected with the batteries and the control switch. When the keystoke is pressed down, the keying delay shaping circuit outputs the pulse signals and transmits the pulse signals to the keying control hold circuit. The keying control hold circuit receives the pulse signals transmitted by the keying delay shaping circuit and controls the control switch and the batteries to be cut off or be communicated. The keyswitch circuit of the utility model can control the start-up and shutdown of the equipment on the condition that a CPU of a monitoring control switch does not participate so as to achieve the purpose of saving energy and the CPU resources.
Description
[technical field]
The utility model relates to a kind of switch key circuit, relates in particular to the switch key circuit that directly utilizes discrete electronic devices and components control appliance power supply.
[background technology]
In electric power and communication system devices, the user need start shooting or shut down portable equipment (particularly needing battery powered portable equipment).For example the mobile phone of a certain brand or hand-hold type three-phase electric energy meter tester are carried out startup and shutdown control, under the very nervous situation of cpu resource, make rational use of resources, reach simultaneously the purpose of economize on electricity, require supplying cell small and light in this case.
As shown in Figure 1, existing switch key circuit comprises battery BAT, button SW1, CPU and control switch SW3.Described switch key circuit utilizes CPU to come the centralized control button, thus the opening and closing of control power supply.But the CPU of this moment will ceaselessly retrieve the state of button, will certainly waste regular hour and resource.The simulation control switch that described control switch SW3 is a power supply is the control switch to the unified power supply of portable equipment, though can cut off at any time to the power supply of complete machine power supply, can save certain energy content of battery.But there is following problem in described switch key circuit:
1) under the very little situation of portable equipment volume, be difficult to adorn the mechanical switch of a large volume, the useful life of mechanical switch is shorter;
2) power consumption of CPU is very big, even turn off in resting state under the state of liquid display screen, equally also will consume the energy of several uA at most, also is the energy of nA level at least, is unfavorable for environmental protection, also makes battery do bigger and bigger.
Because this scheme battery consumption is very big, require the user to have in time charge.But the cycle-index of the impulse electricity of battery is limited, more than 1000 time at most, have only at least more than 200 time, become the bottleneck problem that battery need solve, and these problems all be complete machine put into production and utilization and operation the problem that must face and solve.
[utility model content]
Technical problem to be solved in the utility model is, a kind of switch key circuit is provided, and save battery power, thereby the useful life of prolongation battery make battery capacity is required lower switch key circuit.
The technical scheme that the utility model adopted is: a kind of key switch circuit is provided, described key switch circuit comprises battery, the control switch of button and control cell switch, described key switch circuit comprises that also the button delay shaping circuit reaches by the key control holding circuit, described button delay shaping circuit is connected with described battery and control switch, when button is pressed, described button delay shaping circuit outputting standard pulse signal is transferred to described by the key control holding circuit, and described pulse signal control control switch and battery by the transmission of key control holding circuit reception button delay shaping circuit ends or conducting.
More specifically, described button delay shaping circuit comprises and is connected three resistance carrying out dividing potential drop with battery, is connected the first computing amplifier comparator of exporting high-low level with described resistance, the filter capacitor and the delay capacitor that are connected with the computing amplifier comparator, the resistance that is connected in the positive pole of filter capacitor and delay capacitor, and is connected the second computing amplifier comparator that carries out the pulse signal shaping with filtering wave by prolonging time electric capacity.
More specifically, the discharge resistance that described button delay shaping circuit also comprises the diode of the positive pole that is connected in described delay capacitor and filter capacitor, is connected in parallel with filter capacitor, the anode of described diode is connected with the positive pole of described delay capacitor, and negative electrode is connected with the positive pole of described filter capacitor; After described button rebounded, the electricity that is stored in described delay capacitor was transferred to discharge resistance by described diode and discharges.
More specifically, describedly comprise the decoder that is connected with described button delay shaping circuit, the comparator that is connected with decoder by the key control holding circuit, described decoder receives the pulse signal of described button delay shaping circuit transmission, by the relatively back output signal control control switch conducting or end of described comparator.
More specifically, describedly also comprise the diode that is connected with described decoder by the key control holding circuit, the anode of described diode is connected to described decoder, and the negative electrode of described diode is in parallel with decoder output respectively.
More specifically, described decoder is connected with electric capacity, and the two ends of described electric capacity all are connected with described decoder, and described electric capacity charges when open state and guarantees that decoder resets.
The utility model compared with prior art, beneficial effect is: key switch circuit of the present utility model has adopted the button delay shaping circuit to reach by the key control holding circuit, can be under the state that the CPU that does not have monitoring switch participates in, finish the mutual conversion of high-low level, thereby reach the purpose of energy savings and cpu resource.
[description of drawings]
Fig. 1 is existing switch key circuit diagram.
Fig. 2 is a switch key circuit diagram of the present utility model.
Fig. 3 is the button delay shaping circuit schematic diagram of Fig. 2.
Fig. 4 be Fig. 2 by key control holding circuit schematic diagram.
[embodiment]
As shown in Figure 1, switch key circuit of the present utility model, do not having under the situation of CPU by increasing the button delay shaping circuit and controlling the portable equipment power supply by the key control holding circuit, thereby, make the voltage of battery carry out voltage output or stop voltage output to portable equipment without the direct conducting of CPU or by the simulation control switch.
Described switch key circuit comprises battery, button, button delay shaping circuit, by key control holding circuit and control switch.When pressing described button for the first time, described button delay shaping circuit reaches and controls the conducting of described simulation control switch by the key control holding circuit, and the voltage of battery is transferred to the portable equipment power supply by the simulation control switch; When for the second time pressing described button, described button delay shaping circuit and control described simulation control switch by the key control holding circuit and end stops to described portable equipment power supply.
Described switch key delay shaping circuit comprises the first computing amplifier comparator U1C, resistance R 1, R2, R3, the second computing amplifier comparator U1A, filtering wave by prolonging time resistance R 5, filter capacitor C1, delay capacitor C2, repid discharge resistance R 4, and diode D8, D9.
Described resistance R 1, R2, R3 are connected in series, and an end is connected with battery VCC, other end ground connection.One end of described resistance R 2 is connected with the normal phase input end 5 of computing amplifier comparator U1C, and the other end is connected with CPU.The inverting input 6 of the described first computing amplifier comparator U1C is connected with reference voltage V REF, when, the normal phase input end voltage of the first computing amplifier comparator U1C is greater than inverting input when pushing button, and the described first computing amplifier comparator U1C produces high level.In addition, described button is connected between described resistance R 1 and the resistance R 2, makes resistance R 1 and resistance R 2 conductings when pushing button.At this moment, the first computing amplifier comparator U1C produces high level output.The described port that is connected with CPU has mainly been finished button and has been pressed when requiring shutdown, makes CPU finish the back-up storage work of important information.
The inverting input 2 of the described second computing amplifier comparator U1A is connected in fixing reference voltage V REF, normal phase input end 3 at the second computing amplifier comparator U1A, link to each other with filter capacitor C1 with diode D9 on being connected in parallel on resistance R 5 by resistance R 5, the negative terminal of filter capacitor C1 links to each other with ground.The normal phase input end 3 of the described second computing amplifier comparator U1A is connected with delay capacitor C2, and the anode of described delay capacitor C2 links to each other with described resistance R 5, and the normal phase input end 3 of the second computing amplifier comparator U1A also is connected with the anode of repid discharge diode D9.While is repid discharge resistance R 4 in parallel on filter capacitor C1.The inverting input 2 of the described second computing amplifier comparator U1A links to each other with the reference voltage V REF less than this amplifier supply power voltage, and the output 1 of the second computing amplifier comparator U1A is drawn and the linking to each other by the key control holding circuit of back.
The high level of described first computing amplifier comparator U1C output transfers to described filter capacitor C1 by described isolating diode D8 and charges, thereby carries out filtering.After the described filter capacitor C1 charging filtering, transfer to described delay capacitor C2 by resistance R 5, described delay capacitor C2 charges again, when the voltage on the delay capacitor C2 during greater than the inverting input 2 reference voltage V REF of the second computing amplifier comparator U1A, the second computing amplifier comparator U1A exports high level, this just exports described pulse signal high level, time-delay capacitor C 2 is discharged by discharge resistance R4 by repid discharge diode D9 when button disappears, normal phase input end 3 voltages of the described second computing amplifier comparator U1A are lower than the reference voltage V REF of the second computing amplifier comparator U1A reverse input end 2 very soon at this moment, produce thereby finished a described calibration pulse, the described second computing amplifier comparator U1A finishes the shaping of pulse signal.The described second computing amplifier comparator U1A transfers to shaped pulse signal described by the key control holding circuit.
Wherein, the described second computing amplifier comparator U1A is one of them comparator of a common four high guaily unit integrated circuit, has the output characteristic of response fast, make the high-low level signal change output (output rising edge of a pulse of the standard here and trailing edge all will seek quickness and steep) fast, thereby reach the purpose of pulse output Shaping.
Comprise decoder U2 and isolating diode D1～D7 on every side, diode D10 and computing amplifier comparator U1B by the key control holding circuit as described in Figure 4.
The anode of described isolating diode D1～D7 is connected on respectively on each output of decoder, and the negative electrode of diode is connected with decoder output 4 respectively; And be connected on the reset terminal 15 of decoder by the negative electrode of described diode D10, the output 2 of described decoder is connected on the normal phase input end 12 of comparator U1B as the output of unique signal.
The calibration pulse signal (being high level or low level signal) of described button delay shaping circuit transmission is transferred to decoder U2 inside by input 14.Described decoder U2 is that a rising edge of a pulse resets and resets simultaneously later in the decoder output, and except that 3 pin were high level 1, other output was low level 0 entirely.Interim when first pulse, the rising edge trigger decoder U2 of this pulse, decoder U2 output 2 output high level 1, other output output low level 0 of decoder U2.Short of new pulse arrival (just not having the rising edge of pulse to arrive), the output 2 of decoder U2 keeps its original output state high level 1 always, this high level is greater than the reference voltage V REF of comparator U1B inverting input 13, the conducting of comparator U1B output high level control analog switch, the voltage of battery is powered by the portable equipment of exporting to of simulation control switch.
When second calibration pulse signal arrived, same decoder U2 was subjected to the triggering of rising edge of a pulse, described decoder U2 output 4 output high level 1, all the other outputs (also comprising decoder 2 pin) output low level 0.Thereby the high level 1 of decoder U2 output 4 is resetted decoder U2 by diode D10, and decoder U2 output 2 still still is an output low level 0.This low level is less than the reference voltage V REF of described comparator U1B inverting input 13, and comparator U1B relatively exports back low level control analog switch and ends, and the voltage of battery simulated control switch and closes, and the portable equipment power supply disconnects, and reaches the purpose of shutdown.
When switch key circuit of the present utility model carries out switch control, may further comprise the steps:
Step 1: the conducting that pushes button, the resistance R 1 of button delay shaping circuit is connected with R2, and the voltage of the described first computing amplifier comparator U1C normal phase input end 5 is higher than the voltage of the first computing amplifier comparator U1C inverting input 6, and comparator U1C produces high level;
Step 2: the described first computing amplifier comparator U1C is transferred to described filter capacitor C1 charging filtering with the high level that produces by diode D8;
Step 3: the described filter capacitor C1 filtered high level that will charge is transferred to the delay capacitor C2 time-delay of charging by resistance R 5; When described delay capacitor C2 is full of electric process, reach the purpose of time-delay;
Step 4: when the voltage on the described delay capacitor C2 was higher than the second computing amplifier comparator U1A inverting input reference voltage V REF, the described second computing amplifier comparator U1A exported high level fast, thereby reaches the output Shaping of pulse signal;
Step 5: the described second computing amplifier comparator U1A is transferred to decoder U2 with shaped pulse signal and deciphers, the output output high level of decoder U2 is transferred to comparator U1B and compares, after described comparator U1B compares, the conducting of output high level signal control analog switch, the voltage of battery is powered to portable equipment by the conducting of simulation control switch;
Step 6: when button discharges, the voltage of described delay capacitor C2 transfers to discharge resistance R4 by diode D9 and discharges, the described second computing amplifier comparator U1A output low level, a calibration pulse end of output, but because being the rising edge triggering, decoder U2 resets, so decoder U2 state output terminal remains unchanged;
Step 7: when pushing button once more, described button delay shaping circuit repeating step 1 is transferred to decoder U2 with shaped pulse signal and deciphers to step 4;
Step 8: described decoder U2 automatically resets, decoder U2 output 2 is a low level, be transferred to described comparator U1B and compare output, comparator U1B output low level control simulation control switch ends, the voltage of battery simulated control switch and closes, the portable equipment power supply disconnects, and reaches the purpose of shutdown.
Claims (6)
1, a kind of key switch circuit, described key switch circuit comprises battery, the control switch of button and control cell switch, it is characterized in that, described key switch circuit comprises that also the button delay shaping circuit reaches by the key control holding circuit, described button delay shaping circuit is connected with described battery and control switch, when button is pressed, described button delay shaping circuit output pulse signal is transferred to described by the key control holding circuit, described pulse signal by the transmission of key control holding circuit reception button delay shaping circuit, control control switch and battery end or conducting.
2, key switch circuit as claimed in claim 1, it is characterized in that, described button delay shaping circuit comprises and is connected three resistance carrying out dividing potential drop with battery, is connected the first computing amplifier comparator of exporting high-low level with described resistance, the filter capacitor and the delay capacitor that are connected with the computing amplifier comparator, the resistance that is connected in the positive pole of filter capacitor and delay capacitor, and is connected the second computing amplifier comparator that carries out the pulse signal shaping with filtering wave by prolonging time electric capacity.
3, key switch circuit as claimed in claim 1 or 2, it is characterized in that, the discharge resistance that described button delay shaping circuit also comprises the diode of the positive pole that is connected in described delay capacitor and filter capacitor, is connected in parallel with filter capacitor, the anode of described diode is connected with the positive pole of described delay capacitor, and negative electrode is connected with the positive pole of described filter capacitor; After described button rebounded, the electricity that is stored in described delay capacitor was transferred to discharge resistance by described diode and discharges.
4, key switch circuit as claimed in claim 1, it is characterized in that, describedly comprise the decoder that is connected with described button delay shaping circuit, the comparator that is connected with decoder by the key control holding circuit, described decoder receives the pulse signal of described button delay shaping circuit transmission, by the relatively back output signal control control switch conducting or end of described comparator.
5, key switch circuit as claimed in claim 1, it is characterized in that, describedly also comprise the diode that is connected with described decoder by the key control holding circuit, the anode of described diode is connected to described decoder, and the negative electrode of described diode is in parallel with decoder output respectively.
6, key switch circuit as claimed in claim 4 is characterized in that, described decoder is connected with electric capacity, and the two ends of described electric capacity all are connected with described decoder, and described electric capacity charges when open state and guarantees that decoder resets.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2006200179332U CN200947595Y (en) | 2006-08-24 | 2006-08-24 | Key-press circuit for switch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2006200179332U CN200947595Y (en) | 2006-08-24 | 2006-08-24 | Key-press circuit for switch |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN200947595Y true CN200947595Y (en) | 2007-09-12 |
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ID=38734658
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2006200179332U Expired - Fee Related CN200947595Y (en) | 2006-08-24 | 2006-08-24 | Key-press circuit for switch |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN200947595Y (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101577792B (en) * | 2008-05-06 | 2011-01-19 | 通嘉科技股份有限公司 | Judgment device of operation mode and judgment method thereof |
| CN101470654B (en) * | 2007-12-28 | 2011-09-28 | 鸿富锦精密工业（深圳）有限公司 | Mainboard test device |
| CN103346762A (en) * | 2013-06-14 | 2013-10-09 | 成都锐奕信息技术有限公司 | Circuit switch preventing accidental touching |
| CN105098898A (en) * | 2015-07-31 | 2015-11-25 | 深圳市大疆创新科技有限公司 | Power supply system, power supply control method and movable platform with the power supply system |
-
2006
- 2006-08-24 CN CNU2006200179332U patent/CN200947595Y/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101470654B (en) * | 2007-12-28 | 2011-09-28 | 鸿富锦精密工业（深圳）有限公司 | Mainboard test device |
| CN101577792B (en) * | 2008-05-06 | 2011-01-19 | 通嘉科技股份有限公司 | Judgment device of operation mode and judgment method thereof |
| CN103346762A (en) * | 2013-06-14 | 2013-10-09 | 成都锐奕信息技术有限公司 | Circuit switch preventing accidental touching |
| CN105098898A (en) * | 2015-07-31 | 2015-11-25 | 深圳市大疆创新科技有限公司 | Power supply system, power supply control method and movable platform with the power supply system |
| CN105098898B (en) * | 2015-07-31 | 2018-07-10 | 深圳市大疆创新科技有限公司 | Electric power system, method for controlling power supply and the moveable platform with the electric power system |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070912 Termination date: 20130824 |