CN217545140U

CN217545140U - POGO PIN male connector and POGO PIN connector

Info

Publication number: CN217545140U
Application number: CN202220845840.8U
Authority: CN
Inventors: 李掌
Original assignee: Hangzhou Tuya Information Technology Co Ltd
Current assignee: Hangzhou Tuya Information Technology Co Ltd
Priority date: 2022-04-13
Filing date: 2022-04-13
Publication date: 2022-10-04
Anticipated expiration: 2032-04-13

Abstract

The utility model provides a POGO PIN male end connector and POGO PIN connector. Through specific design, arrange first power PIN, first function PIN and first ground connection PIN in proper order on the casing, second power PIN, second function PIN and second ground connection PIN are arranged in proper order, first power PIN is central symmetry along the center of predetermineeing the face with second power PIN, first function PIN is central symmetry along the center of predetermineeing the face with second function PIN, first ground connection PIN is central symmetry along the center of predetermineeing the face with second ground connection PIN, this kind of design makes POGO PIN male connector after rotatory 180 degrees, the same with original overall arrangement, even if so connect conversely, also can not have the condition that causes the central control panel to be burnt out because of the short circuit among the prior art and take place, the security has improved.

Description

POGO PIN male end connector and POGO PIN connector

Technical Field

The utility model relates to a connector field especially relates to a POGO PIN male end connector and POGO PIN connector.

Background

POGO PIN connector plays the connection effect often in equipment, for example POGO PIN connector can connect the power strip and the mainboard of equipment, POGO PIN connector includes POGO PIN male connector and POGO PIN female connector, sets up POGO PIN male connector on one of them board of mainboard and power strip, and another board sets up female connector, accomplishes the connection promptly with POGO PIN male connector and POGO PIN female connector butt joint. The POGO PIN male connector is provided with a plurality of PINs, and each PIN has a definition, such as a power supply PIN, a grounding PIN and the like. Because the PIN on POGO PIN male connector arranges and does not have specific law, and the forward of its structure is lower with the reverse degree of discernment, so when POGO PIN male connector and POGO PIN female connector butt joint, the male connector probably adorns anti-, probably the power PIN of POGO PIN male connector just and the ground connection PIN of POGO PIN female connector are connected after adorning anti-back, the input of power should connect power PIN promptly, and now connect ground connection PIN, this connection can cause the problem of short circuit and lead to power strip and mainboard to be burnt out and then damage the whole central control panel of this equipment.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a POGO PIN male connector and POGO PIN connector makes POGO PIN male connector after rotatory 180 degrees through specific connected mode, and is the same with original overall arrangement, so even POGO PIN male connector connects conversely, does not have among the prior art because the short circuit leads to the circumstances of well accuse panel burnt out to take place, has improved the security.

In order to solve the technical problem, the utility model provides a POGO PIN male connector, which comprises a shell, a first power PIN, a second power PIN, a first grounding PIN, a second grounding PIN, a first function PIN and a second function PIN, wherein the first power PIN, the second power PIN, the first grounding PIN, the second grounding PIN, the first function PIN and the second function PIN are arranged on the preset surface of the shell;

the first power pin, the first function pin and the first ground pin are arranged in sequence, the second power pin, the second function pin and the second ground pin are arranged in sequence, the first power pin and the second power pin are in central symmetry with the center of the preset surface, the first function pin and the second function pin are in central symmetry with the center of the preset surface, and the first ground pin and the second ground pin are in central symmetry with the center of the preset surface.

Preferably, the first function PIN comprises a first control PIN, the second function PIN comprises a second control PIN, and the POGO PIN male connector further comprises a first resistor, a second resistor, a first controllable switch, a third resistor, a fourth resistor and a second controllable switch;

the control end of the first controllable switch is connected with the CPU, the first end of the first controllable switch is connected with the system ground, the second end of the first controllable switch is connected with one end of the first resistor, the other end of the first resistor is respectively connected with one end of the second resistor and the first control pin, and the other end of the second resistor is connected with the power supply; the control end of the second controllable switch is connected with the CPU, the first end of the second controllable switch is connected with the system ground, the second end of the second controllable switch is connected with one end of the third resistor, the other end of the third resistor is respectively connected with one end of the fourth resistor and the second control pin, and the other end of the fourth resistor is connected with the power supply;

the first controllable switch is used for being switched on when the signal of the CPU is at a high level and being switched off when the signal of the CPU is at a low level;

the second controllable switch is used for being switched on when the signal of the CPU is at a high level and being switched off when the signal of the CPU is at a low level.

Preferably, the first controllable switch is a first NPN triode, and the second controllable switch is a second NPN triode;

a collector of the first NPN triode is used as a second end of the first controllable switch, a base is used as a control end of the first controllable switch, and an emitter is used as a first end of the first controllable switch;

and a collector of the second NPN triode is used as a second end of the second controllable switch, a base is used as a control end of the second controllable switch, and an emitter is used as a first end of the second controllable switch.

Preferably, the first functional pins comprise a first control pin, a USB + pin, a Signal-TX + pin and a Signal-TX-pin which are sequentially arranged, and the second functional pins comprise a second control pin, a USB-pin, a Signal-RX + pin and a Signal-RX-pin which are sequentially arranged;

the first control pin and the second control pin are in central symmetry with the center of the preset surface, the USB + pin and the USB-pin are in central symmetry with the center of the preset surface, the Signal-TX + pin and the Signal-RX + pin are in central symmetry with the center of the preset surface, and the Signal-TX-pin and the Signal-RX-pin are in central symmetry with the center of the preset surface.

Preferably, first function PIN includes first control PIN, second function PIN includes the second control PIN, POGO PIN male connector still includes the fifth resistance, the first end and the power of fifth resistance are connected, and the second end is connected with CPU's sampling end, the second end of fifth resistance still is used for being connected with first control PIN or second control PIN in the POGO PIN female connector, first control PIN in the POGO PIN female connector passes through sixth resistance and connects systematically ground, second control PIN in the POGO PIN female connector passes through seventh resistance and connects systematically ground, the sixth resistance with the resistance of seventh resistance is different, so that CPU passes through the magnitude of voltage of sampling end confirms POGO PIN male connector with the connected mode of POGO PIN female connector.

Preferably, the device further comprises a diode, an anode of the diode is connected with the sampling end of the CPU and the second end of the fifth resistor, respectively, and a cathode of the diode is used for being connected with the first control PIN or the second control PIN in the POGO PIN female connector.

Preferably, the first functional PINs further comprise data positive transmission PINs, the second functional PINs further comprise data negative transmission PINs, and the POGO PIN male connector further comprises a signal switching module;

a first data positive transmission end of the signal switching module is connected with a data positive transmission PIN of the POGO PIN male connector, a first data negative transmission end of the signal switching module is connected with a data negative transmission PIN of the POGO PIN male connector, and a second data positive transmission end, a second data negative transmission end, a third data positive transmission end, a third data negative transmission end and a switching end of the signal switching module are all connected with the CPU;

when a data positive transmission PIN of the POGO PIN male connector is connected with a data positive transmission PIN of the POGO PIN female connector, and a data negative transmission PIN of the POGO PIN male connector is connected with a data negative transmission PIN of the POGO PIN female connector, the signal switching module is used for connecting the second data positive transmission end with the first data positive transmission end according to a signal of the sampling end, and the second data negative transmission end is connected with the first data negative transmission end;

the signal switching module is used for switching a signal according to the sampling end, the third data negative transmission end is connected with the first data positive transmission end, and the third data positive transmission end is connected with the first data negative transmission end.

Preferably, the first power supply pin is connected with the second power supply pin, and the first ground pin is connected with the second ground pin;

the POGO PIN male connector further comprises an eighth resistor and a third controllable switch, one end of the eighth resistor is connected with the first power PIN, the other end of the eighth resistor is connected with the control end of the third controllable switch, the first end of the third controllable switch is connected with the second grounding PIN, and the second end of the third controllable switch is connected with the system ground;

the third controllable switch is used for being switched on when the control end has power supply input and being switched off when no power supply input exists.

Preferably, the third controllable switch is an N-MOS transistor, a gate of the N-MOS transistor is used as a control end of the third controllable switch, a source of the N-MOS transistor is used as a first end of the third controllable switch, and a drain of the N-MOS transistor is used as a second end of the third controllable switch.

For solving above-mentioned technical problem, the utility model also provides a POGO PIN connector, including POGO PIN female end connector, still include as above-mentioned POGO PIN male end connector, POGO PIN female end connector with POGO PIN male end connector connects.

The application provides a POGO PIN male connector and POGO PIN connector. Through specific design, arrange first power PIN, first function PIN and first ground connection PIN in proper order on the casing, second power PIN, second function PIN and second ground connection PIN are arranged in proper order, first power PIN is central symmetry along the center of predetermineeing the face with second power PIN, first function PIN is central symmetry along the center of predetermineeing the face with second function PIN, first ground connection PIN is central symmetry along the center of predetermineeing the face with second ground connection PIN, this kind of design makes POGO PIN male connector after rotatory 180 degrees, the same with original overall arrangement, even if so connect conversely, also can not have the condition that causes the central control panel to be burnt out because of the short circuit among the prior art and take place, the security has improved.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required in the prior art and the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

Fig. 1 is a schematic structural view of a POGO PIN male connector provided in the present invention;

fig. 2 is a schematic structural view of another POGO PIN male connector provided in the present invention;

fig. 3 is a schematic structural view of another POGO PIN male connector provided by the present invention;

fig. 4 is a schematic structural view of another POGO PIN male connector provided by the present invention;

fig. 5 is a schematic structural view of another POGO PIN male connector provided by the present invention;

fig. 6 is a schematic structural view of another POGO PIN male connector provided in the present invention;

fig. 7 is a schematic structural view of another POGO PIN male connector provided in the present invention;

fig. 8 is a schematic structural view of another POGO PIN male connector provided by the present invention;

fig. 9 is another POGO PIN male connector's that the utility model provides a structural schematic.

Detailed Description

The utility model discloses a core provides a POGO PIN male connector and POGO PIN connector, makes POGO PIN male connector after rotatory 180 degrees through specific connected mode, and is the same with original overall arrangement, so even POGO PIN male connector connects conversely, does not have among the prior art because the short circuit leads to the condition emergence that well accuse panel was burnt out, has improved the security.

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Please refer to fig. 1, fig. 1 is a schematic structural diagram of a POGO PIN male connector according to the present invention. The POGO PIN male connector comprises a shell, and a first power PIN 1, a second power PIN 12, a first grounding PIN 11, a second grounding PIN 2, a first functional PIN and a second functional PIN which are arranged on a preset surface of the shell;

the first power pin 1, the first function pin and the first ground pin 11 are sequentially arranged, the second power pin 12, the second function pin and the second ground pin 2 are sequentially arranged, the first power pin 1 and the second power pin 12 are centrally symmetrical about the center of a preset plane, the first function pin and the second function pin are centrally symmetrical about the center of the preset plane, and the first ground pin 11 and the second ground pin 2 are centrally symmetrical about the center of the preset plane.

Because there are a plurality of PINs on the PIN male connector, the definition of each PIN is different, and the forward and reverse recognition degree of the PIN male connector is very low, so it is possible to reverse the PIN male connector, i.e. rotate 180 degrees under the condition of normal connection, the present application designs a PIN male connector arranged according to a certain rule, wherein the first POWER PIN 1 (POWER 1), the first function PIN and the first ground PIN 11 are arranged in sequence, the second POWER PIN 12 (POWER 2), the second function PIN and the second ground PIN 2 are arranged in sequence, the first POWER PIN 1 and the second POWER PIN 12 are centrosymmetric with the center of the preset plane, the first function PIN and the second function PIN are centrosymmetric with the center of the preset plane, the first ground PIN 11 and the second ground PIN 2 are centrosymmetric with the center of the preset plane, thus, even if the PIN rotates 180 degrees and reverse connection, the original structure is the same with the original connection method, i.e. the position of the ground PIN is still connected with the POWER PIN, the connection position of the POWER PIN still remains with the ground PIN, therefore, the safety connection problem of the POWER PIN and the existing connection board can not be caused.

In addition, the first functional pins can comprise a first Control pin 3 (Control-L1), a USB + pin 5, a Signal-TX + pin 7 and a Signal-TX-pin 9 which are arranged in sequence, and the second functional pins can comprise a second Control pin 10 (Control-L2), a USB-pin 8, a Signal-RX + pin 6 and a Signal-RX-pin 4 which are arranged in sequence; the first control pin 3 and the second control pin 10 are in central symmetry with the center of the preset surface, the USB + pin 5 and the USB-pin 8 are in central symmetry with the center of the preset surface, the Signal-TX + pin 7 and the Signal-RX + pin 6 are in central symmetry with the center of the preset surface, and the Signal-TX-pin 9 and the Signal-RX-pin 4 are in central symmetry with the center of the preset surface.

It should be noted that the conventional POGO PIN male connectors include several specifications of 2 × 3PIN,2 × 5PIN, and 2 × 6PIN, and the POGO PIN male connector of each specification can be designed in such a way that the preset plane center is symmetric.

In general, the present application provides a POGO PIN male connector. Through specific design, the first power PIN 1, the first function PIN and the first grounding PIN 11 are sequentially arranged on the shell, the second power PIN 12, the second function PIN and the second grounding PIN 2 are sequentially arranged, the first power PIN 1 and the second power PIN 12 are in central symmetry along the center of the preset plane, the first function PIN and the second function PIN are in central symmetry along the center of the preset plane, the first grounding PIN 11 and the second grounding PIN 2 are in central symmetry along the center of the preset plane, the POGO male connector is identical to the original layout after rotating 180 degrees in the design mode, even if the POGO male connector is reversely connected, the situation that a central control panel is burnt out due to short circuit in the prior art can be avoided, and the safety is improved.

On the basis of the above-described embodiment:

please refer to fig. 2, fig. 3, fig. 4, fig. 5, fig. 6, fig. 7, fig. 8, fig. 9 and table 1, fig. 2 is the utility model provides a structural schematic diagram of another kind of POGO PIN male connector, fig. 3 is the utility model provides a structural schematic diagram of another kind of POGO PIN male connector, fig. 4 is the utility model provides a structural schematic diagram of another kind of POGO PIN male connector, fig. 5 is the utility model provides a structural schematic diagram of another kind of POGO PIN male connector, fig. 6 is the utility model provides a structural schematic diagram of another kind of POGO PIN male connector, fig. 7 is the utility model provides a structural schematic diagram of another kind of POGO PIN male connector, fig. 8 is the utility model provides a structural schematic diagram of another kind of POGO PIN male connector, fig. 9 is the utility model provides a structural schematic diagram of another kind of POGO PIN male connector, table 1 is the utility model provides a POGO PIN male connector's schematic diagram.

As a preferred embodiment, the first function PIN includes a first control PIN 3, the second function PIN includes a second control PIN 10, the pogo PIN male connector further includes a first resistor R1, a second resistor R2, a first controllable switch Q1, a third resistor R3, a fourth resistor R4 and a second controllable switch Q2;

the control end of the first controllable switch Q1 is connected with the CPU, the first end is connected with the system ground, the second end is connected with one end of a first resistor R1, the other end of the first resistor R1 is respectively connected with one end of a second resistor R2 and a first control pin 3, and the other end of the second resistor R2 is connected with a power supply; the control end of the second controllable switch Q2 is connected with the CPU, the first end is connected with the system ground, the second end is connected with one end of a third resistor R3, the other end of the third resistor R3 is respectively connected with one end of a fourth resistor R4 and a second control pin 10, and the other end of the fourth resistor R4 is connected with a power supply;

the first controllable switch Q1 is used for being switched on when the signal of the CPU is at a high level and being switched off when the signal of the CPU is at a low level;

the second controllable switch Q2 is used to be turned on when the signal of the CPU is at a high level and turned off when the signal of the CPU is at a low level.

A protection structure is arranged between the first control pin 3 and the CPU, the protection structure is composed of a first resistor R1, a second resistor R2 and a first controllable switch Q1, the second resistor R2 is connected with the power supply and is equivalent to a pull-up resistor, when the signal input by the CPU is in a high level, the first controllable switch Q1 is conducted, the voltage on the first control pin 3 is reduced and is the voltage after the power supply is divided by the first resistor R1 and the second resistor R2, when the signal input by the CPU is in a low level, the first controllable switch Q1 is disconnected, the voltage on the first control pin 3 is increased, the pin voltage is the voltage of the power supply, so the control effect of the CPU is finished, however, the control logics are just opposite, that is, when the signal input by the CPU is at a high level, the voltage of the first control pin 3 is low, when the signal input by the CPU is at a low level, the voltage of the first control pin 3 is high, the principles of the third resistor R3 and the fourth resistor R4 arranged between the second control pin 10 and the CPU, and the protection structure arranged between the second controllable switch Q2 and the first control pin 3 and the CPU are the same, and meanwhile, the first controllable switch Q1 and the second controllable switch Q2 play a role in isolation protection, even if the power supply pin is connected with the control pin, the CPU is not burned out due to the isolation of the controllable switches, so that the reliability of the scheme is improved, and the safety is improved.

It should be noted that there are two control PINs of the POGO PIN male connector, so that two controllable switches need to be set for protection, and each control PIN is connected to one of the controllable switches, thereby playing a role of sufficient protection.

As a preferred embodiment, the first controllable switch Q1 is a first NPN transistor, and the second controllable switch Q2 is a second NPN transistor;

a collector of the first NPN triode is used as a second end of the first controllable switch Q1, a base of the first NPN triode is used as a control end of the first controllable switch Q1, and an emitter of the first NPN triode is used as a first end of the first controllable switch Q1;

the collector of the second NPN transistor serves as the second end of the second controllable switch Q2, the base serves as the control end of the second controllable switch Q2, and the emitter serves as the first end of the second controllable switch Q2.

The first controllable switch Q1 selects an NPN triode which can meet the function of a protection circuit, when a signal input by a CPU is in a high level, the first NPN triode is conducted, at the moment, the voltage on the first control pin 3 is reduced and is the voltage after the power supply is divided by the first resistor R1 and the second resistor R2, when the signal input by the CPU is in a low level, the first NPN triode is disconnected, at the moment, the voltage on the first control pin 3 is increased, and the pin voltage is the voltage of the power supply, so that the control effect of the CPU is finished.

It should be noted that there are two control PINs of the POGO PIN male connector, so that two NPN transistors need to be provided for protection, and each control PIN is connected to one of the NPN transistors, thereby achieving a sufficient protection effect.

As a preferred embodiment, the first function pins comprise a first control pin 3, a USB + pin 5, a Signal-TX + pin 7 and a Signal-TX-pin 9 which are arranged in sequence, and the second function pins comprise a second control pin 10, a USB-pin 8, a Signal-RX + pin 6 and a Signal-RX-pin 4 which are arranged in sequence;

the first control pin 3 and the second control pin 10 are in central symmetry with the center of the preset surface, the USB + pin 5 and the USB-pin 8 are in central symmetry with the center of the preset surface, the Signal-TX + pin 7 and the Signal-RX + pin 6 are in central symmetry with the center of the preset surface, and the Signal-TX-pin 9 and the Signal-RX-pin 4 are in central symmetry with the center of the preset surface.

The first functional pins comprise a first control pin 3, a USB + pin 5, a Signal-TX + pin 7 and a Signal-TX-pin 9 which are sequentially arranged, the second functional pins comprise a second control pin 10, a USB-pin 8, a Signal-RX + pin 6 and a Signal-RX-pin 4 which are sequentially arranged, the functional pins can be changed according to requirements, but the corresponding pins all meet the setting that the center of the preset surface is centrosymmetric, and the completeness of the scheme is improved.

TABLE 1

PIN	Network name	Description of signal definitions
			1	POWER1	Power supply anode
2	GND	Negative pole of power supply
			3	CONTROL-L1	Control signal	1
4	SIGNAL-RX-	Network port signal receiving load
			5	USB+	USB Signal rectifier
6	SIGNAL-RX+	Network port signal receiving device
			7	SIGNAL-TX+	Network port signal transmission
8	USB-	USB signal negative
			9	SIGNAL-TX-	Network port signal sending load
10	CONTROL-L2	Control signal 2
			11	GND	Negative pole of power supply
12	POWER2	Power supply anode

In addition, the POGO PIN male connector comprises several specifications of 2X 3PIN, 2X 5PIN and 2X 6PIN, functional PINs with different specifications are different, but the corresponding PINs all meet the setting that the center of the preset surface is centrosymmetric.

As a preferred embodiment, the first function PIN includes a first control PIN 3, the second function PIN includes a second control PIN 10, the POGO PIN male connector further includes a fifth resistor R5, a first end of the fifth resistor R5 is connected to a power supply, a second end is connected to a sampling end of the CPU, a second end of the fifth resistor R5 is further used for being connected to the first control PIN 3 or the second control PIN 10 in the POGO PIN female connector, the first control PIN 3 in the POGO PIN female connector is connected to a system ground through a sixth resistor R6, the second control PIN 10 in the POGO PIN female connector is connected to the system ground through a seventh resistor R7, and the resistances of the sixth resistor R6 and the seventh resistor R7 are different, so that the CPU determines the connection mode of the POGO PIN male connector and the POGO PIN female connector according to the voltage value of the sampling end.

The POGO PIN male connector is divided into a positive connection condition and a reverse connection condition, and a PIN for transmitting data is divided into a positive part and a negative part, so that whether the POGO PIN male connector is in the positive connection or the reverse connection condition is determined, and then the subsequent steps are convenient to execute, firstly, the positive and reverse connection method is determined to be the voltage value of a sampling end of a CPU, and the connection relation can be known, the group lengths of resistors connected with the system ground, which are connected with a first control PIN 3 and a second control PIN 10, of the POGO PIN male connector are different, namely, the sampling end of the CPU is possibly connected with one of the first control PIN 3 and the second control PIN 10, when the sampling end of the CPU is connected with the first control PIN 3, voltage division is carried out through a fifth resistor R5 and a sixth resistor R6, at the moment, the sampling end of the CPU has a voltage value, when the sampling end of the CPU is connected with the second control PIN 10, voltage division is carried out through the fifth resistor R5 and a seventh resistor R7, the sampling end of the CPU has a voltage value, and the sampling end connector can be improved according to the feasibility scheme that the voltage value of the POGO PIN is different from that the voltage value.

For example, the resistance of the fifth resistor R5 is 100K ohms, the resistance of the sixth resistor R6 is 100K ohms, the resistance of the seventh resistor R7 is 50K ohms, the voltage of the power supply is 3.3V, when the sampling end of the cpu is connected to the first control PIN 3, the voltage of the sampling end is 1.65v, when the sampling end of the cpu is connected to the second control PIN 10, the voltage of the sampling end is 1.1V, and the connection mode of the POGO PIN male connector and the POGO PIN female connector can be determined according to the difference of the voltage values.

As a preferred embodiment, the device further comprises a diode, an anode of the diode is connected to the sampling terminal of the CPU and the second terminal of the fifth resistor R5, respectively, and a cathode of the diode is used for being connected to the first control PIN 3 or the second control PIN 10 in the POGO PIN female connector.

The diode is arranged at the sampling end of the CPU and connected with the sampling end of the CPU and the second end of the fifth resistor R5, the diode is used for preventing backflow and preventing current from being reversed, the current is prevented from flowing back to the CPU to damage the CPU, and reliability and safety of the scheme are improved.

As a preferred embodiment, the first functional PIN further includes a positive data transmission PIN, the second functional PIN further includes a negative data transmission PIN, and the POGO PIN male connector further includes a signal switching module U1;

a first data positive transmission end of the signal switching module U1 is connected with a data positive transmission PIN of the POGO PIN male connector, a first data negative transmission end of the signal switching module U1 is connected with a data negative transmission PIN of the POGO PIN male connector, and a second data positive transmission end, a second data negative transmission end, a third data positive transmission end, a third data negative transmission end and a switching end of the signal switching module U1 are all connected with the CPU;

when a data positive transmission PIN of the POGO PIN male end connector is connected with a data positive transmission PIN of the POGO PIN female end connector, and a data negative transmission PIN of the POGO PIN male end connector is connected with a data negative transmission PIN of the POGO PIN female end connector, the signal switching module U1 is used for connecting a second data positive transmission end with a first data positive transmission end according to a signal of the sampling end, and connecting a second data negative transmission end with a first data negative transmission end;

when the data positive transmission PIN of the POGO PIN male end connector and the data negative transmission PIN of the POGO PIN female end connector are connected, the signal switching module U1 is used for connecting a third data negative transmission end with a first data positive transmission end according to a switching signal of a sampling end, and the third data positive transmission end is connected with the first data negative transmission end.

The POGO PIN male connector of the mainboard is fixedly connected with the signal switching module U1, the signal switching module U1 is provided with two transmission ends, a first data positive transmission end of the signal switching module U1 is connected with a data positive transmission PIN of the POGO PIN male connector, a first data negative transmission end of the signal switching module U1 is connected with a data negative transmission PIN of the POGO PIN male connector, the connection is fixed, a CPU has previously acquired the connection mode of the POGO PIN male connector and the POGO PIN female connector, according to the difference of the connection modes, the switching end of the signal switching module U1 can receive different switching signals, the signal switching module U1 comprises two conditions, when the data positive transmission PIN of the POGO male connector is connected with the data positive transmission PIN of the POGO PIN female connector, when the data negative transmission PIN of the POGO male connector is connected with the data negative transmission PIN of the POGO female connector, the PIN male connector and the POGO female connector are connected, the signal switching module U1 connects the second data positive transmission end with the first data positive transmission end, the second data transmission end is connected with the data negative transmission PIN of the POGO female connector, the first data transmission end, the third data transmission end is connected with the first data transmission PIN, and the third data transmission end are connected with the first data transmission end.

It should be noted that, when the connection mode of the POGO PIN male connector and the POGO PIN female connector is positive connection, that is, the sampling terminal of the CPU is connected to the first control PIN 3, the switching signal of the switching terminal is a high level signal, and when the connection mode of the POGO PIN male connector and the POGO PIN female connector is negative connection, that is, the sampling terminal of the CPU is connected to the second control PIN 10, and the switching signal of the switching terminal is a low level signal.

In addition, the data transmission end of the CPU may transmit USB SIGNALs or SIGNAL transceiving SIGNALs, which is not limited herein.

As a preferred embodiment, the first power pin 1 is connected to the second power pin 12, and the first ground pin 11 is connected to the second ground pin 2;

the POGO PIN male connector also comprises an eighth resistor R8 and a third controllable switch Q3, one end of the eighth resistor R8 is connected with the first power supply PIN 1, the other end of the eighth resistor R8 is connected with the control end of the third controllable switch Q3, the first end of the third controllable switch Q3 is connected with the second grounding PIN 2, and the second end of the third controllable switch Q3 is connected with the system ground;

the third controllable switch Q3 is used to be turned on when there is a power input at the control terminal and turned off when there is no power input.

A protection structure can be further arranged between the grounding pin and the power supply pin, an eighth resistor R8 and a third controllable switch Q3 are added, the third controllable switch Q3 is switched on when power supply input exists at the control end and is switched off when power supply input does not exist, original logic cannot be changed, the grounding pin is continuously connected with a system ground when the power supply input exists, once the power supply pin and the grounding pin are short-circuited, the third controllable switch Q3 is switched off, the power supply pin cannot be connected with the system ground, the power supply is not directly connected with the system ground, short circuit cannot be caused, and safety is improved.

In a preferred embodiment, the third controllable switch Q3 is an N-MOS transistor, a gate of the N-MOS transistor serves as a control terminal of the third controllable switch Q3, a source of the N-MOS transistor serves as a first terminal of the third controllable switch Q3, and a drain of the N-MOS transistor serves as a second terminal of the third controllable switch Q3.

The N-MOS tube is used as a third controllable switch Q3, the N-MOS tube is switched on when power is input at the control end, and is switched off when no power is input, the original logic cannot be changed, the grounding pin is continuously connected with the system ground when the power is input, once the power pin and the grounding pin are in short circuit, the N-MOS tube is switched off, the power pin cannot be connected with the system ground, the power is not directly connected with the system ground, the short circuit cannot be caused, and the safety is improved.

The utility model also provides a POGO PIN connector, including POGO PIN female end connector, still include as above-mentioned POGO PIN male end connector, POGO PIN female end connector with POGO PIN male end connector connects.

To the utility model provides an please refer to the aforesaid for the introduction of POGO PIN connector the embodiment of POGO PIN male end connector, this is no longer repeated.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.

Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

Claims

1. A POGO PIN male connector is characterized by comprising a shell, a first power supply PIN, a second power supply PIN, a first grounding PIN, a second grounding PIN, a first function PIN and a second function PIN, wherein the first power supply PIN, the second power supply PIN, the first grounding PIN, the second grounding PIN, the first function PIN and the second function PIN are arranged on a preset surface of the shell;

2. The POGO PIN male connector of claim 1, wherein the first function PIN comprises a first control PIN and the second function PIN comprises a second control PIN, the POGO PIN male connector further comprising a first resistor, a second resistor, a first controllable switch, a third resistor, a fourth resistor, and a second controllable switch;

the second controllable switch is used for being switched on when the signal of the CPU is in a high level and being switched off when the signal of the CPU is in a low level.

3. The POGO PIN male connector of claim 2, wherein the first controllable switch is a first NPN transistor and the second controllable switch is a second NPN transistor;

and a collector of the second NPN triode serves as a second end of the second controllable switch, a base of the second NPN triode serves as a control end of the second controllable switch, and an emitter of the second NPN triode serves as a first end of the second controllable switch.

4. The POGO PIN male connector of claim 1, wherein the first functional PINs comprise a first control PIN, a USB + PIN, a Signal-TX + PIN, and a Signal-TX-PIN arranged in sequence, and the second functional PINs comprise a second control PIN, a USB-PIN, a Signal-RX + PIN, and a Signal-RX-PIN arranged in sequence;

5. The POGO PIN male connector of claim 1, wherein the first functional PIN comprises a first control PIN, the second functional PIN comprises a second control PIN, the POGO PIN male connector further comprises a fifth resistor, a first end of the fifth resistor is connected with a power supply, a second end of the fifth resistor is connected with a sampling end of the CPU, a second end of the fifth resistor is further used for being connected with the first control PIN or the second control PIN of the POGO PIN female connector, the first control PIN of the POGO PIN female connector is systematically connected with a sixth resistor, the second control PIN of the POGO PIN female connector is systematically connected with a seventh resistor, and the sixth resistor and the seventh resistor have different resistances, so that the CPU determines the connection mode of the POGO PIN male connector and the POGO PIN female connector according to the voltage value of the sampling end.

6. The POGO PIN male connector of claim 5, further comprising a diode, wherein an anode of the diode is connected to the sampling terminal of the CPU and the second terminal of the fifth resistor, and a cathode of the diode is connected to the first control PIN or the second control PIN of the POGO PIN female connector.

7. The POGO PIN male connector of claim 5, wherein the first functional PINs further comprise positive data transmission PINs, the second functional PINs further comprise negative data transmission PINs, the POGO PIN male connector further comprising a signal switching module;

when a data positive transmission PIN of the POGO PIN male connector is connected with a data positive transmission PIN of the POGO PIN female connector, and a data negative transmission PIN of the POGO PIN male connector is connected with a data negative transmission PIN of the POGO PIN female connector, the signal switching module is used for connecting the second data positive transmission terminal with the first data positive transmission terminal according to a signal of the sampling terminal, and the second data negative transmission terminal is connected with the first data negative transmission terminal;

8. A POGO PIN male connector according to any of claims 1 to 7, wherein the first power PIN is connected to the second power PIN and the first ground PIN is connected to the second ground PIN;

the POGO PIN male connector further comprises an eighth resistor and a third controllable switch, one end of the eighth resistor is connected with the first power supply PIN, the other end of the eighth resistor is connected with the control end of the third controllable switch, the first end of the third controllable switch is connected with the second grounding PIN, and the second end of the third controllable switch is connected with the system ground;

9. The POGO PIN male connector of claim 8, wherein the third controllable switch is an N-MOS transistor, the gate of the N-MOS transistor serves as the control terminal of the third controllable switch, the source of the N-MOS transistor serves as the first terminal of the third controllable switch, and the drain of the N-MOS transistor serves as the second terminal of the third controllable switch.

10. A POGO PIN connector comprising a POGO PIN female connector and a POGO PIN male connector as claimed in any of claims 1 to 9, said POGO PIN female connector being connected to said POGO PIN male connector.