CN217181423U

CN217181423U - CAN bus test box

Info

Publication number: CN217181423U
Application number: CN202220415075.6U
Authority: CN
Inventors: 丁汉绅; 郭昊
Original assignee: Bosch Huayu Steering Systems Co Ltd
Current assignee: Bosch Huayu Steering Systems Co Ltd
Priority date: 2022-02-28
Filing date: 2022-02-28
Publication date: 2022-08-12
Anticipated expiration: 2032-02-28

Abstract

The utility model discloses a CAN bus test box, which comprises a shell and a PCB circuit board, wherein the utility model uses the printed circuit board to replace a manually manufactured circuit, reduces the resistance and parasitic capacitance introduced by manual welding, and leads the test circuit to be closer to the requirement of test specification; the switching of each load capacitor is realized through knob selection, so that damage to a test board caused by repeated soldering modification is avoided, and the test time cost is saved; the communication line is cut off by the normally closed switch, and the double-throw switch short-circuits the communication line, so that the situation that the communication line is manually broken or short-circuited to damage a system for multiple times and obtain abnormal test results can be avoided.

Description

CAN bus test box

Technical Field

The utility model relates to a communication bus test technique especially relates to a CAN bus test box.

Background

At present, in the development process of automobile parts, part manufacturers are required to test CAN/CAN FD communication between parts and a finished automobile at each level, wherein physical layer testing relates to testing of electrical properties, communication functions, interference resistance and the like of a physical layer by using an external testing circuit. Currently, there is no special test tool for physical layer test, and a common test method is as follows: welding a circuit board according to a standard test circuit provided by a physical layer test specification; selecting and welding a corresponding terminal resistor of the test end according to terminal resistor parameters carried by the part; measuring electrical properties of CAN/CAN FD communication, such as level, input resistance, output resistance, bit time, by using an oscilloscope, a universal meter and other equipment; manually disconnecting CANH, CANL or simultaneously disconnecting CANH and CANL communication lines, reconnecting after a period of time, and observing the delay time of reestablishing connection

The problems in this test procedure are: the quality of the welded circuit board is difficult to ensure; different circuit boards need to be welded for projects with different terminal resistors, and the workload is increased; manual disconnection and reconnection may cause multiple short contacts at the time of connection, so that the functional test obtains an abnormal result.

Disclosure of Invention

In order to solve the technical problem, the utility model provides a CAN bus test box, which comprises a shell and a PCB circuit board, wherein the PCB circuit board is fixed on the shell; the PCB circuit board is provided with the following devices:

the device comprises a tested component communication interface, a simulation tool CAN communication interface, a power supply interface, a simulation tool simulation interface, an oscilloscope interface, a first optional load capacitor bank, a second optional load capacitor bank, a maximum bus load capacitor bank, a first terminal resistor bank, a second terminal resistor bank, a third optional terminal resistor bank and 7 on-off switches;

the PCB circuit board also comprises a CANH line, a CANL line, a VCC line and a GND line; the communication interface of the tested component is connected with a CANH line and a CANL line; the simulation tool CAN communication interface is connected with an oscilloscope interface in series, and the oscilloscope interface is connected with a CANH line and a CANL line through the on-off switch;

the power interface is connected with a VCC line and a GND line; the simulation interface of the simulation tool is connected with a CANL line and a GND line; the first optional load capacitor bank is connected with a CANH line, and the second optional load capacitor bank is connected with a CANL line; the maximum bus load capacitor group, the first terminal resistor group, the second terminal resistor group and the third optional terminal resistor group are respectively connected across a CANH line and a CANL line;

preferably, the 7 on-off switches are respectively:

a fifth switch (S5), which is a two-pole normally-closed push-button switch (S5), and is connected in series with the VCC line and the CANH line for simultaneously cutting off the VCC line and the CANH line;

a sixth switch (S6) which is a two-pole normally-closed push-button switch and which connects the VCC line and the CANL line in series and cuts off the VCC line and the CANL line at the same time;

a seventh switch (S7) which is a three-pole normally closed push button switch and which connects the VCC line, the CANH line, and the CANL line in series and cuts off the VCC line, the CANH line, and the CANL line at the same time;

an eighth switch (S8), the eighth switch (S8) being a double pole double throw switch, for shorting the CANH line to the supply and simultaneously disconnecting the VCC line;

a ninth switch (S9), the ninth switch (S9) being a double pole double throw switch, for short-circuiting the CANH line to ground and simultaneously disconnecting the VCC line;

a tenth switch (S10), the tenth switch (S10) being a double pole double throw switch for short circuiting the CANL line to the supply and simultaneously disconnecting the VCC line;

an eleventh switch (S11), the eleventh switch (S11) being a double pole double throw switch for shorting the CANL line to ground and simultaneously disconnecting the VCC line.

Preferably, the first selectable load capacitance group comprises: a fifth capacitance (C5), the fifth capacitance (C5) being a minimum load capacitance; a sixth capacitance (C6), the sixth capacitance (C6) being a maximum load capacitance; a first switch (S1), the first switch (S1) is a three-position knob switch, and the fifth capacitor (C5), the sixth capacitor (C6) or any load is selected to be connected.

Preferably, the second selectable load capacitance group comprises: a third capacitance (C3), the third capacitance (C3) being a minimum load capacitance; a fourth capacitance (C4), the fourth capacitance (C4) being a maximum load capacitance; an eighth capacitance (C8), the eighth capacitance (C8) being an asymmetric minimum load capacitance; a ninth capacitance (C9), the ninth capacitance (C9) being a non-stacked maximum load capacitance; and the second switch (S2) is a five-gear knob switch, and is selectively connected with the third capacitor (C3), the fourth capacitor (C4), the eighth capacitor (C8) and the ninth capacitor (C9) or is not connected with any load.

Preferably, the maximum bus load capacitance group is composed of a third switch (S3) and a seventh capacitor (C7) in series; the third switch (S3) is a single pole, single throw switch and the seventh capacitor (C7) is a maximum bus load capacitance.

Preferably, the first terminal resistor group consists of a first resistor (R1), a second resistor (R2) and a first capacitor (C1); the first resistor (R1) is connected with the second resistor (R2) in series, one end of the first capacitor (C1) is connected with the middle of the first resistor (R1) and the second resistor (R2), and the other end of the first capacitor (C1) is grounded.

Preferably, the second terminal resistor group consists of a third resistor (R3), a fourth resistor (R4) and a second capacitor (C2); the third resistor (R3) is connected with the fourth resistor (R4) in series, one end of the second capacitor (C2) is connected with the middle of the third resistor (R3) and the fourth resistor (R4), and the other end of the second capacitor (C2) is grounded.

Preferably, the third selectable termination resistance group is composed of a fourth switch (S4), a fifth resistor (R5), and a sixth resistor (R6); the fourth switch (S4) is a third-gear knob switch, can be selectively connected with a fifth resistor (R5), a sixth resistor (R6) or not additionally connected with a terminal, and is connected with the fifth resistor (R5) and the sixth resistor (R6) in parallel.

Preferably, the communication interface of the tested component is a DB9 interface (T1), the CAN communication interface of the simulation tool is a DB9 interface (T2), the simulation interface of the simulation tool is a DB9 interface (T3), the interface of the oscilloscope is two testing metal posts (T4), and the power supply interface is a banana socket.

Compared with the prior art, the utility model provides a CAN FD bus test box according to automobile communication test standard design CAN carry out the test of communication physical layer to compare and test in manual system circuit board of welding and have higher accuracy, CAN improve the efficiency of test. The utility model uses the printed circuit board to replace the circuit made manually, reduces the resistance and parasitic capacitance introduced by manual welding, and leads the test circuit to be closer to the requirement of test specification; the switching of each load capacitor is realized through knob selection, so that damage to a test board caused by repeated soldering modification is avoided, and the test time cost is saved; the normally closed switch is used for cutting off the communication line, and the double throw switch is used for short-circuiting the communication line, so that the phenomenon that the communication line is broken or short-circuited manually to cause multiple short-circuiting damage to a system and obtain abnormal test results can be avoided; the whole VCC circuit is used as the input of a switch change signal, the switch change CAN be monitored by using a simulation input port of a Vector CAN tool, the communication condition of a CAN bus under various fault conditions CAN be intuitively reflected through the monitoring waveform, and if the bus communication is disconnected, the recovery time of the CAN bus communication after the fault is removed CAN be confirmed.

Drawings

FIG. 1 is a schematic diagram of an embodiment PCB circuit board circuit;

FIG. 2 is a partial schematic view of an embodiment of PCB circuit board traces;

Detailed Description

A specific embodiment of the utility model provides a CAN bus test box, including casing and PCB circuit board, the PCB circuit board is fixed on the casing.

The PCB circuit board is provided with the following devices: the device comprises a tested component communication interface, a simulation tool CAN communication interface, a power supply interface, a simulation tool simulation interface, an oscilloscope interface, a first optional load capacitor bank, a second optional load capacitor bank, a maximum bus load capacitor bank, a first terminal resistor bank, a second terminal resistor bank, a third optional terminal resistor bank and 7 on-off switches;

the PCB circuit board also comprises a CANH line, a CANL line, a VCC line and a GND line;

the communication interface of the tested component is connected with a CANH line and a CANL line; the simulation tool CAN communication interface is connected with an oscilloscope interface in series, and the oscilloscope interface is connected with a CANH line and a CANL line through the on-off switch;

more specifically, as shown in fig. 1:

the communication interface of the tested part is an exemplary DB9 interface T1, for example, T1 is a DB9 female interface, PIN7 is connected with a CANH line, and PIN2 is connected with a CANL line;

the CAN communication interface of the simulation tool is a DB9 interface T2, for example, T2 is a DB9 male end, PIN7 is connected with a CANH line, and PIN2 is connected with a CANL line;

the simulation tool simulation interface is a DB9 interface T3, for example, T3 is a DB9 female terminal, PIN1 is connected with a VCC line, PIN9 is connected with a GND line and is used for connecting a simulation tool, for example, a simulation input port of a Vector CAN tool;

the oscilloscope interface is two testing metal columns T4, for example, two metal column testing points, which are used for clamping the oscilloscope;

the power interface is a banana socket. The input end of the GND line is connected with the banana socket and is used for being connected with the negative electrode of a power supply; the input end of the VCC line is connected with the banana jack and is used for connecting 12V power supply;

exemplarily, the 7 on-off switches are respectively:

a fifth switch S5, where the fifth switch S5 is a two-pole normally-closed button switch, and is connected in series with the VCC line and the CANH line, and is used to cut off the VCC line and the CANH line at the same time;

a sixth switch S6, the sixth switch S6 being a two-pole normally closed push button switch, connected in series to the VCC line and the CANL line, and configured to simultaneously disconnect the VCC line and the CANL line;

a seventh switch S7, the seventh switch S7 being a three-pole normally closed push button switch, connected in series with the VCC line, CANH line, and CANL line, and configured to simultaneously disconnect the VCC line, CANH line, and CANL line;

an eighth switch S8, the eighth switch S8 being a double pole double throw switch for shorting the CANH line to the supply and simultaneously disconnecting the VCC line;

a ninth switch S9, the ninth switch S9 being a double pole double throw switch for shorting the CANH line to ground and simultaneously disconnecting the VCC line;

a tenth switch S10, the tenth switch S10 being a double pole double throw switch for short circuiting the CANL line to the supply and simultaneously disconnecting the VCC line;

an eleventh switch S11, the eleventh switch S11 being a double pole double throw switch for shorting the CANL line to ground and simultaneously disconnecting the VCC line.

Illustratively, the first selectable load capacitance bank includes: a fifth capacitor C5, wherein the fifth capacitor C5 is a minimum load capacitor of 100 pF; a sixth capacitor C6, the sixth capacitor C6 being a maximum load capacitor of 3.3 nF; the first switch S1, the first switch S1 is a three-step knob switch, and is selectively connected to the fifth capacitor C5, the sixth capacitor C6 or not connected to any load.

Illustratively, the second selectable load capacitance bank includes: a third capacitor C3, the third capacitor C3 being a minimum load capacitor of 100 pF; a fourth capacitor C4, the fourth capacitor C4 being a maximum load capacitance of 3.3 nF; an eighth capacitor C8, wherein the eighth capacitor C8 is an asymmetric minimum load capacitor 80 pF; a ninth capacitor C9, the ninth capacitor C9 being a non-stacked maximum load capacitor of 2.64 nF; and the second switch S2 is a fifth-gear knob switch S2, and is selectively connected with the third capacitor C3, the fourth capacitor C4, the eighth capacitor C8 and the ninth capacitor C9 or not connected with any load.

Illustratively, the maximum bus load capacitance group is composed of a third switch S3 and a seventh capacitor C7 in series; the third switch S3 is a single-pole single-throw switch, and the seventh capacitor C7 is a maximum bus load capacitance of 1.6 nF.

Illustratively, the first terminal resistor group consists of a first resistor R1, a second resistor R2 and a first capacitor C1; the first resistor R1 is connected in series with the second resistor R2, one end of the first capacitor C1 is connected to the middle of the first resistor R1 and the second resistor R2, and the other end of the first capacitor C1 is grounded.

The second terminal resistor group consists of a third resistor R3, a fourth resistor R4 and a second capacitor C2; the third resistor R3 is connected in series with the fourth resistor R4, one end of the second capacitor C2 is connected with the middle of the third resistor R3 and the fourth resistor R4, and the other end of the second capacitor C2 is grounded.

The resistance values and capacitance values of R1, R2, C1, R3, R4 and C2 are determined by peripheral circuits used in a test standard, which is a pan sub test standard in this embodiment.

Illustratively, the third selectable termination resistor group consists of a fourth switch S4, a fifth resistor R5180 Ω and a sixth resistor R6191 Ω; the fourth switch S4 is a third-gear knob switch, and can be selectively connected with a fifth resistor R5, a sixth resistor R6 or not additionally connected with a terminal, and the fifth resistor R5 and the sixth resistor R6 are connected in parallel.

As shown in FIG. 2, the fifth switch S5 has a first path S5-1 and a second path S5-2; the sixth switch S6 has a first S6-1 and a second S6-2; the seventh switch S7 has a first path S7-1, a second path S7-2 and a third path S7-3; the eighth switch S8 includes a first S8-1 and a second S8-2; the ninth switch S9 has a first S9-1 and a second S9-2; a tenth switch S10, a first S10-1 and a second S10-2; the eleventh switch S11 has a first path S11-1 and a second path S11-2.

The CANH lines are connected in series with S5-1 and S7-1 and then connected to a PIN7 of a DB9 port of T2; the CANL is connected with S6-1 and S7-2 in series and then connected to a PIN2 of a DB9 port of T2; a fixed contact of an S8-1 double-throw switch is connected in series on a CANH line, and two ends of the double throw switch are respectively connected with VCC and are not connected; the CANH circuit is connected with a fixed contact of an S9-1 double-throw switch in series, and two ends of the double throw switch are respectively connected with GND and are not connected; a fixed contact of an S10-1 double-throw switch is connected in series with a CANL circuit, and two ends of the double throw switch are respectively connected with VCC and are not connected; a fixed contact of an S11-1 double-throw switch is connected in series with a CANL circuit, and two ends of the double throw switch are respectively connected with GND and are not connected; the method is characterized in that an external power supply VCC is connected with a banana socket, the VCC is connected with selective contacts of S8-1 and S10-1, and is also connected with S5-2, S8-2, S9-2, S7-3, S10-2, S11-2 and S6-2 in series, and finally connected with a PIN1 of a DB9 port of T3; PIN9 of DB9 port of T3 connected to banana jack of GND; s5, S6 and S7 are in an off state by default, S8-1, S9-1, S10-1 and S11-1 are not connected by default, and S8-2, S9-2, S10-2 and S11-2 are connected with VCC by default; two test metal columns T4 are arranged in the middle of S7 to T2, and oscilloscope measurement is facilitated.

The knob, the button switch, the shift switch, the banana socket, the DB9 male and female terminals and the like are welded and assembled on the PCB, the PCB is fixed on the aluminum shell through bolts, the GND circuit is connected with the shell, and finally, the shell is marked with resistance values and capacitance values of all gears and functions of all switches.

Use the utility model discloses test and compare and test in manual welding circuit board and have higher accuracy, can improve the efficiency of test. The utility model uses the printed circuit board to replace the manually manufactured circuit, reduces the resistance and parasitic capacitance introduced by manual welding, uses high-precision SMT resistance capacitance, and leads the test circuit to be closer to the requirement of test specification; the switching of each load capacitor is realized through knob selection, so that damage to a test board caused by repeated soldering modification is avoided, and the test time cost is saved; the normally closed switch is used for cutting off the communication line, and the double throw switch is used for short-circuiting the communication line, so that the phenomenon that the communication line is broken or short-circuited manually to cause multiple short-circuiting damage to a system and obtain abnormal test results can be avoided; the whole VCC circuit is used as the input of the switch change signal, the simulation input port of a Vector CAN tool CAN be used for monitoring the switch change, the communication condition of the CAN bus under various fault conditions CAN be visually reflected through the monitoring waveform, and if the bus communication is disconnected, the recovery time of the CAN bus communication after the fault is removed CAN be confirmed.

The following is an exemplary description of a specific method of using the CAN bus test cartridge.

The connection with the external device is as follows:

connecting a CAN/CAN FD communication interface of a tested part to a T1 end of a test box in a DB9 interface mode, connecting a CAN interface of a Vector CAN simulation tool to a T2 end of the test box, connecting a VCC (voltage supply) end and a GND (ground) end of the test box with a 12V direct-current power supply, connecting an analog input interface of the Vector CAN simulation tool to a T3 end of the test box, and connecting two probes of an oscilloscope to a T4 end.

The method for testing the dominant and recessive output voltages comprises the following steps: the simulation of the CAN bus is directly started, and the voltage is measured by an oscilloscope.

The method for performing the signal quality test comprises the following steps: adjusting S1 to C5100 pF, S2 to C3100 pF, S3 to stay off to simulate minimum symmetric load; adjusting S1 to C5100 pF, S2 to C880 pF, S3 to remain off to simulate a minimum asymmetric load; adjusting S1 to C63.3nF, S2 to C43.3nF, and keeping S3 closed to obtain a simulated maximum symmetric load; adjusting S1 to C63.3nF, S2 to C92.64nF, and keeping S3 closed to obtain a simulated maximum asymmetric load; according to the requirement of the experiment on the extra terminal resistor Rx, adjusting the switch S4 to be switched in R5 and R6 or not to be switched in Rx; and measuring the required voltage and oscillation condition by an oscilloscope.

The method for carrying out bit time test and bus baud rate change fault-tolerant test comprises the following steps: the same way as the load selection when performing signal quality tests, but without the need to provide an asymmetric load.

The method for testing disconnection of CAN bus connection comprises the following steps: the EPS communication frames and the analog input voltage are monitored on the simulation tool. Opening S5 to perform CANH disconnection test, observing the influence on bus communication after disconnection, and after closing S5, measuring the time from the rising edge of the analog input to the recovery of the bus communication; opening S6 to perform CANL disconnection test, observing bus communication performance, closing S6, and measuring recovery time; opening S7 to perform CANH and CANL simultaneous disconnection test, observing bus communication performance, closing S7, and measuring recovery time.

The method for testing the CAN bus short to the ground comprises the following steps: the EPS communication frames and the analog input voltage are monitored on the simulation tool. Pressing S9 to test CANH short-circuit to ground, observing the influence on bus communication after short-circuit, and after S9 is released, measuring the time from the rising edge of analog input to the recovery of bus communication; the CANL short to ground test is performed by pressing S11, the bus communication performance is observed, and the recovery time is measured after S11 is released.

The method for testing the short connection of the CAN bus to the power supply comprises the following steps: the EPS communication frames and the analog input voltage are monitored on the simulation tool. Pressing S8 to test CANH short circuit to power supply, observing the effect on bus communication after short circuit, and measuring the time from the rising edge of analog input to the recovery of bus communication after S8 is released; the CANL short to power test was performed by pressing S10, observing the bus communication performance, and after S10 was released, the recovery time was measured. The present invention has been described in detail with reference to the specific embodiments and examples, but these should not be construed as limitations of the present invention. Numerous variations and modifications can be made by those skilled in the art without departing from the principles of the invention, which should also be considered as within the scope of the invention.

Claims

1. The utility model provides a CAN bus test box, includes casing and PCB circuit board, PCB circuit board is fixed on the casing, its characterized in that:

the PCB circuit board is provided with the following devices:

the communication interface of the tested component is connected with a CANH line and a CANL line;

the simulation tool CAN communication interface is connected with an oscilloscope interface in series, and the oscilloscope interface is connected with a CANH circuit and a CANL circuit through the on-off switch;

the power interface is connected with a VCC line and a GND line;

the simulation interface of the simulation tool is connected with a CANL line and a GND line;

the first optional load capacitor bank is connected with a CANH line, and the second optional load capacitor bank is connected with a CANL line;

the maximum bus load capacitor group, the first terminal resistor group, the second terminal resistor group and the third optional terminal resistor group are respectively connected across a CANH line and a CANL line.

2. The CAN bus test cartridge of claim 1, wherein the 7 on-off switches are respectively:

an eighth switch (S8), the eighth switch (S8) being a double pole double throw switch, for short-circuiting the CANH line to the supply and simultaneously disconnecting the VCC line;

a ninth switch (S9), the ninth switch (S9) being a double pole double throw switch for short-circuiting the CANH line to ground and simultaneously disconnecting the VCC line;

3. The CAN bus test cassette of claim 1, wherein:

the first selectable load capacitance bank comprises:

a fifth capacitance (C5), the fifth capacitance (C5) being a minimum load capacitance;

a sixth capacitance (C6), the sixth capacitance (C6) being a maximum load capacitance;

a first switch (S1), the first switch (S1) is a three-position knob switch, and the fifth capacitor (C5), the sixth capacitor (C6) or any load is selected to be connected.

4. The CAN bus test cassette of claim 1, wherein:

the second selectable load capacitance bank includes:

a third capacitance (C3), the third capacitance (C3) being a minimum load capacitance;

a fourth capacitance (C4), the fourth capacitance (C4) being a maximum load capacitance;

an eighth capacitance (C8), the eighth capacitance (C8) being an asymmetric minimum load capacitance;

a ninth capacitance (C9), the ninth capacitance (C9) being a non-stacked maximum load capacitance;

and the second switch (S2) is a five-gear knob switch, and is selectively connected with the third capacitor (C3), the fourth capacitor (C4), the eighth capacitor (C8) and the ninth capacitor (C9) or is not connected with any load.

5. The CAN bus test cassette of claim 1, wherein:

the maximum bus load capacitance group is formed by connecting a third switch (S3) and a seventh capacitor (C7) in series;

the third switch (S3) is a single pole, single throw switch and the seventh capacitor (C7) is a maximum bus load capacitance.

6. The CAN bus test cassette of claim 1, wherein:

the first terminal resistor group consists of a first resistor (R1), a second resistor (R2) and a first capacitor (C1);

the first resistor (R1) is connected with the second resistor (R2) in series, one end of the first capacitor (C1) is connected with the middle of the first resistor (R1) and the second resistor (R2), and the other end of the first capacitor (C1) is grounded.

7. The CAN bus test cassette of claim 1, wherein:

the second terminal resistor group consists of a third resistor (R3), a fourth resistor (R4) and a second capacitor (C2);

the third resistor (R3) is connected with the fourth resistor (R4) in series, one end of the second capacitor (C2) is connected with the middle of the third resistor (R3) and the fourth resistor (R4), and the other end of the second capacitor (C2) is grounded.

8. The CAN bus test cassette of claim 1, wherein:

the third selectable termination resistance group is composed of a fourth switch (S4), a fifth resistor (R5) and a sixth resistor (R6);

the fourth switch (S4) is a third-gear knob switch, can be selectively connected with a fifth resistor (R5), a sixth resistor (R6) or not additionally connected with a terminal, and is connected with the fifth resistor (R5) and the sixth resistor (R6) in parallel.

9. The CAN bus test cassette of claim 1, wherein:

the tested part communication interface is a DB9 interface (T1), the simulation tool CAN communication interface is a DB9 interface (T2), the simulation tool simulation interface is a DB9 interface (T3), the oscilloscope interfaces are two testing metal columns (T4), and the power supply interface is a banana socket.