CN217159672U

CN217159672U - Time delay circuit

Info

Publication number: CN217159672U
Application number: CN202122253467.5U
Authority: CN
Inventors: 陈华健
Original assignee: Zhongshan Laili Technology Co ltd
Current assignee: Zhongshan Laili Technology Co ltd
Priority date: 2021-09-16
Filing date: 2021-09-16
Publication date: 2022-08-09
Anticipated expiration: 2031-09-16

Abstract

The utility model discloses a time delay circuit, which comprises a switch diode D1, and when the switch diode is conducted, the direct current power supply voltage is input; the capacitor charging module is charged by the input voltage of the switching diode; and the voltage comparison module is used for comparing a reference voltage input by the direct-current power supply with a comparison voltage input by the capacitor charging module and outputting a level to conduct the PMOS transistor T1 and the PMOS transistor T2, and the drain electrode of the PMOS transistor T1 is connected with the source electrode of the PMOS transistor T2. The utility model discloses a delay circuit has that the time delay effect is accurate, nimble practical advantage.

Description

Time delay circuit

Technical Field

The utility model belongs to the technical field of the control circuit technique and specifically relates to a delay circuit.

Background

The delay circuit is mainly applied to various electronic circuits and equipment which need a delay function. The controller in the present electronic circuit is mainly implemented by an MCU (micro control unit). For example, in the field of baking equipment such as gas cookers, the opening and closing of an electromagnetic valve in an electromagnetic cooker is mainly controlled by a Main Control Unit (MCU), and the whole process is realized by the function of the MCU. The action of the electromagnetic valve and the judgment of flame need the participation of the MCU, the MCU is frequently subjected to electromagnetic interference in the running process, or the self BUG and other reasons cause 'runaway', the misoperation is caused, accidents such as gas leakage and the like are caused, and the requirements on the MCU are higher. Generally, a time control function is integrated in the MCU, or time control is implemented through program setting, which increases the cost of the MCU and cannot reduce the electromagnetic interference on the MCU.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a delay circuit, the switch diode charges to the electric capacity module of charging, voltage comparison module is used for comparing its just, the voltage of negative pole input, corresponds output high level or low level, and electric capacity module of charging constantly promotes one of them input of voltage comparison module in charging process, and the time that produces in charging through the electric capacity module of charging realizes the purpose of this delay circuit delay output or disconnection, and it is accurate to have the time delay effect, nimble practical advantage.

In order to solve the technical problem, the utility model provides a technical scheme is: a delay circuit comprises

A switching diode D1 for inputting a dc power supply voltage when turned on;

the capacitor charging module is charged by the input voltage of the switching diode;

and the voltage comparison module is used for comparing a reference voltage input by the direct-current power supply with a comparison voltage input by the capacitor charging module and outputting a level to conduct the PMOS transistor T1 and the PMOS transistor T2, and the drain electrode of the PMOS transistor T1 is connected with the source electrode of the PMOS transistor T2.

The above technical scheme is adopted in the utility model, the switch diode charges to the electric capacity module that charges, and voltage comparison module is used for comparing its just, the voltage of negative pole input, corresponds output high level or low level, and electric capacity module that charges constantly promotes one of them input of voltage comparison module in the charging process, and the time that produces through the electric capacity module that charges in charging realizes this delay circuit's time delay output or the purpose of disconnection, and it is accurate to have the time delay effect, nimble practical advantage.

Furthermore, the capacitor charging module is composed of a capacitor C1, a capacitor C2, a resistor R9 and a resistor R10, one end of the resistor R9 and one end of the resistor R10 are connected with the switching diode D1, the other ends of the resistor R9 and the resistor R10 are respectively connected with the capacitor C1 and the capacitor C2, and the other ends of the capacitor C1 and the capacitor C2 are grounded. When the power-on circuit is just powered on, the voltages at two ends of the capacitor C1 and the capacitor C2 are zero, the input voltage is conducted by the switching diode D1, the voltage is divided by the resistor R9 and the resistor R10 to charge the capacitors C1 and C2, the voltage at one end of the capacitor C1 and the voltage at one end of the capacitor C2 are input into the voltage comparator to be used as comparison voltage, and in the charging process, the time generated by the voltage change of the capacitors C1 and C2 so that the level output by the voltage comparators U1A and U1B is changed to be used as the delay time of the delay circuit

Further, the voltage comparison module is composed of a first voltage comparator U1A and a second voltage comparator U1B, negative electrode input ends of the first voltage comparator U1A and the second voltage comparator U1B are connected with a capacitor C1 and a capacitor C2, and positive electrode input ends are connected with a positive electrode of the direct current power supply through a resistor R11 and a resistor R17. The voltage input by the dc power supply is divided by the resistor R11 and the resistor R17 and then input to the positive input terminals of the first and second voltage comparators U1A and U1B as the reference voltage of the voltage comparators.

Further, the output terminals of the first voltage comparator U1A and the second voltage comparator U1B are connected to the base terminals of the transistor Q7 and the transistor Q8, and the voltage comparators output a high level to the transistor Q7 and the transistor Q8, and the collectors and the emitters of the transistors are conductive, so as to conduct the PMOS transistor T1 and the PMOS transistor T2 connected to the transistor Q7 and the transistor Q8. When the PMOS tube T1 and the PMOS tube T2 are conducted, the direct-current voltage and the voltage output by the voltage comparator are transmitted to an electromagnetic valve of the gas stove, the electromagnetic valve is controlled to be opened, gas is conducted, when the delay time is up, the voltage comparator outputs low level, the triode Q7 and the triode Q8 are closed, the PMOS tube T1 and the PMOS tube T2 are cut off, and the voltage output is stopped.

Further, the capacitor C1 and the capacitor C2 are respectively connected to the PMOS transistor T3 and the PMOS transistor T9. When the gas stove stops working and the power supply is cut off, the capacitor C1 and the capacitor C2 are conducted to the ground through the PMOS tube T3 and the PMOS tube T9, the voltage at two ends of the capacitor is released, and the voltage is kept to be zero when the gas stove is electrified next time.

Further, the output terminals of the first voltage comparator U1A and the second voltage comparator U1B are connected to the source of the PMOS transistor T1 through a resistor R7 and a resistor R19, respectively. The voltage output by the first and second voltage comparators is transmitted to the source of the PMOS transistor T1 and is output through the PMOS transistor T1 and the PMOS transistor T2.

The utility model discloses the beneficial effect who gains is: controlling the output levels of the two voltage comparators according to the time generated in the capacitor charging process, and outputting control voltages through two PMOS tubes T1 and T2; when the power-on circuit is powered on, the voltage of the positive electrode input end of the voltage comparators is larger than that of the negative electrode input end, the two voltage comparators output high levels, the triodes Q7 and Q8 are respectively conducted, and then the PMOS tube T1 and the PMOS tube T2 are started to output driving voltage for controlling the coil pull-in of the electromagnetic valve; in the process of charging the capacitors, when the voltages input to the negative input ends of the two voltage comparators by the capacitors C1 and C2 are greater than the voltage of the positive input end, the two voltage comparators output low levels, at the moment, the triodes Q7 and Q8 are cut off, the PMOS tubes T1 and T2 are cut off, and the delay circuit does not output driving voltage; the time in the charging process is held, the effect of time delay control is achieved, two voltage comparators are used for control, the time delay effect is good, a single voltage comparator can be used simultaneously or independently, the reliability of output starting voltage can be guaranteed, and the use is flexible.

Drawings

Fig. 1 is a block diagram of the delay circuit of the present invention;

fig. 2 is a schematic diagram of the circuit structure of the delay circuit of the present invention.

Detailed Description

The present invention will be further described with reference to the accompanying drawings and the detailed description.

Referring to fig. 1, the utility model discloses a delay circuit, include

A switching diode D1 for inputting a dc power supply voltage when turned on;

the capacitor charging module 21 is charged by the voltage input by the switching diode D1;

and the voltage comparison module 22 is used for comparing a reference voltage input by the direct-current power supply with a comparison voltage input by the capacitor charging module 21 and outputting a level conduction PMOS transistor T1 and a level conduction PMOS transistor T2, and the drain electrode of the PMOS transistor T1 is connected with the source electrode of the PMOS transistor T2.

The capacitor charging module 21 is composed of a capacitor C1, a capacitor C2, a resistor R9 and a resistor R10, one end of the resistor R9 and one end of the resistor R10 are connected with the switching diode D1, the other ends of the resistor R9 and the resistor R10 are respectively connected with the capacitor C1 and the capacitor C2, and the other ends of the capacitor C1 and the capacitor C2 are grounded.

The voltage comparison module 22 is composed of a first voltage comparator U1A and a second voltage comparator U1B, negative electrode input ends of the first voltage comparator U1A and the second voltage comparator U1B are connected with a capacitor C1 and a capacitor C2, and a positive electrode input end is connected with a positive electrode of the direct current power supply through a resistor R11 and a resistor R17.

The output ends of the first voltage comparator U1A and the second voltage comparator U1B are connected to the base electrodes of the transistor Q7 and the transistor Q8, and when the high level output by the voltage comparator is input to the transistor Q7 and the transistor Q8, the collector and the emitter of the transistor Q7 are conducted to conduct the PMOS transistor T1 and the PMOS transistor T2 connected to the transistor Q7 and the transistor Q8.

The capacitor C1 and the capacitor C2 are respectively connected with the PMOS transistor T3 and the PMOS transistor T9 in a circuit mode.

The output terminals of the first voltage comparator U1A and the second voltage comparator U1B are connected to the source of the PMOS transistor T1 through a resistor R7 and a resistor R19, respectively.

The switching diode D1 is turned on, a direct current power supply flows into the capacitor C1 and the capacitor C2 through the resistor R9 and the resistor R10, and the other path of the direct current power supply is divided by the resistor R11 and the resistor R17 and then is input into the positive input ends of the first voltage comparator U1A and the second voltage comparator U1B to serve as reference voltage; one end of the capacitor C1 is grounded, the other end is connected to the positive input terminal of the first voltage comparator U1A, one end of the capacitor C2 is grounded, and the other end is connected to the positive input terminal of the second voltage comparator U1B.

When the power supply is just powered on, the voltages of the positive input ends of the first and second voltage comparators U1A and U1B are greater than the voltage of the negative input end, so that the output ends of the first and second voltage comparators U1A and U1B output high levels, the first voltage comparator U1A conducts the triode Q7 and outputs a driving voltage of about 3V, when the triode Q7 is conducted, the collector and the emitter of the triode Q7 are conducted, the grid of the PMOS transistor T1 is conducted, and the PMOS transistor T1 is conducted when the conduction condition is met; similarly, the second voltage comparator U1B turns on the transistor Q8 and outputs a driving voltage of approximately 3V, the transistor Q8 turns on and then grounds the voltage of the gate of the PMOS transistor T2 through the collector and the emitter thereof, so that when the voltage meets the conduction condition, the PMOS transistor T2 turns on, wherein the drain of the PMOS transistor T1 is connected with the source of the PMOS transistor T2, and the driving voltage output controls the solenoid valve of the gas stove to operate and open the solenoid valve.

When the capacitors C1 and C2 are charged to a reference voltage whose voltage at two ends is greater than 2.2V, that is, the voltage at the positive input end of the first voltage comparator U1A and the voltage at the negative input end of the second voltage comparator U1B are less than the voltage at the negative input end, the output of the output ends of the first voltage comparator U1A and the second voltage comparator U1B changes from high level to low level, so that the triodes Q7 and Q8 are cut off, the PMOS transistor T1 and the PMOS transistor T2 are cut off, and the delay circuit stops outputting the driving voltage.

After the circuit is powered off, the voltages at the two ends of the capacitor C1 and the capacitor C2 are larger than zero, so that the PMOS transistor T3 and the PMOS transistor T9 are conducted, the two ends of the capacitor C1 and the two ends of the capacitor C2 are grounded, the two ends of the capacitor C1 and the two ends of the capacitor C2 are discharged, and the voltages at the two ends of the capacitor C1 and the two ends of the capacitor C2 are zero when the circuit is powered on next time.

In summary, the present invention has been made into practical samples according to the contents of the specification and the drawings, and after a plurality of use tests, the effect of the use tests proves that the present invention can achieve the intended purpose, and the practical value is undoubted. The above-mentioned embodiments are only used to conveniently illustrate the present invention, and are not to the limit of the present invention in any form, and any person who knows commonly in the technical field has, if not in the scope of the technical features of the present invention, utilize the present invention to make the equivalent embodiment of local change or modification, and not to break away from the technical features of the present invention, and all still belong to the technical features of the present invention.

Claims

1. A delay circuit, characterized by: comprises that

A switching diode D1 for inputting a dc power supply voltage when turned on;

a capacitive charging module (21) charged by the switched diode (D1) input voltage;

the voltage comparison module (22) compares a reference voltage input by the direct-current power supply with a comparison voltage input by the capacitor charging module (21) and is used for outputting a level conduction PMOS transistor T1 and a level conduction PMOS transistor T2, and the drain electrode of the PMOS transistor T1 is connected with the source electrode of the PMOS transistor T2.

2. The delay circuit of claim 1, wherein: the capacitor charging module (21) is composed of a capacitor C1, a capacitor C2, a resistor R9 and a resistor R10, one ends of a resistor R9 and a resistor R10 are connected with the switch diode D1, the other ends of the resistor R9 and the resistor R10 are respectively connected with the capacitor C1 and the capacitor C2, and the other ends of the capacitor C1 and the capacitor C2 are grounded.

3. The delay circuit of claim 2, wherein: the voltage comparison module (22) is composed of a first voltage comparator U1A and a second voltage comparator U1B, negative electrode input ends of the first voltage comparator U1A and the second voltage comparator U1B are connected with a capacitor C1 and a capacitor C2, and positive electrode input ends of the first voltage comparator U1A and the second voltage comparator U1B are connected with a positive electrode of a direct-current power supply through a resistor R11 and a resistor R17.

4. The delay circuit of claim 3, wherein: the output ends of the first voltage comparator U1A and the second voltage comparator U1B are connected with the base electrodes of the triode Q7 and the triode Q8, the voltage comparators output high level to the triode Q7 and the triode Q8, and the collectors and the emitters of the triodes are conducted to conduct the PMOS tube T1 and the PMOS tube T2 which are connected with the triode Q7 and the triode Q8.

5. The delay circuit of claim 3, wherein: the capacitor C1 and the capacitor C2 are respectively connected with the PMOS transistor T3 and the PMOS transistor T9 in a circuit mode.

6. The delay circuit of claim 4, wherein: the output ends of the first voltage comparator U1A and the second voltage comparator U1B are connected to the source of the PMOS transistor T1 through a resistor R7 and a resistor R19, respectively.