CN217115707U - Super capacitor charging and discharging circuit - Google Patents
Super capacitor charging and discharging circuit Download PDFInfo
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- CN217115707U CN217115707U CN202220301527.8U CN202220301527U CN217115707U CN 217115707 U CN217115707 U CN 217115707U CN 202220301527 U CN202220301527 U CN 202220301527U CN 217115707 U CN217115707 U CN 217115707U
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Abstract
The utility model belongs to the technical field of charge and discharge circuits, and discloses a super capacitor charge and discharge circuit, which comprises a power supply end, wherein the output end of the power supply end is connected with a voltage reduction circuit and a power supply feedback circuit, the output end of the voltage reduction circuit is connected with electric equipment, the output end of the power supply feedback circuit is connected with a voltage boosting circuit and a charging circuit, the voltage boosting circuit is connected with the electric equipment, the input end of the charging circuit is electrically connected with the voltage reduction circuit, the output end of the charging circuit is connected with a super capacitor, and the output end of the super capacitor is electrically connected with the voltage boosting circuit, the utility model provides a super capacitor charge and discharge control and switching scheme which can be effectively applied to the power-off information transmission demand of electronic equipment, the circuit has the characteristics of low cost, high switching speed, high energy utilization efficiency and the like, and can continuously maintain the subsequent circuit to work for a period of time after the external power is disconnected, and provides a feedback signal for a subsequent circuit to save and send data in time.
Description
Technical Field
The utility model belongs to the technical field of the charging and discharging circuit, concretely relates to super capacitor charging and discharging circuit.
Background
When the intelligent electronic product is in sudden power failure, the intelligent electronic product can meet the practical requirements of power failure information transmission, current data storage and the like, and the super capacitor is a key device for solving the requirements. How to design the circuit is a key point of the application effect of the super capacitor. The traditional scheme adopts an integrated chip, has good effect and higher cost; and the direct power supply is adopted, so that the cost is low, but the energy utilization efficiency is low.
SUMMERY OF THE UTILITY MODEL
To the problem that the above-mentioned background art provided, the utility model aims at: the charge and discharge circuit of the super capacitor is provided.
In order to realize the technical purpose, the utility model discloses a technical scheme as follows:
the utility model provides a super capacitor charge-discharge circuit, includes the feed end, the feed end output is connected with step-down circuit and power supply feedback circuit, the step-down circuit output is connected with consumer, power supply feedback circuit output is connected with boost circuit and charging circuit, boost circuit with consumer connects, the charging circuit input with the step-down circuit electricity is connected, the charging circuit output is connected with super capacitor, the super capacitor output with the boost circuit electricity is connected.
Further, the core chip of the voltage reduction circuit is TPS54331, which is designed for enabling the external 9-24V voltage to be 5V (network reference number 5V0), a general circuit.
By further limiting, the power supply feedback circuit comprises a resistor R85, a resistor R37, a Zener diode ZMM3V3, a Zener diode ZMM5V1 and an inverter chip SN74LVCG02, and the design is that an external power PW _ CH1 generates a PW _ CH1_ FB signal with a 5V level through a sampling circuit consisting of the resistor R85 and the Zener diode ZMM5V1, enters the SN74LVCG02 inverter chip, and generates an opposite level signal BOOST _ EN which is used by the boosting circuit and the charging circuit, and the BOOST _ EN signal is low when external power is connected and is high when the external power is disconnected. Further, the resistor R37 and the Zener diode ZMM3V3 generate a 3.3V feedback signal for subsequent circuits to save and send data.
Further, the charging circuit comprises a Schottky diode D16, a PMOS transistor Q10 and a resistor R82, and the design is that when the external power is connected, Q10 is conducted, 5V flows into a SUPER capacitor (the electric network is SUPER _ CAP) through D16, Q10 and R82 to be charged; when the external power supply is disconnected, the BOOST _ EN is at a high level of 5V, and Q10 is cut off, so that the charging effect is achieved.
Further limiting, a core chip of the BOOST circuit is AP2005H, and in such a design, when the external power is connected, a BOOST _ EN signal is at a low level, the BOOST circuit is not started, when the external power is disconnected, the BOOST _ EN signal is at a high level, the BOOST circuit is started, and the power supply voltage is maintained to be 5V until the electric energy of the super capacitor is exhausted, so that a quick response effect is achieved.
Adopt the beneficial effects of the utility model:
the utility model provides a super capacitor charge-discharge control and switching scheme can be effectively applied to electronic equipment outage information transmission demand, and this circuit has with low costs, and switching speed is fast, characteristics such as energy utilization efficiency height can continue to maintain follow-up circuit work a period after the external power connection disconnection to provide feedback signal and supply follow-up circuit in time to preserve, send data.
Drawings
The present invention can be further illustrated by the non-limiting examples given in the accompanying drawings;
fig. 1 is a circuit connection block diagram of an embodiment of a charging and discharging circuit of a super capacitor according to the present invention;
fig. 2 is a circuit connection block diagram of a step-down circuit according to an embodiment of the charging and discharging circuit of the super capacitor of the present invention;
fig. 3 is a first circuit connection block diagram of a power supply feedback circuit according to an embodiment of the present invention;
fig. 4 is a second circuit connection block diagram of a power supply feedback circuit according to an embodiment of the super capacitor charging and discharging circuit of the present invention;
fig. 5 is a circuit connection block diagram of a charging circuit according to an embodiment of the charging and discharging circuit of the super capacitor of the present invention;
fig. 6 is a circuit connection block diagram of a boost circuit according to an embodiment of the charging and discharging circuit of the super capacitor of the present invention;
the main element symbols are as follows:
the power supply circuit comprises a power supply end 1, a voltage reduction circuit 2, a power supply feedback circuit 3, electric equipment 4, a boosting circuit 5, a charging circuit 6 and a super capacitor 7.
Detailed Description
In order to make the present invention better understood by those skilled in the art, the technical solutions of the present invention are further described below with reference to the accompanying drawings and examples.
As shown in fig. 1-6, the utility model discloses a super capacitor charge-discharge circuit, including power supply end 1, power supply end 1 output is connected with step-down circuit 2 and power supply feedback circuit 3, and step-down circuit 2 output is connected with consumer 4, and power supply feedback circuit 3 output is connected with boost circuit 5 and charging circuit 6, and boost circuit 5 is connected with consumer 4, and charging circuit 6 input is connected with step-down circuit 2 electricity, and charging circuit 6 output is connected with super capacitor 7, and super capacitor 7 output is connected with boost circuit 5 electricity.
In the embodiment, when a super capacitor charging and discharging circuit is used, the power supply end 1 inputs power to the electric equipment 4 through the voltage reduction circuit 2, and the charging circuit 6 gets power from the rear end of the voltage reduction circuit 5 and charges the super capacitor 7; when power failure occurs, the power supply feedback circuit 3 obtains a power failure signal, circuit switching is started, the booster circuit 5 boosts the voltage and supplies power to the electric equipment 4 in cooperation with the super capacitor 7, and the purposes of continuously maintaining the subsequent circuit to work for a period of time after external power is disconnected and providing a feedback signal for the subsequent circuit to timely store and send data are achieved.
The core chip of the voltage reducing circuit 2 is preferably TPS54331, which is designed to make the external 9-24V voltage 5V (network label 5V0), and the general circuit, in fact, the core chip of the voltage reducing circuit 2 can be selected according to specific situations.
Preferably, the power supply feedback circuit 3 comprises a resistor R85, a resistor R37, a zener diode ZMM3V3, a zener diode ZMM5V1 and an inverter chip SN74LVCG02, and the design is that an external power PW _ CH1 generates a PW _ CH1_ FB signal of 5V level through a sampling circuit consisting of the resistor R85 and the zener diode ZMM5V1, enters the SN74LVCG02 inverter chip, and generates a BOOST _ EN signal which is low when the external power is connected, and is high when the external power is disconnected, and the BOOST _ EN signal is used by the boosting circuit and the charging circuit. Further, the resistor R37 and the zener diode ZMM3V3 generate a 3.3V feedback signal for subsequent circuits to store and transmit data, and actually, the resistance values of the resistor R85 and the resistor R37 can be considered according to specific situations.
Preferably, the charging circuit 6 comprises a schottky diode D16, a PMOS transistor Q10 and a resistor R82, and in such a design, when external power is connected, Q10 is turned on, and 5V flows into the SUPER capacitor 7 (the electrical network is SUPER _ CAP) through D16, Q10 and R82 to be charged; when the external power is disconnected, BOOST _ EN is at a high level of 5V, Q10 is cut off, and the charging effect is achieved, in fact, the resistance value of the resistor R82 can be considered according to specific situations.
Preferably, the core chip of the BOOST circuit 5 is AP2005H, and in such a design, when the external power is connected, the BOOST _ EN signal is at a low level, the BOOST circuit is not started, and when the external power is disconnected, the BOOST _ EN signal is at a high level, the BOOST circuit is started, and the power supply voltage is maintained to 5V until the electric energy of the super capacitor is exhausted, so as to activate a quick response effect, and in fact, the core chip of the BOOST circuit 5 may be selected according to specific conditions.
The above embodiments are merely illustrative of the principles and effects of the present invention, and are not to be construed as limiting the invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (5)
1. The utility model provides a super capacitor charge-discharge circuit, includes supply terminal (1), its characterized in that: the utility model discloses a high-voltage power supply device, including power supply end (1), buck circuit (2) and power supply feedback circuit (3), buck circuit (2) output is connected with consumer (4), power supply feedback circuit (3) output is connected with boost circuit (5) and charging circuit (6), boost circuit (5) with consumer (4) are connected, charging circuit (6) input with buck circuit (2) electricity is connected, charging circuit (6) output is connected with super capacitor (7), super capacitor (7) output with boost circuit (5) electricity is connected.
2. The charging and discharging circuit of claim 1, wherein: the core chip of the voltage reduction circuit (2) is TPS 54331.
3. The charging and discharging circuit of claim 1, wherein: the power supply feedback circuit (3) comprises a resistor R85, a resistor R37, a Zener diode ZMM3V3, a Zener diode ZMM5V1 and an inverter chip SN74LVCG 02.
4. The charging and discharging circuit of claim 1, wherein: the charging circuit (6) includes a schottky diode D16, a PMOS transistor Q10, and a resistor R82.
5. The charging and discharging circuit of claim 1, wherein: the core chip of the boosting circuit (5) is AP 2005H.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220301527.8U CN217115707U (en) | 2022-02-15 | 2022-02-15 | Super capacitor charging and discharging circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220301527.8U CN217115707U (en) | 2022-02-15 | 2022-02-15 | Super capacitor charging and discharging circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217115707U true CN217115707U (en) | 2022-08-02 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202220301527.8U Active CN217115707U (en) | 2022-02-15 | 2022-02-15 | Super capacitor charging and discharging circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN217115707U (en) |
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2022
- 2022-02-15 CN CN202220301527.8U patent/CN217115707U/en active Active
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