CN217085751U

CN217085751U - Safe communication system based on Skylake framework processor

Info

Publication number: CN217085751U
Application number: CN202220408736.2U
Authority: CN
Inventors: 李锦�; 郝晓斌; 汪军化; 洪建兵
Original assignee: Dongguan Lihua Haiwei Network Technology Co ltd
Current assignee: Dongguan Lihua Haiwei Network Technology Co ltd
Priority date: 2022-02-28
Filing date: 2022-02-28
Publication date: 2022-07-29
Anticipated expiration: 2032-02-28

Abstract

The utility model relates to a safe type communication system based on Skylake framework treater, it is based on Skylake framework, including mainboard, switching card, TPM chip, encryption card, expansion interface card and accelerator card, the mainboard includes PCH chip and Skylake treater, and PCH chip and switching card connect Skylake treater respectively, and the PCH chip is connected to the TPM chip, and the PCH chip is connected with six giga network management chips, and each giga network management chip is connected with a giga electrical interface; the Skylake processor is provided with a PCIEx8 slot for outputting PCIEx8 signals, the encryption card is connected with the adapter card, the adapter card can be selectively connected with the accelerator card or the expansion interface card, the expansion interface card is provided with eight network interfaces, the TPM encryption function is realized, a computer is effectively protected, illegal user access is prevented, the use safety is improved, whether the expansion interface card or the accelerator card is connected or not can be flexibly selected, the use of 14-path network interfaces can be realized to the maximum extent, and the convenience is brought to the use.

Description

Skylake framework processor-based safe communication system

Technical Field

The utility model belongs to the technical field of the communication technology and specifically relates to indicate a safe type communication system based on Skylake framework treater.

Background

In the existing communication system, the existing mainboard using the PCIe bus has poor security and is easily accessed by an illegal user, which results in data loss and leakage of personal privacy. In addition, in the existing communication system, it is difficult to realize network acceleration or multipath output according to the actual use requirement, and in addition, the layout rationality of the existing communication system is not good enough, and the space utilization rate of the main board is low.

Therefore, in the present patent application, the applicant elaborated a secure communication system based on the Skylake architecture processor to solve the above problems.

SUMMERY OF THE UTILITY MODEL

The utility model discloses to above-mentioned prior art not enough that exists, main aim at provides a safe type communication system based on Skylake framework treater, and it realizes TPM encryption function, effectively protects the computer, prevents illegal user's access, improves the safety in utilization, and in addition, can nimble selection be whether connect extension interface card or accelerator card, can realize the use of 14 way network interfaces the biggest, bring the convenience for the use.

In order to achieve the above purpose, the utility model adopts the following technical scheme:

a safety communication system based on a Skylake framework processor is based on the Skylake framework and comprises a mainboard, a switch card, a TPM chip, an encryption card, an expansion interface card and an accelerator card, wherein the mainboard comprises a PCH chip and the Skylake processor, the PCH chip and the switch card are respectively connected with the Skylake processor, the TPM chip is connected with the PCH chip, the PCH chip is connected with a six-kilomega network management chip, and each kilomega network management chip is connected with a kilomega electrical interface;

be equipped with the PCIEx8 slot of output PCIEx8 signal on the Skylake treater, the adapter passes through PCIEx8 golden finger and connects in the PCIEx8 slot of Skylake treater, the adapter is connected to the encryption card, adapter selective connection accelerating card or expansion interface card, be provided with eight network interface on the expansion interface card, network interface is giga electrical interface or giga optical interface.

Preferably, the gigabit network management chip is an I210 gigabit network management chip.

As a preferable scheme, the gigabit network management chip outputs a pcie 1 signal to the gigabit electrical interface.

As a preferred scheme, the PCH chip is connected to the TPM chip through a JTPM interface.

As a preferred scheme, the right front corner of the adapter card is provided with a notch, and the left rear corner of the main board is matched in the notch.

As a preferred scheme, the mainboard, the adapter card and the encryption card are parallel to each other.

As a preferred scheme, the encryption card is positioned at the rear of the adapter card.

As a preferred scheme, a plug-in slot is arranged on the front side of the adapter card, and the accelerator card and the expansion interface card are matched with the plug-in slot through corresponding golden fingers.

As a preferred scheme, the PCH chip is further connected with an LCD screen.

Preferably, the Skylake processor is connected with a hard disk.

Compared with the prior art, the utility model obvious advantage of output and beneficial effect particularly: the TPM encryption function is realized mainly through the cooperation of the TPM chip and the encryption card, a computer is effectively protected, the access of illegal users is prevented, and the use safety is improved, particularly, the adapter card can flexibly select whether to connect an expansion interface card or an accelerator card according to the actual use requirement, the use of a 14-channel network interface can be realized to the maximum extent, and the convenience is brought to the use;

secondly, through the design of the LCD screen, the use conditions (such as the number of network ports) can be visually displayed;

and the whole structure is ingenious and reasonable, the layout is compact, the space utilization rate of the main board is higher, the installation space is saved, and meanwhile, the plugging and unplugging are convenient.

To more clearly illustrate the structural features and effects of the present invention, the following detailed description is given with reference to the accompanying drawings and specific embodiments.

Drawings

FIG. 1 is a schematic perspective view of an embodiment of the present invention (showing an accelerator card);

FIG. 2 is a top view of another embodiment of the present invention (showing an expansion interface card);

fig. 3 is a schematic block diagram of an embodiment of the present invention.

The reference numbers illustrate:

10. main board

11. Skylake processor 111, PCIxx 8 slot

12. PCH chip

20. Adapter card 30 and TPM chip

40. Encryption card 50, expansion interface card

60. Accelerator card 70, hard disk

80. LCD screen

90. Gigabit network management chip 91, gigabit electrical interface.

Detailed Description

The present invention will be further described with reference to the accompanying drawings and the detailed description.

As shown in fig. 1 to fig. 3, a secure communication system based on a Skylake architecture processor is based on a Skylake architecture, and includes a motherboard 10, an adapter card 20, a TPM chip 30, an encryption card 40, an expansion interface card 50, and an accelerator card 60;

the motherboard 10, the adapter card 20 and the encryption card 40 are parallel to each other. The encryption card 40 is located behind the adapter card 20. In this embodiment, the adapter card 20 has a notch at a front right corner, and the rear left corner of the main board 10 fits in the notch.

In this embodiment, the motherboard 10 includes a PCH chip 12 and a Skylake processor 11. The PCH chip 12 and the riser card 20 are respectively connected to a Skylake processor 11, and the Skylake processor 11 is connected to a hard disk 70. The Skylake processor 11 is provided with a pcie 8 slot 111 for outputting a pcie 8 signal.

The adapter card 20 is connected to the pcie 8 slot 111 of the Skylake processor 11 through a pcie 8 gold finger, the encryption card 40 is connected to the adapter card 20, the adapter card 20 is selectively connected to the accelerator card 60 or the expansion interface card 50, an insertion slot 21 is arranged on the front side of the adapter card 20, and the accelerator card 60 and the expansion interface card 50 are adapted to the insertion slot 21 through corresponding gold fingers. In the present embodiment, as shown in fig. 1 and 3, the riser card 20 is connected to an accelerator card 60.

Eight network interfaces are arranged on the expansion interface card 50, and the network interfaces are gigabit electrical interfaces 91 or gigabit optical interfaces.

The TPM chip 30 is connected to the PCH chip 12, and preferably, the PCH chip 12 is connected to the TPM chip 30 through a JTPM interface.

The PCH chip 12 is connected to an LCD 80 and six gigabit network management chips 90, and preferably, the gigabit network management chip 90 is the gigabit network management chip 90 of I210. The gigabit network management chip 90 outputs the pcie 1 signal to the gigabit electrical interface 91 described below.

Each gigabit network management chip 90 is connected to one gigabit electrical interface 91; in another embodiment, as shown in fig. 2, the adaptor card 20 is connected to the expansion interface card 50, and free switching of 14 network interfaces can be realized at most.

The design key points of the utility model lie in that, the TPM encryption function is realized mainly by the cooperation of the TPM chip and the encryption card, the computer is effectively protected, the access of illegal users is prevented, the use safety is improved, especially, the switching card can flexibly select whether to connect an expansion interface card or an accelerator card according to the actual use requirements, the use of 14-path network interfaces can be realized to the maximum extent, and the convenience is brought to the use;

The above description is only a preferred embodiment of the present invention, and is not intended to limit the technical scope of the present invention, so that any slight modifications, equivalent changes and modifications made by the technical spirit of the present invention to the above embodiments are all within the scope of the technical solution of the present invention.

Claims

1. The utility model provides a safe type communication system based on Skylake framework treater, its is based on Skylake framework, its characterized in that: the system comprises a mainboard, a switch card, a TPM chip, an encryption card, an expansion interface card and an accelerator card, wherein the mainboard comprises a PCH chip and a Skylake processor, the PCH chip and the switch card are respectively connected with the Skylake processor, the TPM chip is connected with the PCH chip, the PCH chip is connected with a six kilomega network management chip, and each kilomega network management chip is connected with a kilomega electrical interface;

2. The Skylake architecture processor-based secure communications system of claim 1, wherein: the gigabit network management chip is an I210 gigabit network management chip.

3. The Skylake architecture processor-based secure communications system of claim 2, wherein: the gigabit network management chip outputs the PCIxx 1 signal to the gigabit electrical interface.

4. The Skylake architecture processor-based secure communications system of claim 1, wherein: the PCH chip is connected with the TPM chip through a JTPM interface.

5. The Skylake architecture processor-based secure communications system of claim 1, wherein: the right front corner of the adapter card is provided with a notch, and the left rear corner of the main board is matched in the notch.

6. The Skylake architecture processor-based secure communications system of claim 1, wherein: the mainboard, the adapter card and the encryption card are parallel to each other.

7. The Skylake architecture processor-based secure communications system of claim 1, wherein: the encryption card is positioned behind the adapter card.

8. The Skylake architecture processor-based secure communications system of claim 1, wherein: the front side of the adapter card is provided with a plug-in groove, and the accelerator card and the expansion interface card are matched with the plug-in groove through corresponding golden fingers.

9. The Skylake architecture processor-based secure communications system of claim 1, wherein: the PCH chip is also connected with an LCD screen.

10. The Skylake architecture processor-based secure communications system of claim 1, wherein: the Skylake processor is connected with a hard disk.