CN217008073U

CN217008073U - Signal generator with controllable filtering

Info

Publication number: CN217008073U
Application number: CN202220976655.2U
Authority: CN
Inventors: 张洪妹; 陈家俊; 赵倩
Original assignee: Chengdu Jinmai Micro Technology Co ltd
Current assignee: Chengdu Jinmai Micro Technology Co ltd
Priority date: 2022-04-26
Filing date: 2022-04-26
Publication date: 2022-07-19
Anticipated expiration: 2032-04-26

Abstract

The utility model discloses a signal generator with controllable filtering, which belongs to the technical field of electronics and comprises a clock unit, a frequency synthesis unit, an amplification driving unit and a channel selection unit which are connected in sequence, wherein the frequency synthesis unit is electrically connected with a control unit; the device also comprises a filtering unit and a through path, wherein the channel selection unit is optionally connected with the filtering unit or the through path. The utility model selects whether to filter the output waveform by the channel selection unit matching with the filtering unit and the through path, and further outputs the signal waveform with low transient response rate and smooth signal waveform or the signal waveform with high transient response and unreduced peak value, thereby being suitable for different application scenes.

Description

Signal generator with controllable filtering

Technical Field

The utility model relates to the technical field of electronics, in particular to a signal generator with controllable filtering.

Background

A pulse generator is a system for generating signals, an electrical test signal instrument that produces the desired parameters. In testing, studying or adjusting electronic circuits and devices, it is required to provide electrical signals meeting predetermined technical conditions for measuring some electrical parameters of the circuits, such as measuring frequency response, noise figure, etc., in order to simulate the excitation signals of the devices to be tested used in actual operation. In a particular signal test scenario, the type of signal required is different, such as when a steady state characteristic measurement of the system is required, a sinusoidal signal source with known amplitude and frequency is used. When testing the transient behavior of the system, a rectangular pulse source with known leading edge time, pulse width and repetition period is used. In order to meet the test requirements of different scenes, a single multi-waveform signal generator generates various waveforms including triangular waves, pulse waves, sine waves, rectangular waves (including square waves) and the like, and the waveforms are filtered before being output to obtain smooth signal waveforms, but the filtering process can reduce the peak value of the signals and simultaneously reduce the transient response rate.

SUMMERY OF THE UTILITY MODEL

It is an object of the present invention to overcome the problems of the prior art and to provide a signal generator with controllable filtering.

The purpose of the utility model is realized by the following technical scheme: a filtering controllable signal generator comprises a clock unit, a frequency synthesis unit, an amplification driving unit and a channel selection unit which are connected in sequence; the signal generator further comprises a control unit, a filtering unit and a through path, wherein the output end of the control unit is connected with the frequency synthesis unit, the output end of the channel selection unit is optionally connected with the filtering unit and the through path, and the channel selection unit is optionally communicated (connected and conducted to form the path) with the filtering unit or the through path. The clock unit is used for providing a reference working frequency; the control unit is used as a control main body of the signal generator and controls the frequency synthesis unit to output different types of signal waveforms including but not limited to triangular waves, pulse waves, sine waves, rectangular waves and the like; the frequency synthesizing unit synthesizes a target signal waveform under the control of the control unit. The amplification driving unit is used for carrying out amplification driving processing on the generated waveform; the channel selection unit is used for distributing the signals subjected to amplification drive processing to the filtering unit or the through path, and when the signals are distributed to the filtering unit, namely the channel selection unit is connected and conducted with the filtering unit, the synthesized signal waveforms are output after being filtered, and smooth signal waveforms with low output transient response rate are obtained; when the signal is distributed to the through path, namely the channel selection unit is connected and conducted with the through path, the synthesized signal waveform is directly output without being filtered, and the signal waveform with high transient response and unreduced peak value is obtained at the moment, so that the method is suitable for different application scenes.

In one example, the control unit is any one of a single chip microcomputer, a CPLD, an ARM, and an FPGA, and is preferably the single chip microcomputer, which is strong in data processing and high in cost.

In one example, the clock unit is a constant temperature crystal oscillator, and preferably a high-precision crystal oscillator with temperature compensation is adopted, so as to generate a more stable and accurate reference frequency.

In one example, the frequency synthesis unit is a direct digital frequency synthesizer chip, and can rapidly output signal waveforms with high resolution and different indexes, wherein the indexes include frequency, amplitude, phase and the like, and the indexes are given by the control unit.

In one example, the amplification driving unit is an amplification driving circuit formed by an operational amplifier, and has a high gain, so that the amplification driving processing of the signal is conveniently realized.

In one example, the channel selection unit is a signal selection circuit configured based on a switching device, where the switching device is a signal switch or a relay, and the like, and is used for implementing channel selection and distributing a signal waveform to a filtering channel or a through path.

In one example, the filtering unit comprises a Butterworth filter, a Chebyshev filter and a Bessel filter in parallel, and each filter is respectively connected to the channel selection unit. Specifically, at this time, the signal generator at least includes 4 paths, which are respectively a filtering path corresponding to the three filters and a through path that does not adopt any processing, and a user can select the corresponding filter to filter the current signal waveform according to the current usage scenario, and of course, can also select not to filter the signal waveform directly output the corresponding type through the through path.

In an example, the output end of the signal generator is further provided with an impedance matching circuit, the output ends of the filtering unit and the through path are both connected to the impedance matching circuit, and the filtering unit and the through path are optionally in conduction connection with the impedance matching circuit, that is, when the channel selection unit is in conduction connection with the filtering unit, the filtering unit is in conduction connection with the impedance matching circuit; when the channel selection unit is connected and conducted with the through path, the through path is connected and conducted with the impedance matching circuit.

In one example, an input unit is connected to an input end of the control unit. The input unit is preferably a touch key, and the configuration of the output signal waveform, including the configuration of amplitude, phase, frequency and the like, is realized through the key.

In one example, the output end of the control unit is also connected with a display unit. The display unit is preferentially an LCD display screen and is used for displaying output signal waveforms, so that a user can conveniently and visually observe the waveforms.

It should be further noted that the technical features corresponding to the above examples can be combined with each other or replaced to form a new technical solution.

Compared with the prior art, the utility model has the beneficial effects that:

the channel selection unit is matched with the filtering unit and the through passage to select whether to filter the output waveform or not, and then the output waveform is low in transient response speed and smooth or high in transient response and unreduced in peak value, so that the method is suitable for different application scenes.

Drawings

The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the utility model and together with the description serve to explain the utility model without limiting the utility model.

FIG. 1 is a block diagram of a signal generator in one example of the utility model;

FIG. 2 is a schematic circuit diagram of a control unit in one example of the present invention;

FIG. 3 is a schematic diagram of a clock unit circuit in an example of the present invention;

FIG. 4 is a schematic circuit diagram of a frequency synthesis unit according to an example of the present invention;

FIG. 5 is a schematic diagram of an amplified driver cell circuit in accordance with an example of the present invention;

fig. 6 is a schematic circuit diagram of a channel selection unit, a filtering unit, and a through path according to an example of the present invention.

Detailed Description

The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it should be noted that directions or positional relationships indicated by "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like are directions or positional relationships described based on the drawings, and are only for convenience of description and simplification of description, and do not indicate or imply that the device or element referred to must have a specific orientation, be configured and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.

In the description of the present invention, it should be noted that, unless otherwise explicitly stated or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.

In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

As shown in fig. 1, a signal generator with controllable filtering includes a clock unit, a frequency synthesis unit, an amplification driving unit, and a channel selection unit, which are connected in sequence, wherein an input end of the frequency synthesis unit is connected to a control unit, an input end of the control unit is connected to an input unit, and an output end of the control unit is connected to a display unit. The signal generator also comprises a filtering unit and a through path, wherein the channel selection unit is optionally connected with the filtering unit or the through path.

Further, as shown in fig. 2, the control unit, i.e. the MCU, is compatible with a plurality of I/O interfaces (P0.1-P0.7, P1.0-P1.7) for connecting with the frequency synthesis unit, i.e. the direct digital frequency synthesizer chip, the input unit, i.e. the keys (not shown), and the display unit, i.e. the LCD display screen (not shown).

As shown in fig. 3, the crystal oscillator is specifically a 75M constant temperature crystal oscillator X1, and is configured to generate a reference operating frequency, and a reference frequency output terminal (pin 3) thereof is connected to a serial clock input terminal (pin 8) of the direct digital frequency synthesizer chip, so as to provide the reference operating frequency to the direct digital frequency synthesizer chip.

As shown in fig. 4, the present example specifically employs a direct digital frequency synthesizer chip AD9834 and generates different signal waveforms under the control of the MCU.

As shown in fig. 5, the amplification driving unit is a driving amplification circuit based on an operational amplifier AD8009, and an input terminal (pin 3) of the driving amplification circuit is connected to an output terminal (pin 19) of the direct digital frequency synthesizer chip AD9834 to receive different signal waveforms. More specifically, a ground resistor R14 is connected between an input terminal (pin 3) of the operational amplifier AD8009 and an output terminal (pin 19) of the direct digital frequency synthesizer chip AD9834, another input terminal (pin 2) of the operational amplifier AD8009 is connected to a ground resistor R21, meanwhile, the input terminal (pin 2) of the operational amplifier AD8009 is connected to an output terminal (pin 6) thereof through a resistor R28, and the resistors R14, R21, and R28 are high precision resistors, so as to improve the output power of the signal.

As shown in fig. 6, the channel selection unit includes a first signal switch K1, a second signal switch K2, and a third signal switch K3, the first signal switch K1 divides the signal output by the amplification driving unit into two paths, and the two paths are respectively input to the second signal switch K2 and the third signal switch K3; the second signal switch K2 divides the signal output by the first signal switch K1 into two paths, and the two paths are respectively connected to the through path and the corresponding channel of the Butterworth filter; the third signal switch K3 divides the signal output by the first signal switch K1 into two paths, and the two paths are respectively connected to the corresponding channel of the chebyshev filter and the corresponding channel of the bessel filter, and the corresponding filtering channel or through path can be selected by switching the signal switches K1, K2 and K3. In this example, the butterworth filter is composed of a grounded capacitor C34, an inductor L2, a grounded capacitor C35, an inductor L3, and a grounded capacitor C36; the Chebyshev filter is composed of a grounding capacitor C1, an inductor L1, a grounding capacitor C2, an inductor L4 and a grounding capacitor C5; the bessel filter is composed of a grounding capacitor C3, an inductor L5, a grounding capacitor C4, an inductor L6 and a grounding capacitor C6. Furthermore, a through path and a channel corresponding to the Butterworth filter are connected to one input end of a signal switch K6 through a signal switch K4, a channel corresponding to the Chebyshev filter and a channel corresponding to the Bessel filter are connected to the other input end of the signal switch K6 through a signal switch K5, an output end of the signal switch K6 is sequentially connected with a grounding resistor R22, a resistor R26 and a grounding resistor 23, the resistor R22, the resistor R26 and the resistor 23 form an impedance matching circuit, and output impedance is guaranteed to be 50 omega.

Specifically, the specific working principle of the signal generator in this example is:

a user inputs signal waveform configuration information including amplitude, phase, frequency and the like to the MCU through a key, the MCU controls the direct digital frequency synthesizer chip to output a target waveform according to the waveform configuration information, namely the direct digital frequency synthesizer chip outputs a target signal meeting the signal waveform configuration information of the user under the control of the MCU, the target signal is further amplified by the operational amplifier AD8009 and transmitted to the channel selection unit, the target signal is filtered by selecting different filters through switching signal switches in the channel selection unit or the target signal is directly output through a through passage, and finally a signal waveform with low output transient response rate and smoothness or a signal waveform with high transient response and unreduced peak value is obtained to adapt to different application scenes.

The above detailed description is for the purpose of describing the utility model in detail, and it should not be construed that the detailed description is limited to the description, and it will be apparent to those skilled in the art that various modifications and substitutions can be made without departing from the spirit of the utility model.

Claims

1. A signal generator with controllable filtering, comprising: the device comprises a clock unit, a frequency synthesis unit, an amplification driving unit and a channel selection unit which are connected in sequence, wherein the frequency synthesis unit is electrically connected with a control unit; the device also comprises a filtering unit and a through path, wherein the channel selection unit is optionally connected with the filtering unit or the through path.

2. A filter controllable signal generator according to claim 1, wherein: the control unit is any one of a single chip microcomputer, a CPLD, an ARM and an FPGA.

3. A filter controllable signal generator according to claim 1, wherein: the clock unit is a constant temperature crystal oscillator.

4. A filter controllable signal generator according to claim 1, wherein: the frequency synthesis unit is a direct digital frequency synthesizer chip.

5. A filter controllable signal generator according to claim 1, wherein: the amplification driving unit is an amplification driving circuit formed based on an operational amplifier.

6. A filter controllable signal generator according to claim 1, wherein: the channel selection unit is a signal selection circuit formed based on a switching device.

7. A filter controllable signal generator according to claim 1, wherein: the filtering unit comprises a Butterworth filter, a Chebyshev filter and a Bessel filter which are parallel, and all the filters are connected to the channel selection unit respectively.

8. A filter controllable signal generator according to claim 1, wherein: and the output ends of the filtering unit and the through path are connected to the impedance matching circuit.

9. A filter controllable signal generator according to claim 1, wherein: the control unit is connected with an input unit.

10. A filter controllable signal generator according to claim 1, wherein: the control unit is also connected with a display unit.