CN107121647B - Magnetic core inductance sensitivity measurement method and system - Google Patents

Magnetic core inductance sensitivity measurement method and system Download PDF

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CN107121647B
CN107121647B CN201710219463.0A CN201710219463A CN107121647B CN 107121647 B CN107121647 B CN 107121647B CN 201710219463 A CN201710219463 A CN 201710219463A CN 107121647 B CN107121647 B CN 107121647B
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inductance
magnetic core
test
signal
sensitivity
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CN107121647A (en
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毛铭丽
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GUANGXI WUZHOU MICRO-MAGNET TECHNOLOGY Co.,Ltd.
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Shanghai Feixun Data Communication Technology Co Ltd
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    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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    • G01R33/02Measuring direction or magnitude of magnetic fields or magnetic flux

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Abstract

The invention discloses a method and a system for measuring the sensitivity of magnetic core inductance, comprising the following steps: step S100, acquiring an alternating magnetic field signal generated by the inductance of the magnetic core to be tested in a test circuit; step S200, converting the alternating magnetic field signal into a corresponding digital pulse signal; and step S400, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the digital pulse signal. The invention can complete the sensitivity data measurement of the inductance of the magnetic core to be tested only by a small number of peripheral components and combining the Hall sensor, the control chip and the like, thereby reducing the measurement time and improving the test efficiency. And the number of components is less, so that the influence of the external environment on the measurement sensitivity data is reduced.

Description

Magnetic core inductance sensitivity measurement method and system
Technical Field
The invention relates to the field of magnetic core inductance testing, in particular to a method and a system for measuring sensitivity of magnetic core inductance.
Background
In the production process, after the inductor with the magnetic core (hereinafter referred to as magnetic core inductor) is produced, the sensitivity of the inductor needs to be tested to determine whether the inductor meets the production standard. The sensitivity refers to the number of magnetic lines of force that can be sensed by the unit area of the metal surface under a certain distance between the top section (the end without pins) of the magnetic core inductor and the metal surface. The more the number of magnetic lines of force sensed, the higher the sensitivity of the core inductance.
The existing method for measuring the sensitivity of the magnetic core inductance is to design a hardware circuit and then obtain the sensitivity of the magnetic core inductance through complex mathematical calculation. In order to determine the accuracy of measurement, the impedance of one or more components in a hardware circuit needs to be changed, and finally the sensitivity of the magnetic core inductance is obtained through multipoint comparison; some testing methods are assisted by Matlab simulation modeling software.
When the existing testing method is used for measuring the inductance sensitivity of the magnetic core, because a hardware circuit involves the measurement of each circuit parameter and the calculation of each circuit parameter, the number of components involved in the whole hardware circuit is large, the size of the whole testing system is large, the measuring speed is low, and the testing efficiency is low. In addition, the existing test method needs to measure each circuit parameter, and the influence factors are more in the measurement process, so that the measured sensitivity of the magnetic core inductance has larger error.
Disclosure of Invention
The invention aims to provide a method and a system for measuring the sensitivity of magnetic core inductance, which can accelerate the measurement speed, improve the test efficiency and reduce the error of the sensitivity of the magnetic core inductance.
The technical scheme provided by the invention is as follows:
a method of sensitivity measurement of core inductance, comprising: step S100, acquiring an alternating magnetic field signal generated by the inductance of the magnetic core to be tested in a test circuit; step S200, converting the alternating magnetic field signal into a corresponding digital pulse signal; and step S400, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the digital pulse signal.
In the technical scheme, the measurement of the magnetic core inductance sensitivity data is realized by adopting a small number of peripheral components, the test speed is accelerated, and the test efficiency is greatly improved.
Further, between the step S200 and the step S400, the following is further included: step S300 filters the converted digital pulse signal.
In the technical scheme, the digital pulse signals are filtered, so that the digital pulse signals are more stable, and the sensitivity data obtained subsequently is more accurate.
Further, the step S200 specifically includes: step S210, converting the alternating magnetic field signal into a corresponding alternating voltage signal; step S220 converts the alternating voltage signal into a corresponding digital pulse signal.
In the technical scheme, the conversion of the alternating magnetic field signal is a precondition for obtaining sensitivity data subsequently, and the conversion can greatly reduce the sensitivity measurement time of the inductance of the magnetic core to be tested and improve the test efficiency.
Further, the step S400 specifically includes: step S410 acquires a first measurement starting point of the digital pulse signal; step S420, when the first measurement starting point is obtained, counting the digital pulse signals from the first measurement starting point; step S430, when a second measurement starting point of the digital pulse signal is obtained, stopping counting the digital pulse signal to obtain a counting result; and step S440, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the counting result.
In the technical scheme, the number of the pulse waveforms is counted by interruption, so that the test time is shortened, and the test efficiency is improved.
Further, the step S400 is followed by: step S500 displays the sensitivity data.
In the technical scheme, the sensitivity data obtained by measurement is displayed, so that a tester can know the sensitivity of the inductance of the magnetic core to be tested more intuitively.
The present invention also provides a magnetic core inductance sensitivity measurement system, comprising: inductance of the magnetic core to be tested; the test circuit is electrically connected with the inductor of the magnetic core to be tested and is used for generating an alternating magnetic field signal and converting the alternating magnetic field signal into a corresponding digital pulse signal; and the control circuit is electrically connected with the test circuit and used for obtaining the sensitivity data of the inductance of the magnetic core to be tested according to the digital pulse signal converted by the test circuit.
In the technical scheme, the measurement of the magnetic core inductance sensitivity data is realized by adopting a small number of peripheral components, the test speed is accelerated, and the test efficiency is greatly improved.
Further, still include: the test circuit is electrically connected with the control circuit through the signal filter circuit, and the signal filter circuit is used for filtering the digital pulse signals converted by the test circuit.
Further, the test circuit includes: testing the chip; the common end of the test chip is electrically connected with one end of the magnetic core inductor to be tested, and the other end of the magnetic core inductor to be tested is electrically connected with the inductive signal input end of the test chip; the pulse output end of the test chip is electrically connected with the control circuit through the signal filter circuit; the inductor number configuration end of the test chip is connected to a power supply through a first pull-up resistor; the test mode configuration end of the test chip is grounded; the measurement error output end of the test chip is electrically connected with the control circuit; and the chip working mode control end of the test chip is grounded.
Further, the control circuit includes: a control chip; the first interrupt end of the control chip is electrically connected with the test circuit through the signal filter circuit; the second interrupt end of the control chip is electrically connected with the test circuit through the signal filter circuit; and the high-low level detection end of the control chip is electrically connected with the test chip.
Further, still include: and the display circuit is electrically connected with the control circuit and is used for displaying the sensitivity data of the inductance of the magnetic core to be tested.
Compared with the prior art, the magnetic core inductance sensitivity measurement method and the magnetic core inductance sensitivity measurement system have the beneficial effects that:
the invention can complete the sensitivity data measurement of the inductance of the magnetic core to be tested only by a small number of peripheral components and combining the Hall sensor, the control chip and the like, thereby reducing the measurement time and improving the test efficiency. And the number of components is less, so that the influence of the external environment on the measurement sensitivity data is reduced.
Drawings
The above features, technical features, advantages and implementations of a method and system for sensitivity measurement of core inductance are further described in the following detailed description of preferred embodiments in a clearly understandable manner, in conjunction with the accompanying drawings.
FIG. 1 is a flow chart of one embodiment of a method for sensitivity measurement of core inductance of the present invention;
FIG. 2 is a flow chart of another embodiment of a method for sensitivity measurement of core inductance of the present invention;
FIG. 3 is a schematic diagram of a magnetic core inductance sensitivity measurement system according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of another embodiment of a system for sensitivity measurement of core inductance according to the present invention;
FIG. 5 is a circuit diagram of one embodiment of a system for sensitivity measurement of core inductance of the present invention;
FIG. 6 is a circuit diagram of one embodiment of a test chip of the present invention.
The reference numbers illustrate:
10. the magnetic core inductance to be tested is 20, the test circuit is 30, the control circuit is 40, the signal filter circuit is 50, and the display circuit is 50.
Detailed Description
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will be made with reference to the accompanying drawings. It is obvious that the drawings in the following description are only some examples of the invention, and that for a person skilled in the art, other drawings and embodiments can be derived from them without inventive effort.
For the sake of simplicity, the drawings only schematically show the parts relevant to the present invention, and they do not represent the actual structure as a product. In addition, in order to make the drawings concise and understandable, components having the same structure or function in some of the drawings are only schematically illustrated or only labeled. In this document, "one" means not only "only one" but also a case of "more than one".
In an embodiment of the present invention, as shown in fig. 1, a method for testing inductance of a magnetic core includes: step S100, acquiring an alternating magnetic field signal generated by the inductance of the magnetic core to be tested in a test circuit; step S200, converting the alternating magnetic field signal into a corresponding digital pulse signal; and step S400, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the digital pulse signal.
Specifically, the inductor of the magnetic core to be tested is combined with a small number of components in a test circuit to generate an alternating magnetic field signal; then capturing the alternating magnetic field signal by a Hall sensor, and converting the alternating magnetic field signal into a periodic digital pulse signal; and finally, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the digital pulse signal. The sensitivity data here refers to statistics of the number of pulse shapes of the digital pulse signal, which can very accurately characterize the sensitivity of the core inductance.
The invention adopts a small number of peripheral components to realize the measurement of the inductance sensitivity data of the magnetic core, thereby accelerating the test speed and greatly improving the test efficiency. Because peripheral components are fewer, the influence of the external environment on the measurement result in the measurement process is greatly reduced, and the error of the measurement result of the inductance sensitivity of the magnetic core is reduced.
Preferably, step S400 is followed by: and S600, judging whether the inductance of the magnetic core to be tested is qualified or not according to the sensitivity data and a preset judgment condition.
Specifically, when the sensitivity of the magnetic core inductance is judged to be qualified or not, the sensitivity data can be compared with the preset judgment condition. For example: if the preset judgment condition is that the magnetic core inductance with the pulse waveform quantity more than 20 groups is a qualified product, the obtained sensitivity data (namely the pulse waveform quantity of the digital pulse signal) needs to be compared with 20, and if the pulse waveform quantity is more than 20, the current magnetic core inductance to be detected is qualified; if the inductance is less than or equal to 20, the current inductance of the magnetic core to be tested is unqualified.
Whether the sensitivity of the inductance of the magnetic core to be tested is qualified or not is judged through the measured sensitivity data, namely the pulse waveform quantity (the response is the sensitivity of the inductance of the magnetic core to be tested), the testing process is simple and convenient, and the testing efficiency is improved.
Preferably, between step S200 and step S400, further comprising: step S300 filters the converted digital pulse signal.
Specifically, when the digital pulse signal is obtained, the digital pulse signal can be filtered, so that the burr clutter in the digital pulse signal is filtered, the digital pulse signal is more stable, and the subsequently obtained sensitivity data is more accurate.
Preferably, the step S200 specifically includes: step S210, converting the alternating magnetic field signal into a corresponding alternating voltage signal; step S220 converts the alternating voltage signal into a corresponding digital pulse signal.
Specifically, the conversion of the alternating magnetic field signal into an alternating voltage signal may be performed by a hall sensor, and the conversion of the alternating voltage signal into a corresponding digital pulse signal may be performed by a voltage comparator.
The conversion of the alternating magnetic field signal is a precondition for obtaining sensitivity data subsequently, the sensitivity measurement time of the inductance of the magnetic core to be tested can be greatly reduced through the conversion, and the test efficiency is improved.
Preferably, the step S400 specifically includes: step S410 acquires a first measurement starting point of the digital pulse signal; step S420, when the first measurement starting point is obtained, counting the digital pulse signals from the first measurement starting point; step S430, when a second measurement starting point of the digital pulse signal is obtained, stopping counting the digital pulse signal to obtain a counting result; and step S440, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the counting result.
Specifically, the first measurement starting point may be understood as finding the head of the digital pulse signal from which the count is made. When the second measurement start point (i.e., the second head finding) is acquired, a new one-cycle digital pulse signal is described later, and therefore, the counting can be stopped at this time. The counting result of the pulse waveform number of the digital pulse signal of one period obtained at this time can represent the sensitivity of the inductance of the magnetic core to be tested.
The positioning of the first measurement starting point and the second measurement starting point of the digital pulse signal and the counting of the number of pulse waveforms are completed in a software simulation double-interrupt mode, so that the test time is shortened, and the test efficiency is improved.
Preferably, the step S400 is followed by: step S600 displays the sensitivity data.
Specifically, the sensitivity data can intuitively reflect the sensitivity of the inductance of the magnetic core to be tested. And the sensitivity data obtained by measurement is displayed, so that a tester can know the sensitivity of the inductance of the magnetic core to be tested more intuitively.
In another embodiment of the present invention, as shown in fig. 2, a method for measuring sensitivity of inductance of a magnetic core includes: step S100, acquiring an alternating magnetic field signal generated by the inductance of the magnetic core to be tested in a test circuit; step S200, converting the alternating magnetic field signal into a corresponding digital pulse signal; step S200 specifically includes: step S210, converting the alternating magnetic field signal into a corresponding alternating voltage signal; step S220, converting the alternating voltage signal into a corresponding digital pulse signal; step S300, filtering the converted digital pulse signal; step S400, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the digital pulse signal; step S400 specifically includes: step S410 acquires a first measurement starting point of the digital pulse signal; step S420, when the first measurement starting point is obtained, counting the digital pulse signals from the first measurement starting point; step S430, when a second measurement starting point of the digital pulse signal is obtained, stopping counting the digital pulse signal to obtain a counting result; step S440, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the counting result; step S500 displays the sensitivity data.
Specifically, an alternating magnetic field signal is generated by combining a magnetic core inductor to be detected with a small number of peripheral components, then the magnetic field is captured by a Hall sensor and converted into an alternating voltage signal, the alternating voltage signal is converted into a digital pulse signal, then the digital pulse signal is filtered by a filter wave to remove burrs and clutter, a more stable digital pulse signal is obtained, and finally the digital pulse is processed by a control chip (such as an MCU) to obtain sensitivity data and is displayed.
The invention can complete the sensitivity data measurement of the inductance of the magnetic core to be tested only by a small number of peripheral components and combining the Hall sensor, the control chip and the like, thereby reducing the measurement time and improving the test efficiency. And the number of components is less, so that the influence of the external environment on the measurement sensitivity data is reduced.
In another embodiment of the present invention, as shown in fig. 3, a system for sensitivity measurement of core inductance comprises: a magnetic core inductor to be tested 10; the test circuit 20 is electrically connected with the inductor of the magnetic core to be tested and is used for generating an alternating magnetic field signal and converting the alternating magnetic field signal into a corresponding digital pulse signal; and the control circuit 30 is electrically connected with the test circuit and is used for obtaining the sensitivity data of the inductance of the magnetic core to be tested according to the digital pulse signal converted by the test circuit.
Specifically, the inductor of the magnetic core to be tested is combined with a small number of components in a test circuit to generate an alternating magnetic field signal; then capturing the alternating magnetic field signal by a Hall sensor, and converting the alternating magnetic field signal into a periodic digital pulse signal; and finally, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the digital pulse signal. The sensitivity data here refers to statistics of the number of pulse shapes of the digital pulse signal, which can very accurately characterize the sensitivity of the core inductance.
The invention adopts a small number of peripheral components to realize the measurement of the inductance sensitivity data of the magnetic core, thereby accelerating the test speed and greatly improving the test efficiency. Because peripheral components are fewer, the influence of the external environment on the measurement result in the measurement process is greatly reduced, and the error of the measurement result of the inductance sensitivity of the magnetic core is reduced.
Preferably, the method further comprises the following steps: and the judging module is used for judging whether the inductance of the magnetic core to be detected is qualified or not according to the sensitivity data and a preset judging condition.
Specifically, when the sensitivity of the magnetic core inductance is judged to be qualified or not, the sensitivity data can be compared with the preset judgment condition. For example: if the preset judgment condition is that the magnetic core inductance with the pulse waveform quantity more than 20 groups is a qualified product, the obtained sensitivity data (namely the pulse waveform quantity of the digital pulse signal) needs to be compared with 20, and if the pulse waveform quantity is more than 20, the current magnetic core inductance to be detected is qualified; if the inductance is less than or equal to 20, the current inductance of the magnetic core to be tested is unqualified.
Whether the sensitivity of the inductance of the magnetic core to be tested is qualified or not is judged through the measured sensitivity data, namely the pulse waveform quantity (the response is the sensitivity of the inductance of the magnetic core to be tested), the testing process is simple and convenient, and the testing efficiency is improved.
Preferably, as shown in fig. 4, in addition to the same as above, further comprising: the test circuit is electrically connected with the control circuit through the signal filter circuit, and the signal filter circuit is used for filtering the digital pulse signals converted by the test circuit.
Specifically, the digital pulse signal output by the test circuit passes through the signal filter circuit, so that burrs and clutter in the digital pulse signal can be filtered, a more stable digital pulse signal is obtained, and the subsequently obtained sensitivity data is more accurate.
Preferably, the signal filtering circuit includes: the first filter capacitor (C6) is electrically connected with the test circuit (the pulse output end (RED) of the test chip is grounded through the first filter capacitor (C6)); and the two input ends of the AND gate U1 (or the NAND gate) are also electrically connected with the test circuit, and one output end of the AND gate is electrically connected with the control circuit (the pulse output end (RED) of the test chip is also electrically connected with the two input ends of the AND gate, and the output ends of the AND gate are respectively electrically connected with the first interrupt end and the second interrupt end of the control chip).
Specifically, the first filter capacitor (C6) can filter the overshoot and undershoot of the digital pulse signal output by the test circuit, and the digital gate circuit and the gate (or nand gate) can reduce the delay time of the rising edge and the falling edge of the waveform of the digital pulse signal, thereby achieving the filtering effect.
Preferably, as shown in fig. 4, in addition to the same as above, further comprising: and the display circuit is electrically connected with the control circuit and is used for displaying the sensitivity data of the inductance of the magnetic core to be tested.
Specifically, the sensitivity data can intuitively reflect the sensitivity of the inductance of the magnetic core to be tested. And the sensitivity data obtained by measurement is displayed, so that a tester can know the sensitivity of the inductance of the magnetic core to be tested more intuitively. The display circuit may be composed of a display (LCD).
In another embodiment of the present invention, as shown in fig. 5, a test circuit includes: a test chip (IC 2A); the common end (VM) of the test chip is electrically connected with one end of the inductor (L1/L2/L3) of the magnetic core to be tested, the other end of the inductor of the magnetic core to be tested is electrically connected with the inductor signal input end (LA/LB/LC) of the test chip (and the end, electrically connected with the common end (VM) of the test chip, of the inductor of the magnetic core to be tested is grounded through a second filter capacitor (C10)).
The pulse output end (RED) of the test chip is electrically connected with the control circuit through the signal filter circuit; the inductance number configuration terminal (P3) of the test chip is connected to a power supply through a first pull-up resistor (R3); a test mode configuration terminal (LBDC) of the test chip is grounded; the measurement error output end (ERR/LBO) of the test chip is electrically connected with the control circuit; a chip working mode control terminal (TESTN) of the test chip is grounded; the grounding end (GND) of the test chip is grounded; the power supply input end (VDD) of the test chip is electrically connected with a power supply (DVDD).
Specifically, an inductance of a magnetic core to be tested and a built-in variable capacitor in a test chip form an LC oscillator on a circuit, and the charging and discharging time of the capacitor can be controlled through an electronic switch in the test chip so as to control the amplitude and the oscillation frequency of LC oscillation, thereby generating an alternating magnetic field signal; the alternating magnetic field signal is captured by a Hall sensor inside the test chip to generate an alternating voltage signal. The voltage signal is input into a voltage comparator in the test chip, so that a digital pulse signal is generated and output from the RED pin of the test chip, and the output digital pulse signal represents the sensitivity of the magnetic core inductance.
L1, L2 and L3 are the slot positions of the magnetic core inductor to be tested, one slot is selected to be placed in the magnetic core inductor to be tested during testing, and other slots are empty. For example: and (4) switching in the inductance L2 of the magnetic core to be tested, and taking away the inductance L1 and the inductance L2 of the magnetic core.
The inductor number configuration terminal (P3) is connected to the power supply through a first pull-up resistor (R3) to give a fixed high level to the P3 functional pin of the test chip. The digital circuit inside the test chip judges whether to use one inductor or three inductors according to the level state of the pin. When the inductor number configuration end (P3) is at a high level, the test chip is only connected with one inductor of the magnetic core to be tested.
The measurement error output terminal (ERR/LBO) and the test mode configuration terminal (LBDC) are matched pins. The measurement error output terminal (ERR/LBO) is used for changing the output level thereof according to the measurement state of the test chip; if an error occurs during measurement, the pin outputs a low level, and if the measurement process is normal, the output is a high level. The measurement error output terminal (ERR/LBO) is electrically connected with the control circuit, so that the control circuit can know whether an error occurs in the measurement process, and the accuracy of the sensitivity data of the inductance of the magnetic core to be measured is ensured.
The chip operation mode control terminal (TESTN) controls the operation mode of the test chip, i.e. the normal operation mode (three inductors) or the test mode (one inductor) through high and low levels. The pin is in a normal working mode when inputting a high level; when the input low level is the test mode. Therefore, the test chip is used for testing the sensitivity of the inductance of the magnetic core to be tested, so that the control terminal (TESTN) of the working mode of the chip is grounded, the input is low level, and the test chip is in a test mode.
Preferably, the test chip internally comprises: a capacitor C1, a fourth electronic switch S4, a hall sensor H and a voltage comparator AR 1; the capacitor and an external magnetic core inductor to be tested form an LC oscillator; the fourth electronic switch S4 is used for controlling the LC oscillator to generate an alternating magnetic field signal by controlling the charging and discharging time of the capacitor C1; the Hall sensor H is used for acquiring an alternating magnetic field signal and converting the alternating magnetic field signal into a corresponding alternating voltage signal; the voltage comparator AR1 converts the alternating voltage signal into a corresponding digital pulse signal.
Specifically, as shown in fig. 6, a capacitor C1 in the chip is tested, one end of the capacitor C1 is grounded, the other end of the capacitor C1 is electrically connected to the first ends of three electronic switches (S1, S2, and S3), the second end of the first electronic switch S1 is electrically connected to the inductance signal input terminal LA (the second end of the first electronic switch S1 is used as the inductance signal input terminal LA), the second end of the second electronic switch S2 is electrically connected to the inductance signal input terminal LB (the second end of the second electronic switch S2 is used as the inductance signal input terminal LB), and the second end of the third electronic switch S3 is electrically connected to the inductance signal input terminal LC (the second end of the third electronic switch S3 is used as the inductance signal input terminal LC).
One end of the fourth electronic switch S4 is electrically connected to the ungrounded end of the capacitor C1, and the other end of the fourth electronic switch S4 is electrically connected to the power input terminal VDD (the other end of the fourth electronic switch S4 is used as the power input terminal VDD). The positive power input end of the Hall sensor H is simultaneously and electrically connected with the first ends of the first electronic switch S1, the second electronic switch S2 and the third electronic switch S3; and the power supply negative electrode input end of the Hall sensor H is electrically connected with the public terminal VM (the power supply negative electrode input end of the Hall sensor H is used as the public terminal VM). One non-inverting input end of the voltage comparator AR1 is electrically connected with the output end of the Hall sensor, the inverting input end of the voltage comparator AR1 is electrically connected with the reference voltage VRef, and the output end of the voltage comparator AR1 is a pulse output end (RED).
Preferably, the control circuit comprises: a control chip (IC 1); the first interrupt end (P1.0) of the control chip is electrically connected with the test circuit through the signal filter circuit; and the second interrupt end (P1.1) of the control chip is electrically connected with the test circuit through the signal filter circuit.
The high-low level detection terminal (P1.2) of the control chip is electrically connected with the (ERR/LBO) output terminal of the test chip.
The reset end (RST) of the control chip is grounded through a polar capacitor (C5) (the reset end is electrically connected with the positive electrode of the polar capacitor, the negative electrode of the polar capacitor is grounded), and the reset end (RST) is also electrically connected with a power supply (DVDD) through a second pull-up resistor (R2). And a crystal oscillator signal input end (XIN) and a crystal oscillator signal output end (XOUT) of the control chip are electrically connected with the crystal oscillator circuit.
A chip SPI clock signal output end (P2.1) of the control chip is electrically connected with a display SPI clock signal input end (4 pins) of the display circuit; a chip SPI data input end (P2.2) of the control chip is electrically connected with a display SPI data output end (pin 3) of the display circuit; the chip data output end (P3.2) of the control chip is electrically connected with the display SPI data input end (pin 2) of the display circuit; and a chip SPI chip selection signal output end (P3.3) of the control chip is electrically connected with a display SPI chip selection signal input end (1 pin) of the display circuit.
The grounding end (DVSS) of the control chip is grounded; the power supply input end (DVCC) of the control chip is electrically connected with the power supply (DVDD).
Specifically, one of the two interrupt terminals of the control chip is used for acquiring a first measurement starting point and a second measurement starting point of the digital pulse signal, and the other interrupt terminal is used for counting the number of pulse waveforms of the digital pulse signal between the first measurement starting point and the second measurement starting point. Therefore, sensitivity data of the inductance of the magnetic core to be measured is obtained according to the counting result. The control chip is an MCU, and MSP430G2252 can be adopted.
The first interrupt terminal (P1.0) and the second interrupt terminal (P1.1) are two general input/output ports on the control chip, the function of the interrupt terminal is simulated through software, and the two ports are used as the interrupt terminals.
The high and low level detection end (P1.2) is also a general input and output port on the control chip, and simulates a high and low level detection function through software to detect whether errors occur in the measurement process of the test chip.
Chip SPI clock signal output part (P2.1), chip SPI data input part (P2.2), chip data output part (P3.2) and chip SPI chip select signal output part (P3.3) all are the general input output port on the control chip, simulate out the clock signal of SPI bus, the data input part of SPI bus, the data output part of SPI bus and the function of the chip select signal of SPI bus respectively through software. The ports are respectively connected with corresponding ports on a display circuit (namely, a display screen), so that the function of displaying the sensitivity data on the display screen is realized. The display screen can be compatible with the control chip as long as the display screen has the SPI interface. Preferably, the power supply voltage of the display screen is 3.3V.
In another embodiment of the present invention, as shown in fig. 5, a system for measuring sensitivity of core inductance includes a core inductance to be tested, a test circuit, a signal filter circuit, a control circuit and a display circuit.
The common terminal (VM) of a test chip (IC2A) in the test circuit is electrically connected with one end of a magnetic core inductor (L1/L2/L3) to be tested, the other end of the magnetic core inductor to be tested is electrically connected with an inductance signal input terminal (LA/LB/LC) of the test chip (and the other end of the magnetic core inductor to be tested is grounded through a second filter capacitor (C10)).
The inductance number configuration terminal (P3) of the test chip is connected to a power supply through a first pull-up resistor (R3); a test mode configuration terminal (LBDC) of the test chip is grounded; the measurement error output end (ERR/LBO) of the test chip is electrically connected with the high-low level detection end (P1.2) of the control chip (IC1) of the control circuit; a chip working mode control terminal (TESTN) of the test chip is grounded; the grounding end (GND) of the test chip is grounded; the power supply input end (VDD) of the test chip is electrically connected with a power supply (DVDD).
The pulse output end (RED) of the test chip is grounded through a first filter capacitor (C6) in the signal filter circuit; the pulse output end (RED) of the test chip is also electrically connected with two input ends of an AND gate in the signal filter circuit, and the output end of the AND gate is respectively electrically connected with a first interrupt end (P1.0) and a second interrupt end (P1.1) of the control chip (IC 1).
The reset end (RST) of the control chip is grounded through a polar capacitor (C5) (the reset end is electrically connected with the positive electrode of the polar capacitor, the negative electrode of the polar capacitor is grounded), and the reset end (RST) is also electrically connected with a power supply (DVDD) through a second pull-up resistor (R2). And a crystal oscillator signal input end (XIN) and a crystal oscillator signal output end (XOUT) of the control chip are electrically connected with the crystal oscillator circuit.
A chip SPI clock signal output end (P2.1) of the control chip is electrically connected with a display SPI clock signal input end (4 pins) of a display circuit (LCD); a chip SPI data input end (P2.2) of the control chip is electrically connected with a display SPI data output end (pin 3) of the display circuit; the chip data output end (P3.2) of the control chip is electrically connected with the display SPI data input end (pin 2) of the display circuit; and a chip SPI chip selection signal output end (P3.3) of the control chip is electrically connected with a display SPI chip selection signal input end (1 pin) of the display circuit.
The grounding end (DVSS) of the control chip is grounded; the power supply input end (DVCC) of the control chip is electrically connected with the power supply (DVDD). The power supply (DVDD) is also grounded through the power supply filter circuit; the power supply filter circuit is formed by electrically connecting three capacitors in parallel.
Specifically, an inductance of a magnetic core to be tested and a built-in variable capacitor in a test chip form an LC oscillator on a circuit, and the charging and discharging time of the capacitor can be controlled through an electronic switch in the test chip so as to control the amplitude and the oscillation frequency of LC oscillation, thereby generating an alternating magnetic field signal; the alternating magnetic field signal is captured by a Hall sensor inside the test chip to generate an alternating voltage signal. The voltage signal is input into a voltage comparator in the test chip to generate a digital pulse signal, the digital pulse signal is output from an RED pin of the test chip, burrs and clutter in the digital pulse signal are removed through a signal filter circuit, the digital pulse signal is input into two interrupt ends of a control chip, the pulse waveform number of the digital pulse signal is counted, the obtained counting result, namely sensitivity data, is output and displayed.
In addition, compared with the traditional test system, the test system disclosed by the invention is smaller in volume and convenient to carry.
It should be noted that the above embodiments can be freely combined as necessary. The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (8)

1. A method for measuring sensitivity of inductance of a magnetic core, comprising:
step S100, acquiring an alternating magnetic field signal generated by the inductance of the magnetic core to be tested in a test circuit;
step S200, converting the alternating magnetic field signal into a corresponding digital pulse signal;
step S400, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the digital pulse signals, wherein the sensitivity data refers to the pulse waveform quantity of the digital pulse signals;
the step S400 specifically includes:
step S410 acquires a first measurement starting point of the digital pulse signal;
step S420, when the first measurement starting point is obtained, counting the digital pulse signals from the first measurement starting point;
step S430, when a second measurement starting point of the digital pulse signal is obtained, stopping counting the digital pulse signal to obtain a counting result;
step S440, obtaining sensitivity data of the inductance of the magnetic core to be tested according to the counting result;
and S600, judging whether the inductance of the magnetic core to be tested is qualified or not according to the sensitivity data and a preset judgment condition.
2. The method for sensitivity measurement of core inductance according to claim 1, further comprising, between step S200 and step S400:
step S300 filters the converted digital pulse signal.
3. The method for sensitivity measurement of core inductance according to claim 1, wherein the step S200 specifically comprises:
step S210, converting the alternating magnetic field signal into a corresponding alternating voltage signal;
step S220 converts the alternating voltage signal into a corresponding digital pulse signal.
4. The method for sensitivity measurement of core inductance according to claim 1, wherein said step S400 is followed by further comprising:
step S500 displays the sensitivity data.
5. A sensitivity measurement system of a core inductance to which the sensitivity measurement method of a core inductance according to claim 1 is applied, comprising:
inductance of the magnetic core to be tested;
the test circuit is electrically connected with the inductor of the magnetic core to be tested and is used for generating an alternating magnetic field signal and converting the alternating magnetic field signal into a corresponding digital pulse signal;
the control circuit is electrically connected with the test circuit and used for obtaining sensitivity data of the inductance of the magnetic core to be tested according to the digital pulse signals converted by the test circuit, wherein the sensitivity data refers to the pulse waveform quantity of the digital pulse signals;
the control circuit includes:
a control chip;
the first interrupt end of the control chip is electrically connected with the test circuit through a signal filter circuit;
the second interrupt end of the control chip is electrically connected with the test circuit through the signal filter circuit;
the high-low level detection end of the control chip is electrically connected with a test chip, and the test circuit comprises the test chip;
and the judging module is used for judging whether the inductance of the magnetic core to be detected is qualified or not according to the sensitivity data and a preset judging condition.
6. The magnetic core inductance sensitivity measurement system of claim 5, wherein:
the test circuit is electrically connected with the control circuit through the signal filter circuit, and the signal filter circuit is used for filtering the digital pulse signals converted by the test circuit.
7. The magnetic core inductance sensitivity measurement system of claim 6, wherein:
the common end of the test chip is electrically connected with one end of the magnetic core inductor to be tested, and the other end of the magnetic core inductor to be tested is electrically connected with the inductive signal input end of the test chip;
the pulse output end of the test chip is electrically connected with the control circuit through the signal filter circuit;
the inductor number configuration end of the test chip is connected to a power supply through a first pull-up resistor;
the test mode configuration end of the test chip is grounded;
the measurement error output end of the test chip is electrically connected with the control circuit;
and the chip working mode control end of the test chip is grounded.
8. The magnetic core inductance sensitivity measurement system of claim 5, further comprising:
and the display circuit is electrically connected with the control circuit and is used for displaying the sensitivity data of the inductance of the magnetic core to be tested.
CN201710219463.0A 2017-04-06 2017-04-06 Magnetic core inductance sensitivity measurement method and system Active CN107121647B (en)

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CN102128990A (en) * 2011-01-24 2011-07-20 北京航空航天大学 Method for judging power amplifier saturation in electromagnetic radiation sensitivity automatic test
CN104391180A (en) * 2014-11-17 2015-03-04 北方民族大学 System and method for testing DC inductor based on virtual instrument
CN205353215U (en) * 2016-01-14 2016-06-29 信丰县弘业电子有限公司 Efficient full -automatic magnetic core testing arrangement

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CN102128990A (en) * 2011-01-24 2011-07-20 北京航空航天大学 Method for judging power amplifier saturation in electromagnetic radiation sensitivity automatic test
CN104391180A (en) * 2014-11-17 2015-03-04 北方民族大学 System and method for testing DC inductor based on virtual instrument
CN205353215U (en) * 2016-01-14 2016-06-29 信丰县弘业电子有限公司 Efficient full -automatic magnetic core testing arrangement

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