CN216981939U

CN216981939U - Switching equipment interconnection architecture, switching equipment and data center

Info

Publication number: CN216981939U
Application number: CN202122836256.4U
Authority: CN
Inventors: 赖国洪; 刘伟; 刘贤兵; 孙安兵
Original assignee: Ruijie Networks Co Ltd
Current assignee: Ruijie Networks Co Ltd
Priority date: 2021-11-18
Filing date: 2021-11-18
Publication date: 2022-07-15
Anticipated expiration: 2031-11-18

Abstract

The embodiment of the utility model provides a switching equipment interconnection framework, switching equipment and a data center. The switch interconnect fabric comprises: a MAC board and a port board; the MAC board is provided with an MAC chip and a plurality of first port connectors, and the first port connectors are used for connecting first ports on the MAC board; the port board is buckled with the MAC board through a high-speed connector, a plurality of second port connectors are arranged on the port board, and the second port connectors are used for being connected with second ports on the port board; the distances between the first port connector, the second port connector and the MAC chip are all smaller than a preset distance. The embodiment of the utility model realizes the high-density port fan-out of the exchange chip, simultaneously reduces the loss of the fan-out link, realizes the interconnection design of the link without the relay PHY, and reduces the overall energy consumption and the cost of the product.

Description

Switching equipment interconnection architecture, switching equipment and data center

Technical Field

The embodiment of the utility model relates to the technical field of communication, in particular to an interconnection architecture of switching equipment, the switching equipment and a data center.

Background

With the rise of big data and artificial intelligence technology, the bandwidth requirement of a data center is larger and larger, and the port density requirement of a data center switch is also larger and larger. In order to improve the utilization rate of the cabinet and the port density and reduce the capital investment, the data center requires that most of single switches/cards of the switch are controlled to be 1U-4U of the 19-inch standard cabinet, so that the number of the product panel ports is greatly limited. As is well known, the switching chip (MAC) of a data center switch has a high integration level, and 1 product is generally placed on a MAC board with one MAC chip, and how to fan out 64 and 128 or more ports in a limited width of 19 inches directly determines the interconnection architecture of the product and the product competitiveness of the final implementation.

High integration MAC chips are placed on MAC boards, typically with the capability of fanning out 32/48/96/128/256 ports of 100G or 200G or 400G. When the number of ports is about 48, a Printed Circuit Board (PCB) on which the MAC chip is mounted may be directly used. When the number of the ports reaches more than 48, and even 96 or even 128, the implementation is realized in an orthogonal plug-and-socket manner. However, the single MAC board fan-out architecture is limited in width and height (1U), and the number of fan-out ports can only be below 60; the multi-line card port board and the MAC board are in a positive interactive insertion fan-out structure, fan-out of more than 100 ports can be achieved, however, due to the fact that an interconnection link is extremely long, a relay PHY chip needs to be added to carry out relay transmission of high-speed signals, the orthogonal structure is high in requirement on a machine frame, and product complexity and energy consumption are increased.

Therefore, how to realize higher port fan-out becomes one of the key technical issues for researching and developing data center switch products.

SUMMERY OF THE UTILITY MODEL

Aiming at the defects in the prior art, the embodiment of the utility model provides a switching equipment interconnection framework, switching equipment and a data center.

In a first aspect, an embodiment of the present invention provides a switch device interconnection architecture, including: a MAC board and a port board;

the MAC board is provided with an MAC chip and a plurality of first port connectors, the first port connectors are used for connecting first ports on the MAC board, and the first ports are electrically connected with the MAC chip through the first port connectors;

the port board is buckled with the MAC board through a high-speed connector, a plurality of second port connectors are arranged on the port board and used for being connected with second ports on the port board, and the second ports are connected with the port board through the second port connectors and electrically connected with the MAC chip through the port board;

the distances between the first port connector, the second port connector and the MAC chip are all smaller than a preset distance.

Optionally, the first port connector is arranged and arranged on the MAC board in an arc form with the MAC chip as a center of a circle;

the second port connector is arranged and distributed on the port plate in a circular arc mode by taking the MAC chip as a circle center.

Optionally, in the interconnection architecture of the switching device, the MAC chip is located on an upper surface of the MAC board, and the plurality of first port connectors are respectively disposed on the upper surface of the MAC board and a lower surface of the MAC board.

Optionally, a plurality of second port connectors are disposed on a lower surface of the port plate;

the upper surface of the port plate is in butt joint with the lower surface of the MAC plate through the high-speed connector.

Optionally, in the interconnection architecture of the switching device, the MAC board and the port board are both high-frequency boards, where the high-frequency boards support signal transmission above a preset frequency.

Optionally, in the interconnection architecture of the switching device, the first port connector and the second port connector are both high-frequency port connectors, where the high-frequency port connectors are port connectors supporting signal transmission above the preset frequency.

Optionally, in the interconnection architecture of the switch device, the number of the first port connectors is the maximum number of ports supported by the MAC board, and the number of the second port connectors is the maximum number of ports supported by the port board.

In a second aspect, an embodiment of the present invention provides a switch device, including the switch device interconnection architecture as described in any one of the above.

In a third aspect, an embodiment of the present invention provides an electronic device, which includes the switching device as described above.

According to the switching equipment interconnection architecture provided by the embodiment of the utility model, the port board and the MAC board are buckled up and down through the high-speed connector, so that high-density port fan-out of a switching chip is realized, the fan-out link loss is reduced, the interconnection design of a link without a relay PHY is realized, and the overall energy consumption and cost of a product are reduced.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.

Fig. 1 is a perspective view of an interconnection architecture of switching devices according to an embodiment of the present invention;

fig. 2 is a bottom view of a switch interconnect architecture provided by an embodiment of the present invention;

fig. 3a is a schematic front view of an MAC board in an interconnection architecture of a switch device according to an embodiment of the present invention;

fig. 3b is a schematic back view of an MAC board in the interconnection architecture of the switching device according to the embodiment of the present invention;

fig. 4 is a left side view of a switch device interconnection architecture according to an embodiment of the present invention;

fig. 5 is a signal flow diagram of an interconnection architecture of a switching device according to an embodiment of the present invention;

reference numerals:

100-MAC board; 110-MAC chip; 120-a first port connector;

200-port plate; 210-a second port connector; 300-high speed connector.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Fig. 1 is a perspective view of a switch device interconnection architecture provided in an embodiment of the present invention, and as shown in fig. 1, the switch device interconnection architecture includes: a MAC board 100 and a port board 200;

the MAC board 100 is provided with a MAC chip 110 and a plurality of first port connectors 120, the first port connectors 120 are used for connecting first ports on the MAC board 100, and the first ports are electrically connected with the MAC chip 100 through the first port connectors 120;

the port board 200 is buckled with the MAC board 100 through the high-speed connector 300, the port board 200 is provided with a plurality of second port connectors 210, the second port connectors 210 are used for connecting second ports on the port board 200, the second ports are connected with the port board 200 through the second port connectors 210, and are electrically connected with the MAC chip 110 through the port board 200;

the distances between the first port connector 120 and the MAC chip 110, the distances between the second port connector 210 and the MAC chip 110 are all smaller than a preset distance.

Specifically, the MAC board 100 refers to a circuit board where a switching chip (MAC chip) is located, generally, the MAC chip 110 is disposed in a central region of the MAC board 100, a plurality of first port connectors 120 are uniformly arranged on one side of the MAC board 100, the first port connectors 120 are used for receiving and sending data signals to be processed by the MAC chip 110, the number of the first port connectors 120 is the same as that of ports on the MAC board 100, and in order to increase the fan-out capability of the ports of the MAC chip 110, the number of the first port connectors 120 may be set to be the maximum port number supported by the MAC board 100.

The port board 200 is a circuit board for expanding a port, and may be, for example, a line card port board, and the like, the port board 200 is snapped with the MAC board 100 through a high-speed connector 300, wherein the high-speed connector includes a male connector and a female connector, the male connector is disposed on the port board 200, the female connector is disposed on the MAC board 100, and the port board 200 and the MAC board 100 can be connected by snapping the male connector and the female connector, or the male connector is disposed on the MAC board 100, the female connector is disposed on the port board 200, and the port board 200 and the MAC board 100 can be connected by snapping the male connector and the female connector, it should be noted that there may be one or more high-speed connectors, and when there are a large number of port connectors, a plurality of high-speed connectors may be provided to ensure signal transmission, and a plurality of second terminals 210 are disposed on a side of the port board 200 corresponding to the first terminals 120 of the MAC board 100, the second port connector 210 is used for connecting a second port on the port board 200, the second port is electrically connected to the port board 200 through the second port connector 210, the port board 200 is electrically connected to the MAC board 100 through the high-speed connector 300, and the chip 110 is further disposed in the MAC board 100, so that the second port is electrically connected to the MAC chip through the second port connector 210, the port board 200, the high-speed connector 300, and the MAC board 100, thereby implementing communication between the second port and the MAC chip 110, that is, the second port also becomes a fan-out port of the MAC chip 100.

To increase the port fanout capability of the MAC chip 110, the number of second port connectors 210 may be set to the maximum number of ports supported by the port board 200. In addition, in the prior art, a relay PHY (physical interface transceiver) is usually added to perform relay transmission of high-speed signals, and in the embodiment of the present invention, distances between the first port connector 120, the second port connector 210, and the MAC chip 110 are all smaller than a preset distance, so that a purpose of performing signal transmission without PHY relay is achieved.

In addition, in order to realize high-speed signal transmission, unlike the prior art in which the MAC board 100 and the port board 200 use PCB boards (printed circuit boards), in the embodiment of the present invention, the MAC board 100 and the port board 200 are both high-frequency boards, the high-frequency boards are boards supporting signal transmission of a preset frequency or higher, for example, boards supporting signal transmission of 25G/56Gbps/112Gbps or higher, and the first port connector 120 and the second port connector 210 are both high-frequency port connectors, wherein the high-frequency port connectors are port connectors supporting signal transmission of a preset frequency or higher, the embodiment of the present invention can support transmission of signals of 25Gbps NRZ and 56Gbps/112Gbps PAM4 by providing the high-frequency boards and the high-frequency port connectors, and in the case of signal transmission of 25Gbps/56Gbps/112Gbps PAM4, a relay chip is not required, meets the link insertion loss requirements defined by the IEEE 802.3ck, 802.3cd/802.3bs and 802.3bj standards.

According to the switching equipment interconnection framework provided by the embodiment of the utility model, the port board and the MAC board are buckled up and down through the high-speed connector, so that the high-density port fan-out of the switching chip is realized, the fan-out link loss is reduced, the interconnection design of a link without a relay PHY is realized, and the overall energy consumption and the cost of a product are reduced.

Fig. 2 is a bottom view of a specific embodiment of an interconnection architecture of switching devices according to the embodiment of the present invention, as shown in fig. 2, a first port connector 120 is arranged and laid out on a MAC board 100 in an arc shape with a MAC chip 110 as a center of circle; the second port connectors 210 are arranged and arranged on the port plate 200 in an arc shape with the MAC chip 110 as a circle center, so that the lengths of the links from each first port connector 120 to the MAC chip 110 are the same, and the lengths of the links from each second port connector 210 to the MAC chip 110 are the same, wherein the arc arrangement layout can determine the radius of the arc according to the actual situation, and is not limited herein.

Fig. 3a is a schematic front view of a MAC board in a switch device interconnection architecture provided in an embodiment of the present invention, and fig. 3b is a schematic back view of the MAC board in the switch device interconnection architecture provided in the embodiment of the present invention, as shown in fig. 3a and fig. 3b, a MAC chip 110 is located on an upper surface of the MAC board 100, a plurality of first port connectors 120 are respectively disposed on the upper surface of the MAC board 100 and a lower surface of the MAC board 100, and the number of the first port connectors 100 can be set to 88, thereby further improving a port fan-out capability of the MAC chip.

Fig. 4 is a left side view of the interconnection architecture of the switch device according to the embodiment of the present invention, as shown in fig. 4, the upper surface of the port board 200 is buckled with the lower surface of the MAC board 100 through the high-speed connector 300; the lower surface of the port board 200 is provided with a plurality of second port connectors 210, for example, 40 second port connectors are provided, so that 128 high-speed ports can be realized by using only 2 circuit boards (MAC board and port board), and the number of high-speed connectors used between two circuit boards is significantly reduced by a high-density port scheme. Meanwhile, fan-out of 128 ports is realized only by using two circuit boards, so that sufficient space for placing radiators is provided for the left, right and upper parts of the high-power exchange chip, the thermal resistance of the radiators is obviously reduced, the heat dissipation of the high-power chip can be completed in a 4RU high chassis, and the assembly difficulty is reduced.

The embodiment of the utility model can support the transmission of 25Gbps NRZ and 56Gbps/112Gbps signals, and can meet the link insertion loss requirements defined by the IEEE 802.3ck, 802.3cd/802.3bs and 802.3bj standards without relaying a PHY chip when the signals of the 25Gbps NRZ and the 56Gbps/112Gbps PAM4 are transmitted.

It should be noted that the embodiment of the present invention is not limited to external port fan-out, and may also be applied to implementation of product internal interface interconnection fan-out, and in addition, is not limited to interconnection of PAM4 signals, and may also be transmission of other protocol signals.

Fig. 5 is a signal flow diagram of the interconnection architecture of the switching device according to the embodiment of the present invention, as shown in fig. 5, for the ports on the MAC board 100:

a) and (3) sending a signal stream: the 112Gbps high-speed signal is sent out from the MAC chip, transmitted through the MAC board 100, and reaches the first port connector 120 mounted on the MAC board 100. To a peer device, such as a switch, router, server, etc., via a cable or optical module installed on the first port connector 120;

b) receiving a signal stream: the 112Gbps high-speed signal of the opposite device is transmitted to the port of the MAC board 100 through the cable or the optical module installed on the first port connector 120, transmitted by the port, transmitted through the MAC board 100, and received and processed by the MAC chip.

For ports on the port plate 200:

a) transmitting a signal stream: 112Gbps high-speed signals are sent from the MAC chip 110, transmitted through the MAC board 100 to the high-speed connector 300 mounted on the MAC board 100, transmitted to the high-speed connector 300 mounted on the port board 200, transmitted through the port board 200, and transmitted to the second port connector 210 mounted on the port board. To a peer device, such as a switch, router, server, etc., via a cable or optical module installed on the second port connector 210;

b) receiving a signal stream: the 112Gbps high-speed signal of the peer device is transmitted to the port of the port board 200 through the cable or optical module installed on the second port connector 210, sent by the port, transmitted through the port board 200 to the high-speed connector 300 installed on the port board 200, transmitted to the high-speed connector 300 installed on the MAC board 100, transmitted through the MAC board 100, and received and processed by the MAC chip 110.

According to the interconnection structure of the switching equipment provided by the embodiment of the utility model, through the high-density port design, the switching equipment can realize the high-density port design only by using two circuits, so that the hardware cost is obviously reduced, and the yield and the production efficiency are improved; by adopting the design of two layers of plates, enough space is ensured to be arranged on the high-power chip for heat dissipation, the performance of the radiator is improved, and the cost of the radiator is reduced.

Based on the same utility model concept, the embodiment of the utility model also provides a switching device, which comprises the above-mentioned switching device interconnection framework. In addition, based on the same utility model concept, the embodiment of the utility model also provides a data center, which comprises the switching equipment. Specific information is detailed in the above embodiment of the interconnect architecture of the switching device, and is not described herein again.

According to the switching equipment interconnection architecture provided by the embodiment of the utility model, the port board and the MAC board are buckled up and down through the high-speed connector, so that the high-density port fan-out of the switching chip and the interconnection design of a link without a relay PHY are realized, and the loss and the cost of the fan-out link are reduced. Meanwhile, the port fan-out arrangement on the MAC board and the port board is arranged in a mode of taking the MAC chip as a circle center, so that the effect of realizing the shortest point-point link length is achieved, the loss of a high-speed link from each port to the MAC chip is minimized, the interference rejection and the robustness of link signals are improved, and the signal quality is improved.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the embodiments of the present invention, and are not limited thereto; although embodiments of the present invention have been described in detail with reference to the foregoing embodiments, those skilled in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims

1. A switch interconnect architecture, comprising: a MAC board and a port board;

2. The switch interconnect fabric of claim 1, wherein:

the first port connector is arranged and distributed on the MAC plate in an arc form by taking the MAC chip as a circle center;

3. The switch interconnect architecture of claim 1, wherein the MAC chip is located on an upper surface of the MAC board, and the plurality of first port connectors are respectively disposed on the upper surface of the MAC board and a lower surface of the MAC board.

4. The switch fabric of claim 3,

a plurality of second port connectors are arranged on the lower surface of the port plate;

5. The switch interconnect architecture of any one of claims 1-4, wherein the MAC board and the port board are both high frequency boards, and wherein the high frequency boards support signal transmission above a predetermined frequency.

6. The switch device interconnect architecture of claim 5, wherein the first port connector and the second port connector are both high frequency port connectors, wherein the high frequency port connectors are port connectors that support signal transmission above the predetermined frequency.

7. The switch interconnect fabric of any one of claims 1-4, wherein the number of first port connectors is the maximum number of ports supported by the MAC board, and the number of second port connectors is the maximum number of ports supported by the port board.

8. A switch device comprising a switch device interconnect architecture according to any of claims 1-7.

9. A data center comprising the switching device of claim 8.