CN216871967U - Image sensor pixel structure for improving image trailing - Google Patents
Image sensor pixel structure for improving image trailing Download PDFInfo
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- CN216871967U CN216871967U CN202122648097.5U CN202122648097U CN216871967U CN 216871967 U CN216871967 U CN 216871967U CN 202122648097 U CN202122648097 U CN 202122648097U CN 216871967 U CN216871967 U CN 216871967U
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Abstract
The utility model provides an image sensor pixel structure for improving image trailing, wherein a charge transfer auxiliary grid positioned on a photodiode is arranged in the image sensor pixel structure, and a grid electrode of the charge transfer auxiliary grid is in a high potential state in an integration period of the photodiode, so that the complete depletion potential of an N-type area of the photodiode is increased and the charge capacity is increased; in the first reset operation and the photoelectric charge signal transmission operation process, the grid electrode of the charge transmission auxiliary grid is in a low potential state, the complete depletion potential of the N-type region of the photodiode can be reduced, the charge transmission auxiliary grid plays a role in driving charges, the efficiency of charge transmission from the photodiode to the floating diffusion active region is effectively improved, the problem of charge residue in the N-type region of the photodiode is avoided, and therefore the image sensor can effectively solve the image smear problem.
Description
Technical Field
The utility model relates to the technical field of sensors, in particular to an image sensor pixel structure for improving image tailing.
Background
The image sensor is a functional device which converts a light image on a light-sensing surface into an electrical signal in a proportional relationship with the light image by using a photoelectric conversion function of a photoelectric device. The image sensor includes two types, namely a CMOS (Complementary Metal Oxide Semiconductor) image sensor and a CCD (Charged Coupled Device) image sensor, and can be widely applied to digital cameras, mobile phones, medical devices, automobiles and other application occasions.
The CCD image sensor and the CMOS image sensor have advantages in different application scenarios, but with the rapid development and continuous improvement of the process and technology for manufacturing the CMOS image sensor and the continuous decrease of the price of high-end CMOS, CMOS occupies an increasingly important position, and people have higher requirements for the output of the image quality of the CMOS image sensor.
In a CMOS image sensor, a photosensitive pixel array is provided for collecting photoelectric signal information of an image, and external light is irradiated on the pixel array to generate a photoelectric effect, thereby generating corresponding charges in a pixel unit to collect an image signal.
The image smear refers to a phenomenon that residual image photoelectric signals in pixels irradiated by strong light still appear in the next several frames of images due to the change of exposure environment during the working process of photosensitive pixels. In the CMOS image sensor, if all photoelectric charges in the photodiode of a pixel are not transferred during the operation of transferring to the floating diffusion active region within one frame of image photoelectric signal acquisition operation, the charges will be retained in the photodiode until the next frame of image photoelectric signal acquisition operation, which may cause image smear problem, thereby causing distortion of image information and reducing the quality of image information. Especially when a bright object is shot under the condition of weak light, the influence of the image smear problem on the image information quality is more obvious.
In the image sensor of the prior art, in the process of the photodiode of the pixel, an N-type ion (arsenic ion or phosphorus ion) implantation may be added at a side close to the charge transfer transistor to reduce the potential barrier between the channel of the charge transfer transistor and the N-type region of the photodiode, so as to improve the efficiency of the charge transfer transistor and to solve the problem of image smear of the image sensor, but due to the accuracy limitation of the existing semiconductor manufacturing technology, it is difficult to adopt the technical scheme of the N-type ion implantation particularly in the small-sized pixel (for example, below 1.0 μm), and in the technical background of the existing semiconductor manufacturing process, the technology of optimizing the image smear of the image sensor becomes especially important along with the development of the size of the image sensor pixel towards a small area.
Therefore, it is desirable to provide an image sensor pixel structure that improves image smear.
SUMMERY OF THE UTILITY MODEL
In view of the above-mentioned shortcomings of the prior art, the present invention provides a pixel structure of an image sensor for improving image smear, which is used to solve the image smear problem of the image sensor in the prior art.
To achieve the above and other related objects, the present invention provides an image sensor pixel structure for improving image smear, the image sensor pixel structure including a photodiode, a charge transfer transistor, a floating diffusion active region, a reset transistor, a source follower transistor, and a charge transfer assist gate, the charge transfer assist gate being located above the photodiode, a full depletion potential of the photodiode being adjusted by the charge transfer assist gate.
Optionally, the photodiode is further provided with a protective layer, and the charge transfer auxiliary gate is located above the protective layer; the thickness of the protective layer is 0.05-0.1 μm.
Optionally, the charge transfer assist gate is located at an intermediate position above the photodiode.
Alternatively, the planar shape of the charge transfer auxiliary gate includes a square, a circle, or a polygon.
Optionally, the image sensor pixel structure further includes a pixel selection transistor, a drain terminal of the reset transistor and a drain terminal of the source follower transistor are externally connected to a power supply anode, a source terminal of the source follower transistor is connected to a drain terminal of the pixel selection transistor, a source terminal of the pixel selection transistor is a signal output terminal, and a source terminal of the source follower transistor is a signal output terminal.
Optionally, a drain terminal of the reset transistor is externally connected with a first power voltage, a drain terminal of the source follower transistor is externally connected with a second power voltage, the first power voltage and the second power voltage are controlled by a sequential circuit, and a source terminal of the source follower transistor is a signal output terminal.
Optionally, the gate terminals of the charge transfer auxiliary gate, the charge transfer transistor and the reset transistor are controlled by a timing circuit to realize the operation of collecting and outputting an optical electrical signal by the pixel.
Optionally, a projected area of the charge transfer auxiliary gate on the photodiode is greater than 1/5 of an area of the photodiode.
As described above, in the image sensor pixel structure for improving image smear of the present invention, the photodiode, the charge transfer transistor, the floating diffusion active region, the reset transistor, the source follower transistor, and the charge transfer auxiliary gate are disposed in the image sensor pixel structure, and the gate of the charge transfer auxiliary gate is in a high potential state in the photodiode integration period, so that the fully depleted potential of the N-type region of the photodiode is increased, and the charge capacity of the photodiode is increased; in the process of carrying out the first reset operation and the transmission operation of the photoelectric charge signal, the grid electrode of the charge transmission auxiliary grid is in a low potential state, the complete depletion potential of the N-type area of the photodiode can be reduced, the charge transmission auxiliary grid plays a role in driving charges, the efficiency of transferring the charges from the photodiode to the floating diffusion active area is effectively improved, and the problem of charge residue in the N-type area of the photodiode is avoided. Therefore, the image sensor pixel structure can effectively improve the image smear problem of the image sensor.
Drawings
Fig. 1 is a schematic structural diagram of a pixel structure of an image sensor according to an embodiment of the utility model.
Fig. 2 is a schematic top view of the region a in fig. 1.
FIG. 3 is a timing control diagram of a pixel structure of an image sensor according to an embodiment of the utility model.
Fig. 4 shows a potential well schematic diagram of the pixel structure of the a-region image sensor in fig. 1 during the time period from t5 to t6 in fig. 3.
Fig. 5 shows a potential well schematic diagram of the pixel structure of the a-region image sensor in fig. 1 during the time period from t6 to t7 in fig. 3.
Fig. 6a is a schematic diagram showing a layout simulation of the pixel structure of the area a image sensor in fig. 1.
FIG. 6b is a schematic diagram showing a simulation of the cross-sectional structure of FIG. 6a along the direction C-C'.
Fig. 6c shows a graph of simulated data for changes in the amount of charge in the photodiode N-type region for the time sequence RSR to RSS time period of fig. 3.
Fig. 6d is a graph of simulation data showing the relationship between the residual amount of charge in the N-type region of the photodiode and the TG low voltage at time t8 in fig. 3.
Description of the element reference
101 photodiode N-type region
102 photodiode protective layer
103 charge transfer assist gate
104 charge transfer transistor
105 floating diffusion active region
106 reset transistor
107 source follower transistor
108 pixel selection transistor
401. 405 potential well
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The utility model is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structures are not partially enlarged in general scale for convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. As used herein, "between … …" is meant to include both endpoints.
In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed freely, and the layout of the components may be more complicated.
The embodiment provides an image sensor pixel structure for improving image tailing, and the image sensor pixel structure comprises a photodiode, a charge transfer transistor, a floating diffusion active region, a reset transistor, a source follower transistor and a charge transfer auxiliary gate.
In the present embodiment, the charge transfer auxiliary gate is disposed above the photodiode in the pixel structure of the image sensor, and the gate of the charge transfer auxiliary gate is in a high potential state in the integration period of the photodiode, so that the fully depleted potential of the N-type region of the photodiode is increased and the charge capacity is increased; in the process of executing the first reset operation and the transmission operation of the photoelectric charge signal, the grid electrode of the charge transmission auxiliary grid is in a low potential state, the complete depletion potential of the photodiode N-type area can be reduced, the charge transmission auxiliary grid plays a role in driving charges, the efficiency of the charges transmitted from the photodiode to the floating diffusion active area is effectively improved, the problem of charge residue in the photodiode N-type area is avoided, and therefore the image smear problem of the image sensor can be effectively improved.
Specifically, the pixel structure of the image sensor can be applied to a front-side-illuminated CMOS image sensor, a back-side-illuminated CMOS image sensor, or a CCD image sensor, and the substrate of the pixel structure of the image sensor can be a P-type substrate or an N-type substrate.
As shown in fig. 1, which is a schematic structural diagram of the pixel structure of the image sensor provided in this embodiment, in fig. 1, the pixel structure of the image sensor includes a photodiode N-type region 101, a photodiode protection layer 102, a charge transfer auxiliary gate 103, a charge transfer transistor 104, a floating diffusion active region 105, a reset transistor 106, a source follower transistor 107, and a pixel selection transistor 108.
The region a in fig. 1 is a schematic cross-sectional structure diagram corresponding to a device, the reset transistor 106, the source follower transistor 107, and the pixel selection transistor 108 are only schematic circuit diagrams corresponding thereto, P-epi is a P-type epitaxial layer substrate, and STI is a shallow trench isolation region.
Specifically, the source terminal of the charge transfer transistor 104 is the photodiode N-type region 101, and the drain terminal of the charge transfer transistor 104 is the floating diffusion active region 105; a source terminal of the reset transistor 106 and a gate terminal of the source follower transistor 107 are both connected to the floating diffusion active region 105; the drain end of the reset transistor 106 and the drain end of the source follower transistor 107 are both externally connected with a power supply anode Vdd; a source terminal of the source follower transistor 107 is connected to a drain terminal of the pixel selection transistor 108, and a source terminal of the pixel selection transistor 108 is a signal output terminal output.
In another embodiment, the pixel selection transistor 108 in fig. 1 may also be omitted as required, at this time, a drain terminal of the reset transistor 106 is externally connected to a first power voltage, a drain terminal of the source follower transistor 107 is externally connected to a second power voltage, the first power voltage and the second power voltage may be controlled by a decoder timing circuit, and a source terminal of the source follower transistor 107 is a signal output terminal output.
As an example, the gate terminal TG of the charge transfer auxiliary gate 103, the gate terminal TX of the charge transfer transistor 104, the gate terminal RST of the reset transistor 106, and the gate terminal RS of the pixel selection transistor 108 are respectively controlled by a decoder timing circuit to realize operations of pixel acquisition and output of an optoelectronic signal.
As an example, the photodiode protection layer 102 may have a thickness of 0.05 μm to 0.1 μm, and the photodiode protection layer 102 may have an ion doping concentration of 1e16ions/cm3The above.
Specifically, in this embodiment, the photodiode N-type region 101 is a photoelectric signal conversion region, the photodiode protection layer 102 is located above the photodiode N-type region 101, the charge transfer auxiliary gate 103 is disposed close to the photodiode N-type region 101, the thickness of the photodiode protection layer 102 is 0.05 μm to 0.1 μm, such as 0.05 μm, 0.08 μm, 0.1 μm, and the like, and the ion doping concentration of the photodiode protection layer 102 is at least 1e16ions/cm3As mentioned above, the doping ions of the photodiode protection layer 102 may be boron ions to form a P-type Pin protection layer, but not limited thereto.
As an example, the charge transfer assist gate 103 is located at an intermediate position above the photodiode.
Specifically, fig. 2 illustrates a schematic top view structure of the area a in fig. 1, where the charge transfer auxiliary gate 103 is located above the photodiode protection layer 102, and preferably, the charge transfer auxiliary gate 103 is located in the middle of the plane above the photodiode, that is, the center of the charge transfer auxiliary gate 103 and the center of the photodiode are located on the same vertical line, so as to better adjust the fully depleted potential of the photodiode through the charge transfer auxiliary gate 103.
As an example, the projection area of the charge transfer auxiliary gate 103 on the photodiode is greater than or equal to 1/5 of the area of the photodiode, and as the projection area of the charge transfer auxiliary gate 103 on the photodiode can be 1/5, 1/4, 1/3, 1/2 of the area of the photodiode, and the center of the charge transfer auxiliary gate 103 and the center of the photodiode are preferably located on the same vertical line, so as to better adjust the fully depleted potential of the photodiode through the charge transfer auxiliary gate 103.
As an example, the charge transfer assist gate 103 includes a gate oxide layer and a gate electrode layer formed on the gate oxide layer. The structure and material of the charge transfer assist gate 103 may be the same as those of other transistors (such as the transfer transistor TX) in the pixel circuit, and the gate of the other transistors may be fabricated based on the same process without additional process steps.
By way of example, the planar shape of the charge transfer auxiliary gate 103 may include a square, a circle, or a polygon, such as a diamond, a rectangle, a triangle, a trapezoid, etc., which may be selected according to the needs, and is not limited herein.
The present embodiment further provides a control method for an image sensor pixel structure for improving image streaking, where the image sensor pixel structure adopts the above structure, and therefore details about specific settings of the image sensor pixel structure are not repeated herein.
Specifically, the control method for improving the pixel structure of the image sensor with image tailing comprises the following steps:
s1: performing a first reset operation to clear the charge in the photodiode, including turning on the reset transistor and the charge transfer transistor, setting the gate terminal of the charge transfer assist gate to a second potential from the first potential after a preset first time, turning off the reset transistor and the charge transfer transistor after a first time period, the photodiode starting integration, and restoring the gate terminal of the charge transfer assist gate to the first potential from the second potential after a preset second time to lower a fully depleted potential of the photodiode;
s2: executing a second reset operation, resetting the floating diffusion active region, giving a high potential pulse operation to the reset transistor, and outputting a reset signal by the pixel structure of the image sensor;
s3: performing a photoelectric charge signal transfer operation including turning on the charge transfer transistor, setting the gate terminal of the charge transfer auxiliary gate from the first potential to a second potential after a preset third time, turning off the charge transfer transistor after a second time period, ending the integration of the photodiode, and restoring the gate terminal of the charge transfer auxiliary gate from the second potential to the first potential after a preset fourth time, the image sensor pixel structure outputting an initial photoelectric signal to lower a fully depleted potential of the photodiode; wherein the photo-electric signal output by the image sensor pixel structure is equal to the reset signal minus the initial photo-electric signal.
As an example, the first potential is higher than the second potential; the values of the first time, the second time, the third time and the fourth time are all more than 50 ns.
As an example, the charge transfer auxiliary gate 103 has an intrinsic potential, and when the intrinsic potential is a positive value, a low potential (e.g., a second potential) of the gate terminal of the charge transfer auxiliary gate 103 is smaller than a value at which the intrinsic potential takes a negative value; when the intrinsic potential is a negative value, the low potential of the gate terminal of the charge transfer auxiliary gate 103 is less than 0. For example, the charge transfer auxiliary gate 103 includes an n-type doped polysilicon gate having an intrinsic potential of 0.4V, and at this time, the low potential of the gate terminal of the charge transfer auxiliary gate 103 may be selected to be-0.6V (a value minus-0.4 less than the intrinsic potential). Further, the high potential set by the gate terminal of the charge transfer auxiliary gate 103 is-0.5V to 0.5V, and the low potential is less than-0.5V.
Specifically, referring to fig. 3, first, step S1 is executed:
setting the gate terminal RST of the reset transistor 106 and the gate terminal TX of the charge transfer transistor 104 high, at time t 1; then setting the gate end TG of the charge transfer auxiliary gate 103 from a high potential to a low potential, with time t 2; the time t2 when the gate terminal TG of the charge transfer auxiliary gate 103 is set to the low potential from the high potential is different from the time t1 when the gate terminal RST of the reset transistor 106 and the gate terminal TX of the charge transfer transistor 104 are set to the high potential by at least 50 ns; the gate terminal TX is turned on first and then the voltage of the photodiode is adjusted to prevent the photodiode from potential charge overflow when saturated.
After a first time period, i.e., the charges in the photodiode N-type region 101 are cleared, the gate terminal RST of the reset transistor 106 and the gate terminal TX of the charge transfer transistor 104 are set to low potential, and the photodiode starts integrating with a time mark of t 3; then setting the gate terminal TG of the charge transfer auxiliary gate 103 from a low potential to a high potential, with time mark t 4; the time t4 when the gate terminal TG of the charge transfer assist gate 103 is set to the high potential from the low potential differs by at least 50ns from the time t3 when the gate terminal RST of the reset transistor 106 and the gate terminal TX of the charge transfer transistor 104 are set to the low potential; preventing the photodiode from possibly also having charge flowing back.
The gate terminal TG of the charge transfer auxiliary gate 103 is set to have a high potential ranging from-0.5V to 0.5V, and a low potential less than-0.5V.
Then, step S2 is executed:
the gate terminal RST of the reset transistor 106 is given a high potential pulse operation to reset the floating diffusion active region 105, and the image sensor pixel structure outputs a reset signal RSR, TG for high level reading.
Then, step S3 is executed:
setting the gate terminal TX of the charge transfer transistor 104 high, time-stamped t 5; then setting the gate end TG of the charge transfer auxiliary gate 103 from a high potential to a low potential, with time t 6; the time t6 when the gate terminal TG of the charge transfer auxiliary gate 103 is set to the low potential from the high potential differs from the time t5 when the gate terminal TX of the charge transfer transistor 104 is set to the high potential by at least 50 ns.
After a second time period, namely the photoelectric charge in the photodiode N-type region 101 is completely transferred to the floating diffusion active region 105, setting the gate terminal TX of the charge transfer transistor 104 to a low potential, ending the integration of the photodiode, and timing to be t 7; then setting the gate terminal TG of the charge transfer auxiliary gate 103 from a low potential to a high potential, with time mark t 8; then the pixel structure of the image sensor outputs an initial photoelectric signal RSS, TG is read for high level, and noise is prevented consistently; wherein, the time t8 when the gate terminal TG of the charge transfer auxiliary gate 103 is set to the high potential from the low potential is different from the time t7 when the gate terminal TX of the charge transfer transistor 104 is set to the low potential by at least 50 ns.
The high potential range of the gate terminal TG of the charge transfer auxiliary gate 103 is-0.5V to 0.5V, and the low potential is less than-0.5V. The photo signal output by the image sensor pixel structure is equal to the reset signal RSR minus the initial photo signal RSS.
In fig. 3, the time sequence of each time mark is T1, T2, T3, T4, T5, T6, T7 and T8, wherein the integration time period T is equal to T7 minus T3.
Fig. 4 shows a potential well schematic diagram of the pixel structure of the a-region image sensor in fig. 1 during the time period from t5 to t6 in fig. 3. In fig. 4, 401 is the potential well of the photodiode N- type region 101, 405 is the potential well of the floating diffusion active region 105, and Vpin1 is the fully depleted potential of 401. As shown in fig. 4, since Vpin1 is higher than the channel potential of the charge transfer transistor 104, there is a charge residue in 401, and this part of the charge cannot be transferred to 405, and therefore, this part of the charge causes image sensor image smear problems.
Fig. 5 shows a potential well schematic diagram of the pixel structure of the a-region image sensor in fig. 1 during the time period from t6 to t7 in fig. 3. Since the gate terminal TG of the charge transfer assist gate 103 is set to a low potential, the fully depleted potential of the region 401 is lowered, and the Vpin1 is lowered to Vpin2 from the time period t6 to t7, so that the residual charge in the region 401 shown in fig. 4 is driven to be transferred to the region 405.
Fig. 6a to 6d are schematic views of TCAD simulation (technical computer aided design) performed according to the pixel structure of the image sensor and the control method thereof, so as to further illustrate the advantages of the present invention compared to the prior art.
Fig. 6a is a schematic diagram of a layout simulation of the region a shown in fig. 1, in which the charge transfer auxiliary gate 103 is a polygonal structure, and C-C' is marked as a tangent position.
FIG. 6b is a simulation of the cross-sectional structure of the C-C mark in FIG. 6 a.
Fig. 6c is a simulation data graph of the change in the amount of charge in the region 101 of the time sequence RSR to RSS time period shown in fig. 3, in which TX off represents that the charge transfer transistor 104 is in an off state, TX on represents that the charge transfer transistor 104 is in an on state, the ordinate axis represents the amount of charge in the region 101, the abscissa axis represents time, and the amount of charge in the region 101 before time t5 is 12.4 ke-.
The TG high voltage is 0V and the TG low voltage is 0V, -0.5V, -1V respectively as shown in FIG. 6 c. FIG. 6c shows three curves for TG low voltage of 0V, -0.5V, -1V; the curve where TG is 0V illustrates that, equivalent to the operating characteristics of the pixel in the prior art, a large amount of charges cannot be transferred in the region 101, which causes a charge residue problem; the curve with TG ═ 0.5V illustrates that the amount of residual charge is greatly reduced, but a small amount of charge remains in region 101, still causing image smear problems; the curve with TG ═ 1V illustrates that the amount of charge remaining in region 101 is less than 1 charge, and therefore no image smear problem arises.
Fig. 6d is a simulation data curve of the relationship between the residual amount of charge in the region 101 and the TG low voltage at the time t8 shown in fig. 3. As shown in fig. 6d, when the TG low voltage is lower than-0.6V, the amount of charge remaining in the 101 region is lower than 1 charge, which is a charge-free remaining region.
As can be seen from this, in the pixel structure of the image sensor of the present embodiment, in the photodiode integration period, the gate terminal TG of the charge transfer auxiliary gate 103 is in the high potential state, the fully depleted potential of the photodiode N-type region 101 is high, and the charge capacity of the photodiode is high. In the first reset operation and the photoelectric charge signal transmission operation process, the TG at the gate end of the charge transmission auxiliary gate 103 is in a low potential state, so that the complete depletion potential of the photodiode N-type region 101 can be reduced, the charge transmission auxiliary gate 103 plays a role in driving charges, the efficiency of charge transmission from the photodiode N-type region 101 to the floating diffusion active region 105 is effectively improved, the problem of charge residue in the photodiode N-type region 101 cannot be caused, and the problem of image smear of an image sensor can be effectively improved.
In summary, in the image sensor pixel structure for improving image smear of the present invention, the charge transfer auxiliary gate is disposed in the image sensor pixel structure, and the gate of the charge transfer auxiliary gate is in a high potential state in the photodiode integration period, so that the fully depleted potential of the photodiode N-type region is increased and the charge capacity is increased; in the first reset operation and the photoelectric charge signal transmission operation process, the grid electrode of the charge transmission auxiliary grid is in a low potential state, the complete depletion potential of the N-type region of the photodiode can be reduced, the charge transmission auxiliary grid plays a role in driving charges, the efficiency of charge transmission from the photodiode to the floating diffusion active region is effectively improved, the problem of charge residue in the N-type region of the photodiode is avoided, and therefore the image sensor can effectively solve the image smear problem.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the utility model. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (8)
1. An image sensor pixel structure for improving image smear is characterized by comprising a photodiode, a charge transfer transistor, a floating diffusion active region, a reset transistor, a source follower transistor and a charge transfer auxiliary gate, wherein the charge transfer auxiliary gate is positioned above the photodiode, and the full depletion potential of the photodiode is adjusted through the charge transfer auxiliary gate.
2. The image sensor pixel structure of claim 1, wherein: the photodiode is also provided with a protective layer, and the charge transfer auxiliary gate is positioned above the protective layer; the thickness of the protective layer is 0.05-0.1 μm.
3. The image sensor pixel structure of claim 1, wherein: the charge transfer assist gate is located at an intermediate position above the photodiode.
4. The image sensor pixel structure of claim 1, wherein: the planar shape of the charge transfer auxiliary gate includes a square, a circle, or a polygon.
5. The image sensor pixel structure of claim 1, wherein: the pixel structure of the image sensor further comprises a pixel selection transistor, the drain end of the reset transistor and the drain end of the source following transistor are externally connected with a power supply anode, the source end of the source following transistor is connected with the drain end of the pixel selection transistor, and the source end of the pixel selection transistor is a signal output end.
6. The image sensor pixel structure of claim 1, wherein: the source follower transistor is characterized in that the drain end of the reset transistor is externally connected with a first power supply voltage, the drain end of the source follower transistor is externally connected with a second power supply voltage, the first power supply voltage and the second power supply voltage are controlled by a sequential circuit, and the source end of the source follower transistor is a signal output end.
7. The image sensor pixel structure of claim 1, wherein: the grid ends of the charge transmission auxiliary grid, the charge transmission transistor and the reset transistor are controlled by a time sequence circuit so as to realize the operations of pixel collection and photoelectric signal output.
8. The image sensor pixel structure of any one of claims 1-7, wherein: the projection area of the charge transfer assist gate on the photodiode is greater than or equal to 1/5 of the area of the photodiode.
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