CN204632761U - Imageing sensor - Google Patents
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- CN204632761U CN204632761U CN201520373713.2U CN201520373713U CN204632761U CN 204632761 U CN204632761 U CN 204632761U CN 201520373713 U CN201520373713 U CN 201520373713U CN 204632761 U CN204632761 U CN 204632761U
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Abstract
The utility model provides imageing sensor, comprise: multiple pixel cell be arranged in array, pixel cell comprises: transistor is followed in source, the region, channel region that transistor is followed in source is provided with the first N-type doped region near grid oxic horizon inner surface, or the region, channel region that transistor is followed in source is inwardly disposed with P type doped region along grid oxic horizon, the second N-type doped region; Source is followed the grid oxic horizon of the transistor grid oxic horizon the thickest compared with other transistor of pixel cell and is as thin as few 5 dusts, and the mutual conductance of transistor is followed in increase source.
Description
Technical field
The utility model relates to field of image sensors, particularly relates to the side of a kind of imageing sensor and reduction image sensor noise.
Background technology
Imageing sensor is semiconductor device light signal being converted into the signal of telecommunication, and imageing sensor has photo-electric conversion element.
Imageing sensor is by being divided into again CMOS (Complementary Metal Oxide Semiconductor) (CMOS) imageing sensor and charge-coupled device (CCD) imageing sensor.The advantage of ccd image sensor is to image sensitivity compared with high and noise is little, but ccd image sensor and other devices is integrated more difficult, and the power consumption of ccd image sensor is higher.By contrast, to have technique simple, easily and other devices are integrated, volume is little, lightweight, power consumption is little, low cost and other advantages for cmos image sensor.Therefore, along with technical development, cmos image sensor replaces ccd image sensor more and more and is applied in each electronic product.Current cmos image sensor has been widely used in static digital camera, camera cell phone, Digital Video, medical camera head (such as gastroscope), automobile-used camera head etc.
The core parts of imageing sensor are pixel cell (Pixel), size, dark current levels, noise level, imaging permeability, color saturation of image and image deflects etc. the factor of the direct effect diagram image-position sensor of pixel cell.
All the time, the factor of conflict promotes imageing sensor together and advances:
1. economic factor: wafer can the image sensor chip of output more, then the cost of image sensor chip is lower, and pixel cell occupies most of area of whole image sensor chip, therefore, in order to save cost, require that the size of pixel cell makes less, that is, consider for economic factor, require that in imageing sensor, the size of pixel cell reduces.
2. image quality factors: in order to ensure picture quality, particularly in order to ensure the indexs such as light sensitive degree, color saturation and imaging permeability, need enough light in the photo-electric conversion element (usually adopting photodiode) of pixel cell, and larger pixel cell can have larger photosensitive area to accept light, therefore, larger pixel cell can provide good picture quality in principle; In addition, in pixel cell except photo-electric conversion element, also has the switching device of considerable part, such as reset transistor, transmission transistor and amplifying device (as transistor is followed in source), these devices decide dark current, noise and image deflects etc. equally, consider from picture quality angle, the electric property of large device is better in principle, contributes to the image forming better quality; For this reason known, consider for image quality factors, require that the size of pixel cell in imageing sensor increases.
Under the prerequisite of image sensor pixel limited area, image intensity signal limits relatively, by reducing the noise of transducer, thus obtains high image signal noise ratio, is the important channel of improving imageing sensor quality.Source follower noise is the important source of image sensor noise, thus adopts low noise and the source follower of stable performance to be the important method reducing image sensor noise.
In prior art, pixel cell often adopts 4T or 3T structure, for 4T structure, each pixel cell comprises: photoelectric conversion unit (Photodiode or Photodetector), transfering transistor (Transfer Transistor), reset transistor (Reset Transistor), source follow transistor (Source Follow Transistor), row gate transistor (Row Selector Transistor); Light carries out collection by the electric charge collecting region of photoelectric conversion unit and is converted to signal charge, be transferred to floating diffusion region (FD) through transfering transistor and be converted to signal potential, the grid that transistor is followed in floating diffusion region and source is connected, because floating diffusion region current potential under the effect of photovoltaic effect is easily dragged down in existing design, cause source to follow source class, the grid reverse breakdown of transistor, affect the performance of transistor; In addition, the defect that in the process of Charger transfer, electric charge is easy to depend on interface surface causes noise; Therefore, the above-mentioned various technological difficulties how solved in pixel cell become the problem of extensively research in the industry.
Utility model content
The utility model provides a kind of imageing sensor, comprising: multiple pixel cell be arranged in array, and described pixel cell comprises:
Transistor is followed in source, the region, channel region that transistor is followed in described source is provided with the first N-type doped region near grid oxic horizon inner surface, or the region, channel region that transistor is followed in described source is inwardly disposed with P type doped region along grid oxic horizon, the second N-type doped region;
Described source is followed the thickest grid oxic horizon of other transistor of the more described pixel cell of grid oxic horizon of transistor and is as thin as few 5 dusts, increases the mutual conductance that transistor is followed in described source.
Preferably, described pixel cell also comprises: reset transistor, and the source class of described reset transistor is connected with resetting voltage; The drain electrode of described reset transistor is connected with floating diffusion region, described reset transistor is provided with clamper floating diffusion region potential mechanism, and the absolute value preventing from described floating diffusion region from deducting following the current potential of transistor drain in source follows the puncture voltage between the leakage level of transistor, grid higher than source.
Preferably, described clamper floating diffusion region potential mechanism is: control the threshold voltage of described reset transistor lower than 0V.
Preferably, the threshold voltage of described reset transistor is less than or equal to-0.5V for being more than or equal to-1.5V, and described grid voltage is less than or equal to 5V for being more than or equal to 0V.
Preferably, the degree of depth of described first N-type doped region is: 0 micron to 0.2 micron; Doping content is: 1e16 atom/cm
-3to 3e18atom/cm
-3.
Preferably, the degree of depth of described P type doped region is 0 micron to 0.05 micron, and doping content is 1e16 atom/cm
-3to 2e18atom/cm
-3; The degree of depth of the second N-type doped region is 0 micron to 0.2 micron, and doping content is 1e16 atom/cm
-3to 3e18atom/cm
-3.
Preferably, the source voltage of described reset transistor is: be more than or equal to 2.5V and be less than or equal to 3.5V; The drain voltage that transistor is followed in described source is: be more than or equal to 2.1V and be less than or equal to 3.5V.
The utility model has following technical advantage:
1. following transistor by adopting buried channel transistor to be used as source, reducing the noise of imageing sensor.
2. transistor is followed by adopting the grid level oxide layer thinner than other transistor of pixel region in source, and the mutual conductance of transistor is followed in the source of improve, and is conducive to reducing noise.
3., by being provided with clamper floating diffusion region potential mechanism in reset transistor structure, the grid that transistor is followed in the source that can prevent causes puncturing because voltage difference is excessive with drain electrode.
Accompanying drawing explanation
By Figure of description and subsequently together with Figure of description for illustration of the embodiment of some principle of the utility model, the further feature that the utility model has and advantage will become clear or more specifically be illustrated.
Fig. 1 is the allomeric function module map of imageing sensor in prior art;
Fig. 2 is the transistor connection diagram of the pixel cell of the utility model one embodiment;
Fig. 3 is the structural representation that transistor is followed in the source of the utility model one embodiment;
Fig. 4 is the structural representation that transistor is followed in the source of another embodiment of the utility model;
Fig. 5 is the schematic flow sheet that the utility model reduces the method for image sensor noise.
Embodiment
As stated in the Background Art, in prior art, the source of imageing sensor is followed transistor and easily reverse breakdown is occurred, and because defect causes charge noise larger in the process of Charger transfer.
Based on above-mentioned technological deficiency, the utility model provides a kind of imageing sensor and reduces the method for image sensor noise, in order to more become apparent the purpose of this utility model, characteristic, advantage, below in conjunction with Figure of description, specific description is done to embodiment of the present utility model.
Please refer to Fig. 1, Fig. 1 is the allomeric function module map of imageing sensor in prior art, imageing sensor comprises: pel array 10, control module 20, read module 30, some pixel cells 100 that wherein pel array 10 is arranged by the capable M of being multiplied by of N form (N, M be more than or equal to 1 natural number), control module 20 is by the gating to pixel cell in row, column direction through read module 30 reads, read output signal.Wherein read module 30 also comprises gain unit, some signal processing modules such as AD conversion unit, and the Signal transmissions processed is carried out follow-up digital processing to function logic module 40.
Please refer to Fig. 2, Fig. 3, Fig. 2 is the transistor connection diagram of the pixel cell of the utility model one embodiment; Fig. 3 is the structural representation that transistor is followed in the source of the utility model one embodiment.Pixel cell 100 comprises: photodiode 101, transfering transistor 103, reset transistor 105, source follow transistor 107, row gate transistor 109.The first order ground connection GND of photodiode, the source class of shifting transistor 103 is switched through in the second level; The grid of transfering transistor 103 meets grid control signal Vtg, and the drain electrode of transfering transistor 103 connects floating diffusion region 111; Light irradiates imageing sensor, and changed by photodiode 101 and formed in the electric charge collecting region of photodiode 101 and collect signal charge, signal charge is shifted by transfering transistor 103 and forms signal potential in floating diffusion region 111.The grid of reset transistor 105 meets reseting controling signal Vrst, the source class of reset transistor 105 connects resetting voltage, meet supply voltage VDD in one embodiment, the drain electrode of reset transistor 105 connects floating diffusion region 111, is suitable for the signal potential of reset floating diffusion region 111.The grid that transistor 107 is followed in source connects floating diffusion region, the leakage level that transistor 107 is followed in source meets supply voltage VDD, the source electrode that transistor 107 is followed in source connects the source class of row gate transistor 109, and the current potential of floating diffusion region is for controlling source and follow transistor 107 and exporting a signal relevant with signal potential; The grid of row gate transistor 109 connects row gate control signal, and the drain electrode of row gate transistor 109 connects output signal end.Reset transistor 105 is provided with the mechanism of clamper floating diffusion region potential, the machine-processed object of clamper floating diffusion region 111 current potential is the hypopotenia preventing described floating diffusion region 111, the absolute value causing floating diffusion region to deduct following the current potential of transistor drain in source follows the puncture voltage between the leakage level of transistor, grid higher than source, makes source follow transistor 107 reverse breakdown.The concrete threshold voltage controlling reset transistor is in one embodiment lower than 0V, and the threshold voltage of reset transistor 105 is specially and is more than or equal to-1.5V and is less than or equal to-0.5V, and the grid voltage of reset transistor 105 is less than or equal to 5V for being more than or equal to 0V.Concrete, when the first state, reset transistor 105 is opened, transfering transistor 103 is closed, the source class of reset transistor 105 connects the floating diffusion region 111 that resetting voltage reset is connected to reset transistor 105 drain electrode, floating diffusion region 111 current potential is now the first voltage, and the size of the first voltage is 2.5V to 3.5V.When the second state, reset transistor 105 is closed, and now the current potential of floating diffusion region 111 is the second voltage, and the second voltage is between 2.4V to 3.4V, and the second voltage is little compared with the second voltage; Open transfering transistor 103 afterwards, the signal charge that transfering transistor 103 shifts through photodiode converts is converted to signal voltage to floating diffusion region 111, the signal voltage of again closing transfering transistor 103 now floating diffusion region 111 after integration completes is tertiary voltage, tertiary voltage is 0V to 3.4V, and the numerical value of tertiary voltage is less than the second voltage.During the third state, when the grid voltage Vg that tertiary voltage Vd is less than or equal to reset transistor 105 deducts the threshold voltage Vth of reset transistor 105 (for reset transistor: Vd≤Vg-Vth), because now Vg is 0V, the threshold voltage Vth of reset transistor 105 is that negative (Vth is less than or equal to-0.5V for being more than or equal to-1.5V in the present embodiment) makes reset transistor 105 be easy to open, reset transistor 105 is opened again, tertiary voltage is drawn high to the 4th voltage by resetting voltage, 4th voltage is 0.5V to 1.2V, because floating diffusion region 111 is connected to the grid that transistor 107 is followed in source, the grid potential that now transistor 107 is followed in source is also the 4th voltage, the drain voltage that transistor 107 is followed in source deducts the absolute value of following the 4th voltage of transistor 107 in source and is less than or equal to the 5th voltage, 5th voltage is the reverse breakdown voltage that transistor is followed in source, the grid potential of following transistor 107 due to now source is driven high, the drain voltage that transistor 107 is followed in source deduct source follow the numerical value of the 4th voltage of transistor 107 definitely only can be less, be more prone to the reverse breakdown that transistor 107 drain-gate pole is followed in the source that prevents, 5th voltage is for being greater than 4V.In addition, the source voltage of reset transistor is: be more than or equal to 2.5V and be less than or equal to 3.5V; The source voltage that transistor is followed in described source is: be more than or equal to 2.1V and be less than or equal to 3.5V.
In the present embodiment, the structure that transistor 107 also adopts buried channel devices is followed in source, refer to Fig. 3, source is followed transistor 107 and is comprised: grid 1071, grid level oxide layer 1072, have N-type doping source class 1073, have N-type doping drain electrode 1074, the region, channel region of following transistor 107 in source by being provided with the degree of depth of the first N-type doped region 1075, first N-type doped region through grid oxic horizon 1072 inner surface is: 0 micron to 0.2 micron; Doping content is: 1e16 atom/cm-3 to 3e18atom/cm-3; The grid oxic horizon 1072 that transistor 107 is followed in source compare in technique makes transfering transistor 103, reset transistor 105, row gate transistor 109 grid oxic horizon all thin, and 5 dusts at least thinner than grid oxic horizon the thickest in above-mentioned transistor, this is the mutual conductance of following transistor 107 in order to increase source.In the present embodiment, the threshold voltage of reset transistor 105 is reduced to below 0V by design, current potential in floating diffusion region 111 due to photovoltaic effect dragged down time, the grid potential that transistor 109 is followed in current potential now in floating diffusion region 111 and then control source can be improved, transistor 109 reverse breakdown is followed in the source that prevents, in addition, the impact of defect can be reduced by the design of source being followed to transistor 107 buried channel devices, the thickness of the grid oxic horizon of transistor 107 is followed to increase the mutual conductance that transistor 107 is followed in source in reduction source, prevents reverse breakdown.
Please continue to refer to Fig. 4, Fig. 4 is the structural representation that transistor is followed in the source of another embodiment of the utility model, in the present embodiment, the structure that transistor 107 adopts buried channel devices is equally followed in source, refer to Fig. 4, source is followed transistor 107 and is comprised: grid 1071, grid level oxide layer 1072, there is the source class 1073 of N-type doping, there is the drain electrode 1074 of N-type doping, the region, channel region that transistor is followed in source is inwardly disposed with P type doped region 1076 along grid oxic horizon, second N-type doped region 1077, the degree of depth of P type doped region 1076 is 0 micron to 0.05 micron, doping content is 1e16 atom/cm-3 to 2e18atom/cm-3, the degree of depth of the second N-type doped region 1077 is 0 micron to 0.2 micron, and doping content is 1e16 atom/cm-3 to 3e18atom/cm-3, the grid oxic horizon 1072 that transistor 107 is followed in source compare in technique makes transfering transistor 103, reset transistor 105, row gate transistor 109 grid oxic horizon all thin, and 5 dusts at least thinner than grid oxic horizon the thickest in above-mentioned transistor, this is the mutual conductance of following transistor 107 in order to increase source.In the present embodiment, the threshold voltage of reset transistor 105 is reduced to below 0V by design, current potential in floating diffusion region 111 due to photovoltaic effect dragged down time, the grid potential that transistor 109 is followed in current potential now in floating diffusion region 111 and then control source can be improved, transistor 109 reverse breakdown is followed in the source that prevents, in addition, the impact of defect can be reduced by the design of source being followed to transistor 107 buried channel devices, the thickness of the grid oxic horizon of transistor 107 is followed to increase the mutual conductance that transistor 107 is followed in source in reduction source, prevents reverse breakdown.Please refer to Fig. 5, Fig. 5 is the schematic flow sheet that the utility model reduces the method for image sensor noise, and step comprises: S101: provide imageing sensor, and it comprises: multiple pixel cell be arranged in array; S103: in pixel cell, providing source follows transistor, the region, channel region that transistor is followed in described source is provided with the first N-type doped region near grid oxic horizon inner surface, or the region, channel region that transistor is followed in described source is inwardly disposed with P type doped region along grid oxic horizon, second N-type doped region, to reduce the noise of described imageing sensor; S105: providing source follows the grid oxic horizon of transistor, makes the thickest grid oxic horizon of more described other transistor of pixel cell be as thin as few 5 dusts, increases the mutual conductance that transistor is followed in described source.Described step also comprises: provide reset transistor, and the source class of described reset transistor is connected with resetting voltage; The drain electrode of described reset transistor is connected with floating diffusion region, described reset transistor is provided with clamper floating diffusion region potential mechanism, and the absolute value preventing from described floating diffusion region from deducting following the current potential of transistor drain in source follows the puncture voltage between the leakage level of transistor, grid higher than source.Described clamper floating diffusion region potential mechanism is: control the threshold voltage of described reset transistor lower than 0V.The threshold voltage of described reset transistor is less than or equal to-0.5V for being more than or equal to-1.5V, and described grid voltage is less than or equal to 5V for being more than or equal to 0V.The degree of depth of described first N-type doped region is: 0 micron to 0.2 micron; Doping content is: 1e16 atom/cm-3 to 3e18atom/cm-3.The degree of depth of P type doped region is 0 micron to 0.05 micron, and doping content is 1e16 atom/cm-3 to 2e18atom/cm-3; The degree of depth of the second N-type doped region is 0 micron to 0.2 micron, and doping content is 1e16 atom/cm-3 to 3e18atom/cm-3.The source voltage of described reset transistor is: be more than or equal to 2.5V and be less than or equal to 3.5V; The source voltage that transistor is followed in described source is: be more than or equal to 2.1V and be less than or equal to 3.5V.
Described method comprises: during the first state, and described reset transistor is opened, and described transfering transistor is closed; The source class of described reset transistor connects the floating diffusion region that resetting voltage reset is connected to the drain electrode of described reset transistor, and described floating diffusion region potential is the first voltage; During the second state, described reset transistor is closed, and described floating diffusion region potential is the second voltage, opens described transfering transistor; Described transfering transistor transfer is converted to signal voltage to floating diffusion region, closedown transfering transistor after integration completes through the signal charge of photo-electric conversion element conversion, and described floating diffusion region signal voltage is tertiary voltage, and described tertiary voltage is less than the second voltage; During the third state; when the grid voltage that tertiary voltage is less than or equal to reset transistor deducts the threshold voltage of reset transistor; described reset transistor is opened again, and the threshold voltage of described reset transistor, lower than 0V, draws high described tertiary voltage to the 4th voltage by described resetting voltage; Described floating diffusion region connects the grid that transistor is followed in described source, the current potential that the grid of transistor is followed in described source is the 4th voltage, 4th voltage deducts the absolute value of following the drain potential of transistor in source and is less than or equal to the 5th voltage, follows with the source that prevents the reverse breakdown that transistor leaks level, grid.
Described first voltage is 2.5V to 3.5V:; Described second voltage is 2.4V to 3.4V: described tertiary voltage is 3.4V to 0V.The threshold voltage of described reset transistor is 0.5V to 1.2V.Described 4th voltage is: 0.5V to 1.2V.Described 5th voltage is the reverse breakdown voltage of described floating diffusion region, and described 5th voltage is for being greater than 4V.
Although the utility model discloses as above, the utility model is not defined in this.Any those skilled in the art, not departing from spirit and scope of the present utility model, all can do various variation and amendment, and therefore protection range of the present utility model should be as the criterion with claim limited range.
Claims (7)
1. an imageing sensor, is characterized in that, comprising: multiple pixel cell be arranged in array, and described pixel cell comprises:
Transistor is followed in source, the region, channel region that transistor is followed in described source is provided with the first N-type doped region near grid oxic horizon inner surface, or the region, channel region that transistor is followed in described source is inwardly disposed with P type doped region along grid oxic horizon, the second N-type doped region;
Described source is followed the thickest grid oxic horizon of other transistor of the more described pixel cell of grid oxic horizon of transistor and is as thin as few 5 dusts, increases the mutual conductance that transistor is followed in described source.
2. imageing sensor according to claim 1, is characterized in that, described pixel cell also comprises: reset transistor, and the source class of described reset transistor is connected with resetting voltage; The drain electrode of described reset transistor is connected with floating diffusion region, described reset transistor is provided with clamper floating diffusion region potential mechanism, and the absolute value preventing from described floating diffusion region from deducting following the current potential of transistor drain in source follows the puncture voltage between the leakage level of transistor, grid higher than source.
3. imageing sensor according to claim 2, is characterized in that, described clamper floating diffusion region potential mechanism is: control the threshold voltage of described reset transistor lower than 0V.
4. imageing sensor according to claim 3, is characterized in that, the threshold voltage of described reset transistor is less than or equal to-0.5V for being more than or equal to-1.5V, and described grid voltage is less than or equal to 5V for being more than or equal to 0V.
5. imageing sensor according to claim 1, is characterized in that, the degree of depth of described first N-type doped region is: 0 micron to 0.2 micron; Doping content is: 1e16 atom/cm
-3to 3e18atom/cm
-3.
6. imageing sensor according to claim 1, is characterized in that, the degree of depth of described P type doped region is 0 micron to 0.05 micron, and doping content is 1e16 atom/cm
-3to 2e18atom/cm
-3; The degree of depth of the second N-type doped region is 0 micron to 0.2 micron, and doping content is 1e16 atom/cm
-3to 3e18atom/cm
-3.
7. imageing sensor according to claim 2, is characterized in that, the source voltage of described reset transistor is: be more than or equal to 2.5V and be less than or equal to 3.5V; The drain voltage that transistor is followed in described source is: be more than or equal to 2.1V and be less than or equal to 3.5V.
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| CN201520373713.2U CN204632761U (en) | 2015-06-03 | 2015-06-03 | Imageing sensor |
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| CN201520373713.2U CN204632761U (en) | 2015-06-03 | 2015-06-03 | Imageing sensor |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105100651A (en) * | 2015-06-03 | 2015-11-25 | 格科微电子（上海）有限公司 | Image sensor and method for reducing noise of image sensor |
| CN108141550A (en) * | 2015-10-01 | 2018-06-08 | 高通股份有限公司 | High dynamic range solid state image sensor and camera system |
-
2015
- 2015-06-03 CN CN201520373713.2U patent/CN204632761U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105100651A (en) * | 2015-06-03 | 2015-11-25 | 格科微电子（上海）有限公司 | Image sensor and method for reducing noise of image sensor |
| CN105100651B (en) * | 2015-06-03 | 2019-04-23 | 格科微电子（上海）有限公司 | Imaging sensor and the method for reducing image sensor noise |
| CN108141550A (en) * | 2015-10-01 | 2018-06-08 | 高通股份有限公司 | High dynamic range solid state image sensor and camera system |
| US11297258B2 (en) | 2015-10-01 | 2022-04-05 | Qualcomm Incorporated | High dynamic range solid state image sensor and camera system |
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