CN103929600B - The shared dot structure of high sensitivity cmos image sensor - Google Patents

The shared dot structure of high sensitivity cmos image sensor Download PDF

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CN103929600B
CN103929600B CN201410183461.7A CN201410183461A CN103929600B CN 103929600 B CN103929600 B CN 103929600B CN 201410183461 A CN201410183461 A CN 201410183461A CN 103929600 B CN103929600 B CN 103929600B
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active area
transistor
shared
image sensor
cmos image
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CN103929600A (en
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郭同辉
唐冕
旷章曲
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Beijing Superpix Micro Technology Co Ltd
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Beijing Superpix Micro Technology Co Ltd
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Abstract

The invention discloses a kind of shared dot structure of high sensitivity cmos image sensor, including the charge pass transistor and the first floating active area of multiple photodiodes and equal number, also include that a reset transistor, a source follow transistor, a row selecting transistor and the second floating active area, separated by a switching transistor between the first floating active area and the second floating active area.Source follows transistor detection second to float the electric potential signal of active area, the parasitic capacitance of the second floating active area does not change with shared pixel quantity, the opto-electronic conversion gain of shared pixel is effectively increased, the luminous sensitivity of the cmos image sensor using shared dot structure can be effectively improved.

Description

The shared dot structure of high sensitivity cmos image sensor
Technical field
A kind of a kind of the present invention relates to imageing sensor, more particularly to the shared pixel of high sensitivity cmos image sensor Structure.
Background technology
Imageing sensor has been widely used in digital camera, cell phone, medical apparatus and instruments, automobile and other application Occasion.The fast development of CMOS (CMOS complementary metal-oxide-semiconductor) image sensor technologies is particularly manufactured, people couple are made The output image quality of imageing sensor has higher requirement.
Cmos image sensor of the prior art, especially with the cmos image sensor of small area pixel cell, Shared dot structure is generally used, such as two pixels are shared, and four pixels are shared, or more pixels are shared.Using picture The shared major reason of element, is to save transistor, to expand the area of photodiode, and then improves the photosensitive sensitive of pixel Degree;But this mode for improving luminous sensitivity, but sacrifices the opto-electronic conversion gain of floating active area, because shared structure In each pixel charge pass transistor with floating active area be connected, and then increased floating active area parasitism electricity Hold, shared pixel quantity is more, the parasitic capacitance for floating active area is bigger, so opto-electronic conversion gain is lower;The light of pixel Electric conversion gain is lower, and luminous sensitivity is lower, and this is just photosensitive sensitive to improve with using the method for expanding photo-diode area The original intention of degree is disagreed.
Imageing sensor of the prior art, with four transistor of cmos image sensor, four pixel shared structures (4T4S) As a example by, as shown in figure 1,101~104 are respectively the photodiode of four pixels, 105~108 are respectively correspondingly four photoelectricity The charge pass transistor of diode, 109 is reset transistor, and 110 follow transistor for source, and 111 is row selecting transistor, 112 is row bit line, and FD is floating active area;Wherein FD capacitive parts, C1 are the grid source of FD and each charge transfer transistor gate Overlap capacitance, grid source overlap capacitances of the C2 for FD and 109, C3 and C4 are respectively the grid leak and grid source overlap capacitance of FD and 110, Cm4 is FD line metallic parasitic electric capacity, and 4Caa is FD active area body capacitances.
As shown in Figure 1, the total capacitance that can draw FD is:
CFD4=4C1+C2+C3+C4+Cm4+4Caa
Coefficient 4 in 4C1 and 4Caa in equation is equal with the pixel quantity in shared structure, and Cm4 is proportional to pixel Quantity.Therefore the parasitic total capacitance that can calculate N number of pixel shared structure Zhong FD areas is:
CFDn=nC1+C2+C3+C4+Cmn+nCaa
N in above-mentioned equation is bigger, and the transistor that pixel is averagely saved is more, and then the photodiode expansion of pixel Area is more, and pixel sensitivity will be higher;But, the n in equation is bigger, and floating active area total capacitance CFDn is higher, so as to Opto-electronic conversion gain is reduced, the luminous sensitivity of pixel is lower, this is carried with the method using expansion photodiode area The original intention of high luminous sensitivity is disagreed.
Content of the invention
It is an object of the invention to provide a kind of shared dot structure of high sensitivity cmos image sensor, by using opening The floating active area method that transistor isolation goes out little parasitic capacitance is closed, and the opto-electronic conversion gain of pixel is made not by shared pixel count Amount affects.
The purpose of the present invention is achieved through the following technical solutions:
The shared dot structure of high sensitivity cmos image sensor of the present invention, including multiple photodiodes and identical The charge pass transistor of quantity and the first floating active area, also include a reset transistor, source follow transistor, one Individual row selecting transistor and the second floating active area, pass through one between the first floating active area and the second floating active area Switching transistor separates.
As seen from the above technical solution provided by the invention, the high sensitivity cmos image sensor that the present invention is provided Shared dot structure, due to will be less with parasitic capacitance for larger for parasitic capacitance the first floating active area using switching transistor Second floating active area separate, source follow transistor detection second float active area electric potential signal, second floating active area Parasitic capacitance not with shared pixel quantity change, effectively increase the opto-electronic conversion gain of shared pixel, can effectively improve Luminous sensitivity using the cmos image sensor of shared dot structure.
Description of the drawings
Fig. 1 shows for the circuit of four transistors, four pixel shared structures (4T4S) of the cmos image sensor of prior art It is intended to.
Fig. 2 is the circuit diagram of four pixel shared structures of the cmos image sensor in the embodiment of the present invention.
Potential well schematic diagrams one of the Fig. 3 for the shared pixel in the embodiment of the present invention in photoelectricity transfer operation.
Potential well schematic diagrams two of the Fig. 4 for the shared pixel in the embodiment of the present invention in photoelectricity transfer operation.
Specific embodiment
The embodiment of the present invention will be described in further detail below.
The shared dot structure of high sensitivity cmos image sensor of the present invention, its preferably specific embodiment is:
Including the charge pass transistor and the first floating active area of multiple photodiodes and equal number, also include one Individual reset transistor, a source follow transistor, a row selecting transistor and the second floating active area, first floating to have Separated by a switching transistor between source region and the second floating active area.
The drain electrode of the switching transistor is connected with the described second floating active area, source electrode and described first floats active area It is connected.
The source follows the grid of transistor to be connected with the described second floating active area, and the source follows transistor to be used for visiting Survey the electric potential signal change of the second floating active area.
In the shared dot structure of high sensitivity cmos image sensor, the pixel quantity that shared pixel includes is more than Or it is equal to two.
The change of quantity that the parasitic total capacitance of the second floating active area does not include with shared pixel and change.
When photo-electric charge transfer operation is carried out, the potential of the first floating active area is complete higher than the photodiode Fully- depleted potential 0V~0.3V.
The first floating active area includes the active area of transistor source and drain active area or photodiode technique.
The photodiode includes Pin type photodiodes, part Pin types photodiode or polysilicon grid-type light Electric diode.
The shared dot structure of high sensitivity cmos image sensor of the invention, due to using switching transistor by parasitism The first larger floating active area of electric capacity the second floating active area less with parasitic capacitance separates, and source follows transistor to detect the The electric potential signal of two floating active areas, the parasitic capacitance of the second floating active area do not change with shared pixel quantity, effectively improve The opto-electronic conversion gain of shared pixel, can effectively improve the sensitive of cmos image sensor using shared dot structure Degree.
Specific embodiment:
In an embodiment of the present invention, by taking four pixel shared structure of cmos image sensor as an example, adopt in this dot structure With Pin type N-type photodiodes, the transistor in pixel adopts N-type transistor.
As shown in Fig. 2 including the electric charge in 201~204, four pixels of photodiode of four pixels in shared structure Transmission transistor 205~208, reset transistor 209, source follow transistor 210, row selecting transistor 211, row bit line 212, open Close transistor 213;The gate terminal of charge pass transistor 205~208 is respectively TX1, TX2, TX3 and TX4, reset transistor 209 and the gate terminal of row selecting transistor 211 be RX and SX, the gate terminal of switching transistor 213 is TX, and Vdd is supply voltage; FD4 is the first floating active area, and FD is the second floating active area, and C1 is the overlap capacitance of FD and TX, and C2 is the overlapping of FD and RX Electric capacity, C3 and C4 are respectively the drain electrode of FD and 210 and the overlap capacitance of source electrode, and Cm1 is FD metal capacitances, and Caa is FD active areas Body capacitance.
From embodiment accompanying drawing 2, it can be found that the floating active areas of FD4 and FD two are separated by switching transistor 213, source with With the potential change that 210 direct detection second of transistor floats active area FD, the parasitic capacitance expression of the second floating active area FD For:
CFD=Cm1+Caa+C1+C2+C3+C4
Therefore, the CFD4 of traditional 4T4S structure of the CFD expression formulas in this enforcement row than illustrating in the introduction is few 3C1+3Caa, and the Cm4 that can be less than according to design experiences Cm1 in tradition 4T4S structures;CFD expression formulas from the present embodiment In can draw:The value of FD parasitic capacitances CFD does not change with the change of shared pixel quantity, and CFD can be always maintained at not altogether The minima for enjoying 4T dot structures is constant.The size of CFD values determines that the opto-electronic conversion gain C.G. of pixel, expression formula are:
C.G.=q/CFD
Q in expression formula is an electron charge 6.02E-19 coulomb.The luminous sensitivity of pixel is proportional to opto-electronic conversion Gain C.G., therefore the pixel of present invention pixel shared structure, while expansion photodiode area advantage is remain, goes back Remain the constant advantage of the opto-electronic conversion gain of pixel, and opto-electronic conversion yield value and unshared structure 4T dot structure Opto-electronic conversion yield value is identical.So the method for the shared dot structure of the present invention solves the shared pixel opto-electronic conversion of tradition and increases The shortcoming that benefit reduces, improves the luminous sensitivity of shared pixel.
The operation principle of specific embodiment is:
Realize that the method for work of present invention pixel there are two kinds, pixel operation as shown in Figure 3 and Figure 4 is shifted in photo-electric charge Potential well schematic diagram during step.
Shown in Fig. 3,301~304 characterize the potential well of four photodiodes in shared pixel respectively, 305~308 points Four charge pass transistors in shared pixel are not characterized, 309 is reset transistor, 313 is switching transistor, 314 tables The potential well of the first floating active area FD4 is levied, 315 characterize the second potential well for floating active area FD, and 316 characterize supply voltage potential well; TXn is 305~308 gate terminal, and wherein n is 1,2,3 and 4;TX and RX is respectively 313 and 309 gate terminal;CFD represents picture The parasitic capacitance of the second floating active area of element.Potential well state shown in Fig. 3 is the operation that pixel operation is shifted in photo-electric charge Process, wherein 305~308 and 313 dotted line below represent its gate terminal when being GND, i.e., when transistor is closed Potential barrier schematic diagram.
Completely depleted potential of work potential VFD4 of the first floating active area FD4 shown in Fig. 3 higher than photodiode The scope of Vpin is 0V~0.3V, and the technique of the first floating active area is using tradition CIS standard logic process.
Realize for second the operation potential well schematic diagram of present invention pixel structure charge transfer as shown in figure 4,401~404 points The potential well of four photodiodes in shared pixel is not characterized, and 405~408 characterize four electricity in shared pixel respectively Lotus transmission transistor, 409 is reset transistor, and 413 is switching transistor, and 414 characterize the first potential well for floating active area FD4, 415 characterize the second potential well for floating active area FD, and 416 characterize supply voltage potential well;TXn is 405~408 gate terminal, wherein n For 1,2,3 and 4;TX and RX is respectively 413 and 409 gate terminal;CFD represents the parasitism electricity of the second floating active area of pixel Hold.Potential well state shown in Fig. 4 is the operating process that pixel operation is shifted in photo-electric charge, below wherein 405~408 and 413 Dotted line represent its gate terminal be GND when, i.e., potential barrier schematic diagram when transistor is closed.
Completely depleted potential of work potential Vpin4 of the first floating active area FD4 shown in Fig. 4 higher than photodiode The scope of Vpin is 0V~0.3V, and wherein, the technology type that FD4 active areas are adopted is identical with the technology type of photodiode, And in charge transfer state, FD4 has been completely depleted pixel operation, its completely depleted potential is Vpin4.
The above, the only present invention preferably specific embodiment, but protection scope of the present invention is not limited thereto, Any those familiar with the art in the technical scope of present disclosure, the change or replacement that can readily occur in, Should all be included within the scope of the present invention.Therefore, protection scope of the present invention should be with the protection model of claims Enclose and be defined.

Claims (8)

1. the shared dot structure of a kind of high sensitivity cmos image sensor, including multiple photodiodes and equal number Charge pass transistor and the first floating active area, also include that a reset transistor, a source follow transistor, a row choosing Select transistor and the second floating active area, it is characterised in that lead between the first floating active area and the second floating active area Cross a switching transistor to separate.
2. the shared dot structure of high sensitivity cmos image sensor according to claim 1, it is characterised in that described The drain electrode of switching transistor is connected with the described second floating active area, source electrode is connected with the described first floating active area.
3. the shared dot structure of high sensitivity cmos image sensor according to claim 2, it is characterised in that described Source follows the grid of transistor to be connected with the described second floating active area, and the source follows transistor to float for detecting described second The electric potential signal change of floating active area.
4. the shared dot structure of high sensitivity cmos image sensor according to claim 3, it is characterised in that the height In the shared dot structure of sensitivity cmos image sensor, the pixel quantity that shared pixel includes is more than or equal to two.
5. the shared dot structure of high sensitivity cmos image sensor according to claim 4, it is characterised in that described The change of quantity that the parasitic total capacitance of the second floating active area does not include with shared pixel and change.
6. the shared dot structure of high sensitivity cmos image sensor according to any one of claim 1 to 5, its feature It is, when photo-electric charge transfer operation is carried out, the potential of the first floating active area is complete higher than the photodiode Exhaust potential 0V~0.3V.
7. the shared dot structure of high sensitivity cmos image sensor according to claim 6, it is characterised in that described First floating active area includes the active area of transistor source and drain active area or photodiode technique.
8. the shared dot structure of high sensitivity cmos image sensor according to claim 6, it is characterised in that described Photodiode includes Pin type photodiodes, part Pin types photodiode or polysilicon grid-type photodiode.
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