CN2168273Y - Electronic controller for timing - Google Patents

Abstract

The utility model relates to an electronic controller for timing, which is composed of a central processor, a latch, a buffer / driver, a code dialed disk for EPROM codes and BCD codes, a display, etc. The utility model is characterized in that timing signals which is dialed in by the BCD codes realize single signal timing and multiple signal timing through the central processor after the timing signals are treated by internal programs, and has the function of a clock. The utility model can be used for various industrial sequence control, meeting time control, competition time control, etc.

Description

Electronic controller for timing

The utility model relates to a kind of electric time-keeping, time cycle controller.

Various electric time-keepings, the time cycle controller of producing exists two utmost point Differentiation Problems on the whole at present.The timing of one class, time set poor performance, function is few, can't realize any setting and the many reference amounts timing of time, no display function; Another kind of then too complicated, the performance and price ratio, display format is single, can not expand, and more can not realize the expansion of large screen display.

The purpose of this utility model is to provide a kind of both can realize timing, can realize again regularly and the many reference amounts timing, and timing can be set arbitrarily, and timing, the timing controller of band large screen display.

Technical solution of the present utility model is to utilize a central processing unit (CPU) to make the control core, utilize BSD sign indicating number dial to carry timing and timing signal to CPU, this signal enters latches, timing or timing, sending signal by the CPU internal processes takes out this timing or timing signal and carries out timing or regularly, and show by cushioning/drive towards device input nixie display, also can import large screen display and carry out large screen display.

Below in conjunction with an embodiment of the present utility model and accompanying drawing thereof technical solution of the present utility model is elaborated:

What Fig. 1 provided is electrical schematic diagram of the present utility model.

In Fig. 1, IC ₁Be a central processing unit (CPU) (as 8031), IC ₂Be ternary homophase eight D-latchs (as 74LS373), IC ₃Be one or eight homophase three-state buffer/line drives (as 74LS244), IC ₄Be a 16KEPROM(as 2716, BCD ₁, BCD ₂, BCD ₃Be a binary-coded decimal dial, IC ₅Be one or eight bit serial input/parallel Output Shift Register (as 74LS164), IC ₆Be one or six inverter buffers/driver (as 74LS06), IC ₇Be one hex buffer/driver (as 74LS07), IC ₈Be power amplifier, also can adopt discrete component circuit; LED ₁Be nixie display, LED ₂Be large screen display.Central processing unit (CPU) IC ₁One group of data bus PO insert ternary homophase eight D-latch IC respectively ₂Input end and eight homophases three-state buffer/line drive IC ₃Output terminal and 16KEPROMIC ₄Data bus, another group data bus (output) P _1.4～1.7And P _3.2Insert hex buffer/driver IC ₇Input end; P _3.0Insert eight bit serial input/parallel Output Shift Register IC ₅Signal input part A, B, P _3.1Insert its clock signal terminal; P _3.3One road series resistor R ₁Connect the 5V circuit, a path switch K ₂IC is inserted in the back ₇An input end, P _3.4, P _3.5, P _3.6Road series resistor R respectively ₂, R ₃, R ₄Connect the 5V power supply, another road is by switch AN ₁, AN ₂And K ₁Go into ground; IC ₁Output D ₂Insert IC ₄A ₈～A ₁₀, its PSEN control termination IC ₄OE, ale signal inserts IC ₂G end, the RD signal inserts IC ₃1C, 2C the end, P _1.1～P _1.3Insert binary-coded decimal dial BCD ₃, binary-coded decimal dial BCD ₁, BCD ₂Input insert IC respectively ₃Signal input part.IC ₂Output insert IC ₄A ₀～A ₇IC ₅Output directly transport to nixie display LED after through six inverter buffers/driver ₁Low level and power amplifier after transport to large screen display LED ₂Low level; IC ₇Output directly meet nixie display LED ₁A high position and power amplifier after transport to large screen display LED ₂A high position; Its another two-way is exported behind power amplifier, No. one cut-in relay coil J, and one the road inserts K switch ₃After connect loudspeaker.Relay coil J has one group of contact J ₁, J ₂, be used to control controlled source.K ₁, be timing/clock selecting switch, K ₂For hundred/clock is regularly proofreaded switch, K second ₃Be silence switch, AN ₁For ten/clock of timing sequence number branch school to switch, AN ₂For regularly presetting, proofread when starting timing/clock switch.

Principle of work of the present utility model is as follows.When realizing time clock feature, be solidificated in EPROMIC owing to import the control program of CPU in advance ₄In, then after the start, this machine automatically resets, and then functional switch is got to clock position (promptly disconnect), and this moment, the clock pilot lamp was lighted (schematic diagram part omitted), and display shows initial time 1:00 and when beginning to walk automatically.Then according to time of your required setting (as Beijing time) at that time by on time, during the every minute and second school switch AN ₂, AN ₁, K ₂(by change the time one time next time), the time (as Beijing time) that will be adjusted into you time needs can be realized timing, makes clock and uses.In addition, when the school in the process during each school switch be equipped with pilot lamp (schematic diagram part omitted), more eye-catching when making the school.Walk constantly CPU(IC ₁) pass through internal processes at first to its initialization, make its internal timing/counter be in definition status, every 50ms interrupts once, count by internal processes again, realize a second timing, when timing second reaches half second when (0.5 second), judge it is preceding half second or later half second by the internal processes of input, so that display led ₁Accurately flicker shows and adds 1 when timing reached for 60 time-divisions, second returns zero, when timing reaches 60 timesharing, divides back zero, the time add 1, when meter all time zero during to 12 hours (or 24 hours).

When realizing time preset and repeat regularly, if carry out timing working, at first with timing/clock switch K ₁Be allocated to definition status (closure), this moment, this status indicator lamp was lighted (schematic diagram part omitted).Display led ₁What show is that first that will send at present wished timing, is the preset time input CPU(IC that you are wished ₁), at first preset number should be imported CPU, be about to time preset switch AN ₂Press (presetting), binary-coded decimal dial BCD ₃Stir, (as sequence number is 1 to the input sequence number, then with BCD ₃Be allocated to 1, this device once can preset 20 timings 0～19, imports the preset time value then, promptly stirs BCD ₁, BCD ₂The incoming timing time (this device of timing value is 1～199 minute), this moment, display promptly showed the timing that you set.As only importing 1 preset time, then press AN again ₂Once, preset end.Display is directly into the time showing state simultaneously.In the time will starting regularly, then press regularly AN of startup ₂, promptly enter inverse and advance state surely this moment, and display shows simultaneously countdowns, and presets the timing that still memory sets.When regularly arriving last 3 seconds, the bright prompt time of yellow indicator lamp is few, and reporting to the police simultaneously also can music tip (this partial circuit schematic diagram slightly).When timing then, red led bright (electrical schematic diagram slightly), this moment, relay J got electricly, made normally closed contact J ₁(J ₂) disconnect, cut off one group of controlled source.Automatically reply clock status then.Repeat this timing as needs, then need to press again one-shot initialize switch AN ₂Get final product.

When realize a plurality of different times preset and regularly the time, behind above-mentioned first time time preset, not by presetting end (AN ₂), add 1(or subtract 1 and will preset sequence number), be about to BCD ₃Add 1(or subtract 1), and then stir K ₂With binary-coded decimal dial BCD ₁, BCD ₂Set second and preset timing and get final product, revise sequence number then successively, deposit setting-up time in and get final product, preset end, again by pre-end switch AN until all ₂, deposit EPROM(IC in by the CPU indication when then all are set ₄) in.Set a plurality of identical times as need, then need revise sequence number and get final product.Revise time under a certain sequence number as need, can revise as long as be allocated to this sequence number.If need to revise preset time after presetting end, then as long as with timing/clock switch K ₁Be allocated to clock, dial back more regularly, repeat said process and get final product.When the beginning multicircuit time, start regularly AN as long as press ₂, then this machine begins to carry out regularly by sequence number.Regularly finish the back and revise sequence number (add 1 or subtract 1) and change next timing automatically over to when one, can realize the different timing successively of a plurality of different controlled sources like this.

The utility model has the advantages that both to can be used as clock instruction time, can be used as again various timing controlled to different (or identical) multichannel controlled source of time requirement. The timing controlled that is suitable for various Industry Control and meeting timing controlled and various competitions. And its output display signal can directly drive large screen display after amplifying, and can obtain satisfied display effect.

Claims (1)

1, a kind of electric time-keeping, timing controller are by central processing unit IC ₁(CPU), six inverter buffers/driver IC ₆, ternary identical eight D-latch IC ₂, eight homophases three-state buffer/line drive IC ₃, EPROMIC ₄, binary-coded decimal dial BCD ₁, BCD ₂, BCD ₃, eight bit serial input/parallel Output Shift Register IC ₅, hex buffer/driver IC ₇, nixie display LED ₁, large screen display LED ₂Deng composition, it is characterized in that:

A) BCD in the binary-coded decimal dial ₃Output insert central processing unit IC ₁P _1.1～P _1.3, BCD ₁, BCD ₂Input import eight homophases three-state buffer/line drive IC respectively ₃Input end;

B) central processing unit IC ₁One group of data bus Po insert eight homophases three-state buffer/line drive IC ₃Output and eight D-latch IC ₂Input end and EPRORIC ₄Data bus D ₀～D ₇And its RD termination is gone into IC ₃1C and 2C end, PSEN inserts IC ₄OE end, ALE inserts IC ₂G end, its output line D ₂Insert IC ₄A ₆～A ₁₀P _3.0Insert eight bit serial input/parallel Output Shift Register IC ₅A, B the end, P _3.1Insert IC ₅Clock, P _3.3One the road inserts resistance R ₁After receive power supply, the one tunnel through K switch ₁Insert hex buffer/driver IC ₇Input end, P _3.3, P _3.4, P _3.5, P _3.6One tunnel difference series resistor R ₂, R ₃, R ₄Power supply is inserted in the back, and one the tunnel inserts switch AN respectively ₁, AN ₂, K ₁After go into ground;

C) eight draw serial input/parallel Output Shift Register IC ₅Output insert six and phase buffer/driver IC ₆After be connected to display led ₁Low level and insert power amplifier after directly be connected to large screen display LED ₂

D) output one tunnel of hex buffer/driver is connected to display led ₁A high position, the one tunnel directly is connected to large screen display LED behind power amplifier ₂Its in addition two road signals behind power amplifier, go into ground behind the one tunnel direct relay coil J, one tunnel access silence switch K ₃With go into ground behind the loudspeaker.

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