CN216819821U

CN216819821U - High-speed low-power-consumption capacitive touch detection circuit and chip

Info

Publication number: CN216819821U
Application number: CN202220204647.6U
Authority: CN
Inventors: 肖永贵; 王述前; 曾德智
Original assignee: Shenzhen Keen Microelectronics Co ltd
Current assignee: Shenzhen Keen Microelectronics Co ltd
Priority date: 2022-01-25
Filing date: 2022-01-25
Publication date: 2022-06-24
Anticipated expiration: 2032-01-25

Abstract

The utility model discloses a high-speed low-power-consumption capacitive touch detection circuit and a chip, wherein the circuit comprises a touch module and a successive approximation module, the touch module comprises a charging power supply module and a comparison trigger module, the charging power supply module is respectively connected with an input side of the comparison trigger module and an external touch PAD, and an output side of the comparison trigger module is connected with the successive approximation module. The utility model adopts a successive approximation mode to carry out capacitance touch detection, improves the detection speed and the detection precision, reduces the detection power consumption, simultaneously realizes quick multi-channel and multi-time detection, can carry out touch intensity detection by configuring different touch thresholds, and also has the touch sliding detection function.

Description

High-speed low-power-consumption capacitive touch detection circuit and chip

Technical Field

The utility model belongs to the technical field of integrated circuits, and particularly relates to a high-speed low-power-consumption capacitive touch detection circuit and a chip.

Background

The key is the simplest, direct and quick method for man-machine interaction. At present, mechanical keys are conventionally used, but the mechanical keys have the problems of short service life and low speed, and with the development of electronic technology, technicians are always looking for substitutes of the mechanical keys.

Because the touch key has the advantages of being concise and exquisite, the product looks more fashionable, and is easier to obtain the favor of current customers, so that more and more products adopt the touch key to replace a mechanical key. The capacitive touch has the advantages of sensitive response, low cost, strong interference resistance and the like, the technology is more and more mature, the application of the capacitive touch is very common, and the capacitive touch is widely applied to devices such as mobile phones, computer peripherals, household appliances and industrial control.

As shown in the capacitive touch PCB diagram of FIG. 1, a proper touch PAD area and a surrounding ground line are drawn when the PCB is laid according to the requirement of capacitance, and a parasitic capacitance C exists between the humidity touch PAD and the ground_p0When a human finger approaches or touches the touch PAD, an additional parasitic capacitance C to ground is added_f0Due to C_f0Has a small capacitance value of C_p0Is about C_f0100 times of the total weight of the powder. In order to accurately detect C_f0We need to add a detection circuit. The following two methods are commonly used for detection:

1. clock oscillation type detection: as shown in FIG. 2, the external capacitor Cp ' is charged by a current source I0 ', when the voltage reaches the inversion voltage Vt of the inverter (INV0), the inverter inverts, the signal is sent to the NMOS transistor after the time delay unit to discharge the charge on PAD, then the inverter inverts again when the voltage is lower than the inversion voltage Vt of the inverter (INV0), the signal turns off the NMOS transistor after the time delay unit, and the external capacitor Cp ' continues to be charged. In the cycle, the square wave signal CLK is generated, the clock counter counts CLK, the clock number of CLK is locked when the timer is full, and the clock value V1 when no external touch exists is obtained after multiple times of counting locking. When there is a finger approaching or touching the touch PAD, the external capacitance becomes (Cp '+ Cf'), and since the external capacitance becomes large, the CLK frequency becomes slow, which results in the clock value V2 in the same timer time. Considering the ambient environment variation factor and noise, we set a threshold Vth 1; when (V1-V2> Vth1), it is determined that there is a touch key.

2. Charge-carrying detection: as shown in fig. 3, the external capacitor Cp "is charged by PMOS (P0"), PAD0 "is charged to Vref1 voltage given appropriate charging time, P0" is closed, then transfer gate S0 "is opened, charge on Cp" is carried to Cv ", PAD 0" is equal to PAD1 "voltage given appropriate charging time, transfer gate S0" is closed, P0 "is opened to PAD0 is charged to Vref1 voltage again, and the process is repeated until Comparator (CMP) flips, when PAD 1" is greater than Vref2(Vref1> Vref2), and the carry counter result is locked, and carry number V3 is obtained after multiple locking; when a finger approaches or touches the touch PAD, the external capacitance becomes (Cp "+ Cf"), and the external capacitance becomes large, so that the conveying frequency becomes small, and a conveying frequency value V4 is obtained; a threshold Vth2 is also set; when (V3-V4> Vth2), it is determined that there is a touch key.

From the two capacitive touch detections mentioned above, due to C_p0Is about C_f0100 times of the above, considering the ambient environment variation factor and noise, the values of Vth1 and Vth2 are at least greater than 5, so in order to obtain a stable touch value, the clock oscillation type detection needs to oscillate at least 1000 clocks to obtain a reliable touch result, and the charge transport type detection also needs to reach 1000 or more transport times. This makes the single detection cycle longer, which leads to several disadvantages: (1) the touch module is in a working state for a longer time, and the power consumption of the chip is higher in the same intermittent time; (2) the multi-channel detection is not facilitated, and if a plurality of touch detection modules are needed in more touch detection keys, the cost and the power consumption of the chip are increased; (3) because the difference value generated by touch is small, multi-level strength touch is difficult to realize, and the fine effect cannot be achieved in the conventional touch bar or sliding touch.

SUMMERY OF THE UTILITY MODEL

Aiming at the defects in the prior art, the utility model provides a high-speed low-power-consumption capacitive touch detection circuit and a chip, so as to improve the detection speed and the detection precision and reduce the detection power consumption.

In a first aspect, the high-speed low-power-consumption capacitive touch detection circuit comprises a touch module and a successive approximation module, wherein the touch module comprises a charging power supply module and a comparison trigger module, the charging power supply module is respectively connected with an input side of the comparison trigger module and an external touch PAD, and an output side of the comparison trigger module is connected with the successive approximation module.

Preferably, the charging power supply module includes first current source, second current source, third current source and fourth current source, first current source output has first electric capacity and first resistance in parallel, first resistance is established ties between first current source and second current source, second current source output has second electric capacity and second resistance in parallel, second resistance is established ties between second current source and third current source, third current source output is connected with the third electric capacity, fourth current source output is connected with the fourth electric capacity, first electric capacity negative pole, second electric capacity negative pole, third electric capacity negative pole and fourth electric capacity negative pole are all grounded.

Preferably, the charging power supply module further includes a first NOMS tube, a second NOMS tube and a third NOMS tube, a drain of the first NOMS tube is connected to the output end of the first current source, a gate of the first NOMS tube is connected to a gate of the second NOMS tube and a gate of the third NOMS tube, a drain of the second NOMS tube is connected to an output end of the third current source, a drain of the third NOMS tube is connected to an output end of the fourth current source, and a source of the first NOMS tube, a source of the second NOMS tube and a source of the third NOMS tube are all grounded.

Preferably, the first NOMS tube, the second NOMS tube and the third NOMS tube share the same RST reset signal.

Preferably, the comparison triggering module includes a first comparator, a second comparator and a DFF flip-flop, a non-inverting input terminal of the first comparator is connected to the third current source output terminal, an output terminal of the first comparator is connected to a D terminal of the DFF flip-flop, a non-inverting input terminal of the second comparator is connected to the fourth current source output terminal, an output terminal of the second comparator is connected to a CK terminal of the DFF flip-flop, and non-inverting input terminals of the first comparator and the second comparator are both connected to the reference voltage.

Preferably, the output current of the first current source is determined by the output result of the successive approximation module, and the output currents of the second current source, the third current source and the fourth current source are all set currents and have equal magnitudes.

Preferably, the first capacitor is a variable capacitor, the first resistor is a variable resistor, and the second capacitor, the third capacitor and the fourth capacitor are equal in size.

Preferably, the trigger module further comprises a timing generator, and the timing generator is connected with the successive approximation module.

In a second aspect, a high-speed low-power capacitive touch detection chip includes the high-speed low-power capacitive touch detection circuit of the first aspect.

The utility model has the beneficial effects that: the capacitance touch detection is carried out by adopting a successive approximation mode, so that the detection speed and the detection precision are improved, the detection power consumption is reduced, meanwhile, the rapid multi-channel and multi-time detection is realized, the touch intensity detection can be carried out by configuring different touch thresholds, and the touch sliding detection function is also realized.

Drawings

In order to more clearly illustrate the detailed description of the utility model or the technical solutions in the prior art, the drawings that are needed in the detailed description of the utility model or the prior art will be briefly described below. Throughout the drawings, like elements or portions are generally identified by like reference numerals. In the drawings, elements or portions are not necessarily drawn to scale.

FIG. 1 is a diagram of a capacitive touch PCB provided in the background of the utility model;

FIG. 2 is a schematic diagram of a clock oscillation type detection circuit according to the background art of the present invention;

FIG. 3 is a schematic diagram of a charge-carrying detection circuit according to the background of the utility model;

fig. 4 is a block diagram of a high-speed low-power capacitive touch detection circuit according to an embodiment of the present invention;

fig. 5 is a schematic circuit diagram of a high-speed low-power capacitive touch detection circuit according to an embodiment of the present invention;

fig. 6 is a timing diagram of a high-speed low-power capacitive touch detection circuit according to an embodiment of the present invention;

fig. 7 shows an output current value of the first current source I1 of the high-speed low-power capacitive touch sensing circuit according to the first embodiment of the present invention;

fig. 8 is a schematic diagram of a low power consumption detection period of a high-speed low power consumption capacitive touch detection circuit according to an embodiment of the present invention;

fig. 9 is a schematic diagram of a high-speed low-power capacitive touch detection circuit according to an embodiment of the present invention, in which two touch PADs are arranged in a crossed manner.

Detailed Description

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and therefore are only examples, and the protection scope of the present invention is not limited thereby.

It is to be noted that, unless otherwise specified, technical or scientific terms used herein shall have the ordinary meaning as understood by those skilled in the art to which the utility model pertains.

Example one

As shown in fig. 4, a high-speed low-power-consumption capacitive touch detection circuit includes a touch module and a successive approximation module, where the touch module includes a charging power module and a comparison trigger module, the charging power module is connected to an input side of the comparison trigger module and an external touch PAD, respectively, and an output side of the comparison trigger module is connected to the successive approximation module.

As shown in fig. 5, the charging power supply module includes a first current source I1, a second current source I2, a third current source I3 and a fourth current source I4, an output end of the first current source I1 is connected in parallel with a first capacitor C1 and a first resistor R1, the first resistor R1 is connected in series between the first current source I1 and the second current source I2, an output end of the second current source I2 is connected in parallel with a second capacitor C2 and a second resistor R2, the second resistor R2 is connected in series between the second current source I2 and the third current source I3, an output end of the third current source I3 is connected with a third capacitor C3, an output end of the fourth current source I4 is connected with a fourth capacitor C4, and cathodes of the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 are all grounded.

The output end of the first current source I1 is further connected to the touch PAD external capacitors Cp 0-Cpn, the first current source I1 is mainly used for charging the external capacitors Cp 0-Cpn, the magnitude of the output current is determined by the result of successive approximation calculation performed by the detection circuit, and the output currents of the second current source I2, the third current source I3 and the fourth current source I4 are set currents and are equal. The first capacitor C1 is a variable capacitor, the first resistor R1 is a variable resistor, the first capacitor C1 and the first resistor R1 can be configured according to external environmental noise to filter different noise bands, and the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 are standard capacitors of the detection circuit and are equal to each other.

Furthermore, the charging power supply module further comprises a first NOMS tube N1, a second NOMS tube N2 and a third NOMS tube N3, a drain of the first NOMS tube N1 is connected with an output end of the first current source I1, a gate of the first NOMS tube N1 is connected with a gate of the second NOMS tube N2 and a gate of the third NOMS tube N3, a drain of the second NOMS tube N2 is connected with an output end of the third current source I3, a drain of the third NOMS tube N3 is connected with an output end of the fourth current source I4, and a source of the first NOMS tube N1, a source of the second NOMS tube N2 and a source of the third NOMS tube N3 are all grounded. The first NOMS tube N1, the second NOMS tube N2 and the third NOMS tube N3 share the same RST reset signal.

Further, the comparison trigger module comprises a first comparator CMP1, a second comparator CMP2 and a DFF flip-flop, wherein a non-inverting input terminal of the first comparator CMP1 is connected with an output terminal of the third current source I3, an output terminal of the first comparator CMP1 is connected with a D terminal of the DFF flip-flop, a non-inverting input terminal of the second comparator CMP2 is connected with an output terminal of the fourth current source I4, an output terminal of the second comparator CMP2 is connected with a CK terminal of the DFF flip-flop, and inverting input terminals of the first comparator CMP1 and the second comparator CMP2 are both connected with a reference voltage VREF. The trigger module also comprises a time sequence generator which is connected with the successive approximation module and used for generating a trigger signal.

Specifically, the capacitance touch detection circuit sequentially performs successive approximation calculation according to the first current source current control bit in the detection process, and the calculation times are determined by the current control bit width of the first current source, namely, from the highest bit of the first current source current control bit to the end of the last bit of the first current source current control bit. Firstly, a RST reset signal is set to be 1 through a successive approximation module, so that a first NOMS tube N1, a second NOMS tube N2 and a third NOMS tube N3 are all opened, the charging node potentials of a first current source I1, a third current source I3 and a fourth current source I4 are cleared, namely the potentials of three points A, B, C are cleared, all control bits of the first current source I1 are 0, and the output current of the first current source I1 is 0.

Then, the RST reset signal is set to 0 by the successive approximation module, the current control bit of the first current source I1 is configured to be 1, and the charging nodes of the current sources start to be charged, i.e., A, B, C three points are charged. When the RST reset signal is set to 0 for the first time, the output current of the first current source I1 is set to 1/2 full scale, and when the RST reset signal is set to 0 for the nth time, the output current value of the first current source I1 is determined by the previous successive approximation calculation result.

Since the fourth current source I4 and the fourth capacitor C4 are fixed values, the charging node a of the fourth current source I4 charges from 0 to the reference voltage VREF for a fixed time, and when the charging voltage at point a reaches the reference voltage VREF, the second comparator CMP2 flips to output 1, i.e., the Bit _ clk clock generates a rising edge, and inputs the rising edge to the DFF flip-flop clock terminal. In the charging process, when the charging speed of the third current source I3 for charging the node B is slower than that of the charging node a, the second comparator CMP2 preferably flips the output 1, at this time, the first comparator CMP1 outputs 0, and the DFF flip-flop locks the output result of the first comparator CMP1, that is, the data locked by the DFF flip-flop is 0 at this time; when the charging speed of the charging node B of the third current source I3 is faster than that of the charging node a, the first comparator CMP1 preferably flips the output 1, so when the second comparator CMP2 flips the output 1, the first comparator CMP1 also outputs 1, and the DFF flip-flop locks the output result of the first comparator CMP1, that is, the data locked by the DFF flip-flop is 1 at this time.

After the DFF flip-flop locks the output result of the first comparator CMP1, the successive approximation module configures the data locked by the DFF flip-flop to the current bit controlled by the first current source I1.

And then, repeating the steps from the next bit, namely the next highest bit, of the first current source control bit, and so on until the last bit of the first current source control bit, and finally obtaining the complete output current value of the first current source. In the detection process, when the successive approximation calculation is performed for the (n-1) th time (n is more than or equal to 2), the output current of the first current source I1 is I_n-1At this time, if the output of the first comparator CMP1 is 1, the output current of the first current source I1 during the nth successive approximation calculation is:

a full range; if the output of the first comparator CMP1 is 0, the output current of the first current source I1 is: is composed of

And (4) full range.

Taking the current control bit width of the first current source as bit 16 as an example, the RST reset timing and the current control bit are shown in FIG. 6, and the detection circuit controls the most significant bit D of the bit from the first current source I1_[15]At first, the RST reset signal is set to 1 by the successive approximation module to clear the potential at the point A, B, C, and the output of the first current source I1 is 0. The RST reset signal is set to 0 by the successive approximation module, and the highest bit D of the control bits of the first current source I1 is controlled_[15]Set to 1 so that the output current of the first current source I1 is

At full range, A, B, C three points are charged, the DFF trigger locks the output result of the first comparator CMP1 according to the charging speed, and the successive approximation module configures the output result to the highest bit D of the first current source control bit_[15]. Then the RST reset signal is set to 1 again, the potential of the A, B, C three points is cleared again, and after a period of time, the successive approximation module is used for clearing the potential of the A, B, C three points againThe RST reset signal is set to 0, and the first current source I1 is controlled by the current to the next highest position D_[14]Setting 1, if the result of the DFF flip-flop locking at the time of the first successive approximation calculation is 1, the output current of the first current source I1 at this time is:

full range

At full scale, i.e.

A full range; if the result of the DFF flip-flop latch is 0 in the first successive approximation calculation, the output current level of the first current source I1 at this time is:

at full scale, i.e.

Full scale, as shown in fig. 7. The A, B, C three points are charged again, the DFF trigger locks the output result of the first comparator CMP1 according to the charging speed, and the successive approximation module configures the output result to the next higher bit D of the first current source control bit_[14]。

By analogy, the first current source I1 successively latches the current control bit to 1, and latches the DFF result accordingly until the last bit of the current control bit of the first current source I1, such as the current control bit D from the first current source I1_[15]～D_[0]And setting 1 successively to finally obtain the complete output current value of the first current source I1.

After the output current value of the first current source is obtained, the external capacitance value can be obtained through conversion, and the calculation formula is as follows:

i₁/i₄＝(C_p+C₁)/C₄

in the formula i₁For the current output value of the first current source, i₄Is the current output value of the fourth current source, C_pIs an external capacitance value, C₁Is a first capacitance value, C₄Is a fourth capacitance value.

In the detection process, the external capacitance value is different when the touch of the human hand and the touch of the human hand are not performed. Through multiple detections, the reference value of the external capacitance is D when no human hand touches the capacitor_vSetting a touch threshold D_thWhen the detected value of the external capacitance becomes D_fIf the external capacitance difference (D) between the external capacitance detection value and the external capacitance reference value_f-D_v) Touch threshold D_thThis indicates that a hand touch is detected.

The utility model adopts a successive approximation method, and the detection circuit can quickly detect the external capacitance value, for example, when the bit width of the current control bit of the first current source I1 is 16, the detection circuit provided by the utility model can complete one-time detection only by 16 times of charging and discharging. Assuming that the current of the fourth current source I4 is 2uA, the capacitance of the fourth capacitor C4 is 1pF, and the reference voltage VREF is 2V, according to the capacitance charging formula: the charging time can be obtained by (I × t)/C:

t＝(U*C)/I＝(2V*1pF)/2uA＝1uS

that is, the first charging time is 1uS, and the RST high level time is set to 0.25uS, the time required for completing the first touch detection is:

16*(1+0.25)＝20uS

all single touch detection can be completed only by 20us, and the detection speed is high and the time consumption is short. In the single touch detection, only 20us is needed, the human body reaction time is assumed to be about 0.1s, the detection circuit is set to perform touch detection once every 20ms, and if an external touch channel has 16 touch channels, the time required for detecting all the 16 touch channels is as follows:

16*20＝320us

in which the detection time only occupies the interval period

And the human body was touched 5 times (0.1s/20ms) to confirm whether or not there was a human hand. Therefore, the method has the advantages of high detection speed and short time when multi-channel detection is carried out.

Further, the high-speed low-power-consumption capacitive touch detection circuit adopts intermittent detection, a detection period can be set, as shown in fig. 8, the whole detection period is divided into working time and sleep time, when no operation is detected within a certain time, the circuit enters a sleep state, and the working time of the next period is detected until the completion of one period, so that the function of low-power-consumption detection is realized. For example, assuming that the operating current of the on-time detection circuit is 1mA, the standby power consumption of the sleep-time detection circuit is 2uA, and if the cycle time is 20ms and the single detection time is 20us as described above, the average current is:

Iavg＝[1mA*20uS+(20ms-20us)*2uA]/20ms≈3uA

the on time is increased by 20uS for every additional touch channel, and the detection circuit is only increased by (1mA by 20uS)/20ms, i.e. 1uA of average current. In the practical application process, the sleep time and the working time can be adjusted according to the application requirements so as to achieve the most appropriate standby power consumption and realize low-power consumption processing.

Further, the detection circuit can set a plurality of touch thresholds D with different levels_th0，D_th1，D_th2...D_thnDetecting the value D of the external capacitance_fAnd an external capacitance reference value D_vDifference in external capacitance (D) between_f-D_v) Comparing with multiple touch thresholds when the external capacitance is different (D)_f-D_v) When the touch intensity falls within a certain touch threshold range, the touch intensity of the touch can be judged to be the level corresponding to the touch threshold range.

Furthermore, when a plurality of touch PADs are arranged in a crossed mode, the relative positions of the touch PADs can be distinguished according to the proportion of the external capacitance change values of the touch PADs. For example, as shown in FIG. 9, two touch PADs are arranged in a cross manner, and when no finger touches the touch PAD, the detection circuit detects the corresponding external capacitance reference value D_v0And D_v1When the detected value of the external capacitance becomes D_f0And D_f1First, according to the difference (D) of external capacitances_f-D_v) And touch threshold D_thDetecting whether touch occurs, and then according to (D)_f0-D_v0) And (D)_f1-D_v1) Ratio of (A to (B)The example size distinguishes the relative positions of two touch PADs, thereby realizing the touch slide function.

Example two

A high-speed low-power-consumption capacitive touch detection chip comprises the high-speed low-power-consumption capacitive touch detection circuit.

For a brief description, the chip provided by the embodiment of the present invention may refer to the corresponding content in the foregoing embodiments.

The utility model adopts a successive approximation mode to carry out capacitance touch detection, improves the detection speed and the detection precision, reduces the detection power consumption, simultaneously realizes quick multi-channel and multi-time detection, can carry out touch intensity detection by configuring different touch thresholds, and also has the touch sliding detection function.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the utility model has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention, and they should be construed as being included in the following claims and description.

Claims

1. The high-speed low-power-consumption capacitive touch detection circuit is characterized by comprising a touch module and a successive approximation module, wherein the touch module comprises a charging power supply module and a comparison trigger module, the charging power supply module is respectively connected with the input side of the comparison trigger module and an external touch PAD, and the output side of the comparison trigger module is connected with the successive approximation module.

2. The high-speed low-power-consumption capacitive touch detection circuit according to claim 1, wherein the charging power module comprises a first current source, a second current source, a third current source and a fourth current source, the first current source output end is connected in parallel with a first capacitor and a first resistor, the first resistor is connected in series between the first current source and the second current source, the second current source output end is connected in parallel with a second capacitor and a second resistor, the second resistor is connected in series between the second current source and the third current source, the third current source output end is connected with a third capacitor, the fourth current source output end is connected with a fourth capacitor, and the first capacitor negative electrode, the second capacitor negative electrode, the third capacitor negative electrode and the fourth capacitor negative electrode are all grounded.

3. The high-speed low-power-consumption capacitive touch detection circuit according to claim 2, wherein the charging power supply module further comprises a first NOMS transistor, a second NOMS transistor and a third NOMS transistor, a drain of the first NOMS transistor is connected to the output end of the first current source, a gate of the first NOMS transistor is connected to a gate of the second NOMS transistor and a gate of the third NOMS transistor, a drain of the second NOMS transistor is connected to the output end of the third current source, a drain of the third NOMS transistor is connected to the output end of the fourth current source, and a source of the first NOMS transistor, a source of the second NOMS transistor and a source of the third NOMS transistor are all grounded.

4. The high speed low power capacitive touch sensing circuit of claim 3, wherein the first NOMS transistor, the second NOMS transistor, and the third NOMS transistor share a same RST reset signal.

5. The high-speed low-power-consumption capacitive touch detection circuit according to claim 2, wherein the comparison trigger module comprises a first comparator, a second comparator and a DFF flip-flop, a non-inverting input terminal of the first comparator is connected to the third current source output terminal, an output terminal of the first comparator is connected to a D terminal of the DFF flip-flop, a non-inverting input terminal of the second comparator is connected to the fourth current source output terminal, an output terminal of the second comparator is connected to a CK terminal of the DFF flip-flop, and inverting input terminals of the first comparator and the second comparator are both connected to a reference voltage.

6. The high-speed low-power capacitive touch sensing circuit according to claim 2, wherein the output current of the first current source is determined by the output result of the successive approximation module, and the output currents of the second current source, the third current source and the fourth current source are all set currents and have equal magnitudes.

7. A high speed low power capacitive touch sensing circuit as recited in claim 2, wherein said first capacitor is a variable capacitor, said first resistor is a variable resistor, and said second capacitor, said third capacitor and said fourth capacitor are equal in size.

8. A high speed low power consumption capacitive touch sensing circuit according to claim 2, wherein the trigger module further comprises a timing generator, the timing generator being connected to the successive approximation module.

9. A high-speed low-power-consumption capacitive touch detection chip, characterized by comprising the high-speed low-power-consumption capacitive touch detection circuit as claimed in any one of claims 1 to 8.