CN208723872U - A kind of capacitance touch button circuit - Google Patents

Abstract

The utility model discloses a kind of capacitance touch button circuits, it is characterized in that, the circuit includes mode switching circuit, the mode switching circuit is used to control the switching of synchronous charging/discharging mode and asynchronous charge and discharge mode, the mode switching circuit includes the first NAND gate and the second NAND gate, input of the output of mode control signal DMS and latch (Latch) as the second NAND gate, the input of the output Fc of frequency divider (VC2) and the output of the second NAND gate as the first NAND gate, MOD signal is exported by the first NAND gate, pass through MOD Signal-controlled switch (SW₃) on-off.The utility model does not reduce sensitivity because of the change of external environment, while not needing external big debugging capacitor.In addition, can preferably adapt to different environment using synchronous mode and asynchronous mode.

Description

A kind of capacitance touch button circuit

Technical field

The utility model relates to touch screen fields, and in particular to a kind of capacitance touch button circuit.

Background technique

Mainly there is the touch screen of several types at present, they are respectively: resistance-type (bilayer), surface capacitance type and induced electricity Appearance formula, surface acoustic wave type, infrared type, and bending waves, active digital converter formula and optical imaging type.They can divide again For two classes, one kind needs to be oxidized indium tin (ITO), such as first three touch screen, does not need ITO in another kind of structure, such as after Several screens.

Currently on the market, it is most widely used using the capacitive touch screen of ITO material.

Capacitance touch sensing about just had already appeared before more than 50 years, and Touching controlling lamp is that a classics of capacitive touch switch show Example, Touching controlling lamp go out to there is now a very long time, and new technology allows to realize touch button increasingly complex control, single Piece machine provides the ability for completing capacitance touch sensing, decision, response and other systems inter-related task, has in the industry at present Several capacitance touch sensing technologies exist, and most technologies are to generate extra capacitor since finger touches based on measurement and change Frequency or duty ratio, touch key-press have been widely adopted, more and more electronic products.

Capacitance touch scheme mainly has: (capacitor sense is shaken in tension and relaxation to CSR-CapSense Relaxation Oscillator Answer), CSA-CapSense Successive Approximation (Approach by inchmeal capacitive sensing), CSD-CapSense Sigma Delta (integral differential capacitive sensing), CDC-Capator Digital Conversion (conversion of capacitor number).

Wherein the raising of the precision of CSD technology only needs the simple time for increasing and counting, when being counted by lengthening Between, CSD can accomplish very high-precision.Precision setting compared to other several scheme CSD haves no need to change hardware circuit It realizes, this can above bring convenience in some applications.For example it can detect the presence of in the early stage when finger touches with lower essence Degree, late detection specifically touch when capacitor changes size with higher precision.The promotion of CSD technology anti-interference ability has more Add flexile processing method, pseudo random clock (PRS) can be added in switching capacity part, improve the anti-intermediate frequency of system Noise immune.It can also be by the way that different gate times be arranged, different noise resisting abilities is arranged.

Summary of the invention

The purpose of the utility model is to overcome defects existing in the prior art, provide a kind of capacitance touch button electricity Road, the circuit use synchronous mode and asynchronous mode both of which.Capacitor charge and discharge clock and detection clock individually control, and use Self-adaptive current source, improves the adaptive ability of capacitance touch, and does not need external modulating capacitor C_MOD。

The utility model uses a kind of following technical scheme: capacitance touch button circuit, which is characterized in that the circuit packet Mode switching circuit is included, the mode switching circuit is used to control the switching of synchronous charging/discharging mode and asynchronous charge and discharge mode, The mode switching circuit includes the first NAND gate and the second NAND gate, the output of mode control signal DMS and latch Latch As the input of the second NAND gate, the output Fc of frequency divider VC2 and the input of the second NAND gate exported as the first NAND gate, MOD signal is exported by the first NAND gate, passes through MOD Signal-controlled switch SW₃On-off；The circuit further includes switch SW₁Connection Power supply V_DWith capacitor C_xWith switch SW₂One end, switch SW₂Connect comparator CMP positive input terminal and capacitor C_x, pseudo random clock PRS control controls the switch SW₁With the switch SW₂, inner modulation capacitor C_{MOD_IN}, self-adaptive current source I_DACAnode, resistance R_BUpper end and switch SW₄Connect comparator CMP positive input terminal, resistance R_CConnect the power supply V_DWith switch SW₄Other end, open Close SW₃Connect resistance R_BAnd ground, and controlled by signal MOD, comparator CMP negative input end connects reference voltage V_REF, compare The clock of device CMP output termination latch Latch, the latch Latch are sampling clock Fs, and the Fs is oscillator Oscillator is obtained by frequency divider VC1, while the output of frequency divider VC1 also as the clock of counter Counter and divides The input of frequency device VC2, the output of the frequency divider VC2 connect frequency divider VC3 input, and the output of the frequency divider VC3 connects PWM module As the input with door AND, the output with door AND is made for input, the PWM module output and the output of latch Latch For the enable signal of counter Counter, the counter Counter's exports result to data processor.

Preferably, charge and discharge electric frequency is controlled by Fc and loop comparator results in synchronous mode, and charge and discharge electric frequency is different It is controlled completely by Fc under step mode.

Preferably, wherein the effect of the resistance Rc is accelerating circuit response.

Preferably, charge and discharge clock Fc and detection clock Fs are individually controlled, and Fs has to be larger than 2 times of Fc.

Preferably, V is adjusted by the ratio of R1 and R2_REFSize, wherein

Preferably, V (L) and V (H) are acquired according to calculating:

Wherein, V (L) is Charge-discharge wave shape low spot voltage；V (H) is Charge-discharge wave shape high point voltage, V_DFor supply voltage, R_CXFor equivalent circuit.

Preferably, internal small modulating capacitor uses MIM capacitor or mos capacitance.

Preferably, the size of constant-current source I, I=(I [3:0]) * I can be adjusted by I [3:0]₀, I₀For unit benchmark electricity Stream, the value range of I [3:0] is 0~15, while the size of discharge resistance, R=(R [3:0]) * R are adjusted by R [2:0]₀, R₀Value range for unit resistance, R [3:0] is 0~7.

Advantages and beneficial effects of the utility model lie in that new capacitance touch scheme proposed in this paper can be by adaptive Current source monitors the change of environment, makes C_{MOD_IN}The charge and discharge of capacitor are always a suitable position, so that adjust automatically counts Base value, the change for reducing external environment make sensitivity decrease.Meanwhile this adaptive mode makes modulating capacitor C_{MOD_IN}Not It needs very greatly, internal small modulating capacitor C can be used_{MOD_IN}It can be realized, so that outside does not need again external big modulating capacitor C_MOD.Using both of which, synchronous mode and asynchronous mode, synchronous mode charge and discharge clock are not influenced by output result, work as outside When environment is more stable, synchronous mode can be used；Asynchronous mode charge and discharge clock is related with output result, when external environment is more severe When, count value can change with the change of environment, increase anti-interference ability.It can be better using synchronous mode and asynchronous mode Adapt to different environment.

Detailed description of the invention

Fig. 1 is CSD circuit diagram in the prior art；

Fig. 2 is CSD equivalent circuit schematic in the prior art；

Fig. 3 is CSA circuit diagram in the prior art；

Fig. 4 is CSA equivalent circuit schematic in the prior art；

Fig. 5 touches for no finger and has the voltage change figure under finger touch；

Fig. 6 is the capacitive touch circuit figure of the utility model；

Fig. 7 is the capacitance touch equivalent circuit diagram of the utility model；

Fig. 8 is the adaptive constant-flow source matching process figure of the utility model；

Fig. 9 is the timing diagram under the synchronous charging/discharging mode of the utility model；

Figure 10 is the timing diagram under the asynchronous charge and discharge mode of the utility model；

Figure 11 is the adaptive constant-flow source and discharge resistance Principles of Regulation figure of the utility model；

Figure 12 is the V of the utility model_REFGeneration circuit schematic diagram.

Specific embodiment

With reference to the accompanying drawings and examples, specific embodiment of the present utility model is further described.Implement below Example is only used for clearly illustrating the technical solution of the utility model, and cannot be used as a limitation the protection model of limitation the utility model It encloses.

In the prior art, CSD circuit diagram is as shown in Fig. 1, wherein C_XFor inductance capacitance, C_MODFor external modulation electricity Hold, R_BFor discharge resistance.By SW₁, SW₂And C_XIt is equivalent to resistance R_CX, thenThe equivalent circuit of CSD such as 2 institute of attached drawing Show.The specific working principle is as follows for it: firstly, SW3 is disconnected, V_DDPass through R_CXTo C_MODCharging, charging reach reference voltage V_REF；So Afterwards, comparator exports high level, trigger switch SW₃, R_BIt is connected to ground, gives C_MODElectric discharge；Work as C_MODVoltage is lower than reference voltage V_REF When, switch disconnects, R_BIt is disconnected with ground, V_DDStart again to C_MODCharging, so circulation are repeatedly.

C_XIncrease then R_CXReduce, then there is bigger electric current to C_MODCharging, electric current is bigger, C_MOD charging is faster.When charging Between it is short, discharge time is constant, then duty ratio increase.High duty ratio can open counter for more time, when counter is opened Between it is longer, counter count it is more.

In the prior art, CSA circuit diagram is as shown in Fig. 3, CSA equivalent circuit diagram working principle as shown in Fig. 4 It is as follows: wherein C_MODFor external modulation capacitor.

One, calibration phase

1, Φ 1 and the two clocks of Φ 2 are alternately opened, such inductance capacitance acts like a resistance, C_MODCapacitor On voltage will stablize in a fixed value V_Start=I/fC, equivalent circuit are as shown in Fig. 4.

2, switch Φ 1 is disconnected a set time, C_MODOn voltage will linear rise, C_MODOn voltage and V_REF It is compared, works as C_MODUpper voltage is less than V_REFWhen, counter starts counting；Work as C_MODUpper voltage is greater than V_REFWhen, stop counting.

3, when the output of counter is 0, illustrate V_startVoltage is higher than V_REF, I_DACElectric current is excessive；If counter is defeated Value is much larger than 0 out, then illustrating V_startBrownout, I_DACElectric current is too small.It will be arranged in next step according to successive approximation algorithm I_DACElectric current, target are I_DACIt is arranged in a value appropriate, so that V_startVoltage is slightly below V_REF, the output of counter is bigger In 0.At this moment I_DACSetting completed, and calibration is completed.As shown in Figure 5.

Two, detection-phase

When there is finger touch, C_XCapacitor becomes larger, V_Start=I/fC voltage is lower, and the count value of counter can become larger, that The generation touched can be determined accordingly.

New capacitive touch circuit proposed in this paper is as shown in Fig. 6, wherein C_{MOD_IN}For internal small modulating capacitor, this is small It debugs capacitor and uses MIM capacitor or mos capacitance, circuit includes: that Oscillator is that oscillator generates clock module, 16-bit PRS generates pseudo random clock, and VC1, VC2, VC3 and PWM are frequency division module and PWM generation module, and Counter is counter mould Block, Data Processing are final output data result.C_XFor inductance capacitance, R_BFor discharge resistance, I_DACFor constant-current source.

Specific connection type includes: switch SW₁Connect power supply V_DWith Cx and SW₂One end, switch SW₂Connect comparator just Input terminal and Cx, switch SW₁And SW₂It is controlled by pseudo random clock 16-bit PRS, inner modulation capacitor C_{MOD_IN}、I_DACAnode, R_B Upper end and switch SW₄Connect comparator positive input terminal, resistance R_CConnect V_DAnd SW₄Other end, switch SW₃Connect R_BAnd ground, And it is controlled by signal MOD, MOD Signal-controlled switch SW₃On-off, comparator negative input end connect reference voltage V_REF, than Latch Latch is met compared with device output, the clock of Latch is sampling clock Fs, and Fs is that oscillator Oscillator passes through frequency divider VC1 and obtain, while the output also input as the clock of counter Counter and frequency divider VC2 of VC1, the output Fc of VC2 Output with the second NAND gate (NAND-2) exports MOD, the output of Latch and scheme control by the first NAND gate (NAND-1) Input of the signal DMS as the second NAND gate, the output of frequency divider VC2 connect frequency divider VC3 input, and the output of VC3 connects PWM simulation Input, PWM module output and the output of Latch are as the input with door (AND), and the output with door is as counter Counter Enable signal, the result that exports of counter gives data processor Data Processing.

Two kinds of charge and discharge modes: synchronous mode (DMS=1) and asynchronous mode (DMS=0).Charge and discharge electric frequency not exclusively by Loop control, is controlled by Fc and loop comparator results in synchronous mode, is controlled completely by Fc in asynchronous mode.Find one A constant-current source (I_DAC) current value so that count value is a suitable value, such as 2^NHalf, N be count value bit wide.

Equivalent circuit is as shown in Fig. 7, and the effect of Rc is accelerating circuit response, only in C_{MOD_IN}Capacitor charge and discharge originates rank Section works, later SW₄Just it disconnects.The mode of Approach by inchmeal can find a suitable constant current source current value and make count value For a suitable value.It is as shown in Fig. 8 to find principle, gradually finds suitable current value.

As shown in Figures 9 and 10, it is assumed that Charge-discharge wave shape low spot voltage is V (L), and high point voltage is V (H), solves charging The total regression of circuit and discharge circuit is respectively as follows:

SW₃Switch disconnects, to C_MODCapacitor charging:

SW₃Switch is opened, to C_MODCapacitor electric discharge:

Substitute into V (L) and V (H):

It solves:

When there is finger touch, C_XIncrease then R_CXReduce, V (L) and V (H) become larger, thus the output result duty of Latch Than increasing, high duty ratio can open counter for more time, and the counter opening time is longer, and counter counts more.

Fig. 9 and Figure 10 is the timing diagram under asynchronous charge and discharge mode and the timing diagram under synchronous charging/discharging mode respectively.It fills Discharge portion circuit is specifically as shown in Fig. 11, the size of constant-current source can be adjusted by I [3:0], and adjust by R [2:0] The size of discharge resistance is saved, regulative mode is adjusted using binary system OPTION.Specifically: I=(I [3:0]) * I₀, I₀For unit Reference current, wherein the value range of I [3:0] is 0~15, with any one value being represented in binary as in 0000~1111, Such as when I [3:0] is with being represented in binary as 1000, the corresponding decimal system is 8, then I=(I [3:0]) * I₀=8*I₀；By R [2: 0] size of discharge resistance, R=(R [3:0]) * R are adjusted₀, R₀For unit resistance, wherein the value range of R [2:0] is 0~7, Correspondence is represented in binary as 000~111.

V_REFGeneration circuit is as shown in Fig. 12, passes through R₁And R₂Ratio adjust V_REFSize, occurrence are as follows:

The utility model proposes a kind of new touch detection circuits, using synchronous mode and asynchronous mode both of which. Capacitor charge and discharge clock and detection clock individually control, and using self-adaptive current source, improve the adaptive ability of capacitance touch, and And external modulating capacitor C is not needed_MOD。

The above is only the preferred embodiment of the present invention, is not intended to limit the utility model, all practical at this Within novel spirit and principle, any modification, equivalent replacement, improvement and so on should be included in the guarantor of the utility model Within the scope of shield.

Claims (8)

1. a kind of capacitance touch button circuit, which is characterized in that the circuit includes mode switching circuit, the pattern switching electricity Road is used to control the switching of synchronous charging/discharging mode and asynchronous charge and discharge mode, and the mode switching circuit includes the first NAND gate With the second NAND gate, input of the output of mode control signal DMS and latch (Latch) as the second NAND gate, frequency divider (VC2) input of the output of output Fc and the second NAND gate as the first NAND gate, exports MOD signal by the first NAND gate, Pass through MOD Signal-controlled switch (SW₃) on-off；The circuit further includes switch (SW₁) connection power supply (V_D) and capacitor (C_x) with Switch (SW₂) one end, switch (SW₂) connect comparator (CMP) positive input terminal and capacitor (C_x), pseudo random clock PRS control control Make the switch (SW₁) and the switch (SW₂), inner modulation capacitor (C_{MOD_IN}), self-adaptive current source (I_DAC) anode, resistance (R_B) upper end and switch (SW₄) connection comparator (CMP) positive input terminal, resistance (R_C) the connection power supply (V_D) and switch (SW₄) Other end, switch (SW₃) connection resistance (R_B) and ground, and controlled by signal MOD, comparator (CMP) negative input end connects Meet reference voltage (V_REF), comparator (CMP) output termination latch (Latch), the clock of the latch (Latch) is to adopt Sample clock Fs, the Fs obtain for oscillator (Oscillator) by frequency divider (VC1), while the output of frequency divider (VC1) Also the output of the input as the clock of counter (Counter) and frequency divider (VC2), the frequency divider (VC2) connects frequency divider (VC3) it inputs, the output of the frequency divider (VC3) connects PWM module input, and the PWM module exports and latch (Latch) As the input with door (AND), enable signal of the output with door (AND) as counter (Counter) is described for output Counter (Counter) exports result to data processor.

2. circuit according to claim 1, which is characterized in that charge and discharge electric frequency is compared by Fc and loop in synchronous mode The control of device result, charge and discharge electric frequency are controlled by Fc completely in asynchronous mode.

3. circuit according to claim 1, which is characterized in that wherein, the effect of the resistance (Rc) is that accelerating circuit is rung It answers.

4. circuit according to claim 1 or 3, which is characterized in that wherein charge and discharge clock Fc and detection clock Fs are independent Control, Fs have to be larger than 2 times of Fc.

5. circuit according to claim 1 or 3, which is characterized in that adjust V by the ratio of R1 and R2_REFSize, Wherein

6. circuit according to claim 1 or 3, which is characterized in that acquire V (L) and V (H) according to calculating:

Wherein, V (L) is Charge-discharge wave shape low spot voltage；V (H) is Charge-discharge wave shape high point voltage, V_DFor supply voltage, R_CXFor Equivalent circuit.

7. circuit according to claim 1, which is characterized in that internal small modulating capacitor is using MIM capacitor or MOS electricity Hold.

8. circuit according to claim 1, which is characterized in that the size of constant-current source I, I=can be adjusted by I [3:0] (I[3:0])*I₀, I₀Value range for unit reference current, I [3:0] is 0~15, while electric discharge is adjusted by R [2:0] The size of resistance, R=(R [3:0]) * R₀, R₀Value range for unit resistance, R [3:0] is 0~7.