CN216773232U - Multilayer heat dissipation formula memory chip - Google Patents
Multilayer heat dissipation formula memory chip Download PDFInfo
- Publication number
- CN216773232U CN216773232U CN202220291999.XU CN202220291999U CN216773232U CN 216773232 U CN216773232 U CN 216773232U CN 202220291999 U CN202220291999 U CN 202220291999U CN 216773232 U CN216773232 U CN 216773232U
- Authority
- CN
- China
- Prior art keywords
- chip
- circuit board
- chips
- storage
- heat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The utility model relates to the technical field of storage chips, in particular to a multilayer heat dissipation type storage chip, which comprises a circuit board, wherein one side of the circuit board is provided with a control chip, the other side of the circuit board is provided with storage chips, a plurality of storage chips are arranged in a staggered and superposed manner, gaps exist among the storage chips which are arranged side by side, one side of each storage chip, which is far away from the circuit board, is provided with a pin fixing plate, and the storage chips, the control chip and the pin fixing plate are all electrically connected with the circuit board; according to the utility model, the storage chips and the control chips are respectively arranged on two sides of the circuit board, the control chips are simultaneously arranged in a staggered and overlapped manner, and gaps exist among the storage chips arranged side by side, so that heat generated by the storage chips can be timely dispersed, and the influence of heat accumulation on the performance and service life of the chips is avoided.
Description
Technical Field
The utility model relates to the technical field of storage chips, in particular to a multilayer heat dissipation type storage chip.
Background
The storage chip is an essential part of electronic products and electronic equipment, and has higher and higher requirements for transmission performance and occupied volume of the storage chip.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a multilayer heat dissipation type memory chip, which solves the following technical problems:
how to ensure the integration level of the storage chip and improve the heat dissipation performance of the chip.
The purpose of the utility model can be realized by the following technical scheme:
the utility model provides a multilayer heat dissipation formula memory chip, includes the circuit board, one side of circuit board is provided with control chip, the opposite side of circuit board is provided with storage chip, a plurality of storage chip crisscross stack is arranged, and arranges side by side there is the clearance between the storage chip, one side that the circuit board was kept away from to the storage chip is provided with the pin fixed plate, storage chip, control chip and pin fixed plate all with circuit board electric connection.
Preferably, a micro heat pipe is disposed around the storage chip.
Preferably, the storage chips are fixed by heat dissipation glue.
Preferably, the number of the storage chips is four, two of the storage chips are arranged in parallel in one layer, and two layers of the storage chips are vertically arranged.
Preferably, a cover body is arranged on one side, away from the circuit board, of the control chip, and the cover body seals and encapsulates the control chip.
Preferably, a heat conducting sheet is connected between the cover body and the control chip.
Preferably, the outer side of the cover body is provided with a heat dissipation fin.
The utility model has the beneficial effects that:
1. according to the utility model, the storage chips and the control chips are respectively arranged on two sides of the circuit board, so that the space of the circuit board can be utilized to the greatest extent, the whole volume of the chips is reduced, meanwhile, the control chips are arranged in a staggered and overlapped manner, and gaps exist among the storage chips which are arranged side by side, so that heat generated by the storage chips can be timely dispersed, and the influence of heat accumulation on the performance and the service life of the chips is avoided.
2. According to the utility model, the micro heat pipes are arranged around the storage chip and are circumferentially arranged, and the micro heat pipes are connected with the shell, so that the micro heat pipes can help heat to be transferred to the outside through the shell, and the heat dissipation performance of the chip is further improved.
Drawings
The utility model will be further described with reference to the accompanying drawings.
FIG. 1 is a cross-sectional view of the overall construction of the present invention;
FIG. 2 is a schematic diagram of a memory chip according to the present invention;
FIG. 3 is a schematic diagram of a control chip according to the present invention;
fig. 4 is a schematic view of the structure of the cover body of the present invention.
In the figure: 1. a circuit board; 2. storing the chip; 3. a control chip; 4. a pin fixing plate; 5. a cover body; 6. a micro heat pipe; 7. a heat conductive sheet.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-4, the present invention is a multilayer heat dissipation memory chip, including a circuit board 1, a control chip 3 is disposed on one side of the circuit board 1, a memory chip 2 is disposed on the other side of the circuit board 1, a plurality of the memory chips 2 are stacked in a staggered manner, a gap exists between the memory chips 2 arranged side by side, a pin fixing plate 4 is disposed on one side of the memory chip 2 away from the circuit board 1, and the memory chip 2, the control chip 3 and the pin fixing plate 4 are all electrically connected to the circuit board 1.
According to the utility model, the storage chips 2 and the control chips 3 are respectively arranged on two sides of the circuit board 1, so that the space of the circuit board 1 can be utilized to the greatest extent, the whole volume of the chips is reduced, meanwhile, the control chips 3 are arranged in a staggered and overlapped manner, and gaps exist among the storage chips 2 which are arranged side by side, so that heat generated by the storage chips 2 can be dispersed in time, and the influence of heat accumulation on the performance and the service life of the chips is avoided.
And a micro heat pipe 6 is arranged around the storage chip 2.
According to the utility model, the micro heat pipes 6 are arranged around the storage chip 2, the micro heat pipes 6 are circumferentially arranged, and the micro heat pipes 6 are connected with the shell, so that the micro heat pipes 6 can help heat to be transferred to the outside through the shell, and the heat dissipation performance of the chip is further improved.
The storage chips 2 are fixed through heat dissipation glue.
According to the utility model, each storage chip 2 is fixed by the heat dissipation glue, so that the volume occupied by the storage chip 2 can be reduced, and heat can be further transferred by the heat dissipation glue, thereby helping heat to be dispersed.
The number of the storage chips 2 is four, two storage chips 2 are arranged in parallel to form a layer, and two layers of the storage chips 2 are vertically arranged.
As an embodiment of the present invention, four groups of storage chips 2 are used as a common combination manner, two storage chips 2 are arranged in parallel as a layer, and two layers of storage chips 2 are arranged vertically, so that the space occupied by the whole chip can be reduced to the greatest extent, and excellent heat dissipation performance between the storage chips 2 can be ensured.
And a cover body 5 is arranged on one side of the control chip 3, which is far away from the circuit board 1, and the cover body 5 seals and encapsulates the control chip 3.
A heat conducting fin 7 is connected between the cover body 5 and the control chip 3.
And heat dissipation fins are arranged on the outer side of the cover body 5.
According to the utility model, the cover body 5 is arranged on one side of the control chip 3 far away from the circuit board 1, the control chip 3 is hermetically packaged by the cover body 5, the heat-conducting fins 7 are connected between the cover body 5 and the control chip 3, and the heat-radiating fins are arranged on the outer side of the cover body 5, so that heat generated by the control chip 3 can be rapidly dispersed through the heat-conducting fins 7 and the heat-radiating fins, and the heat-radiating performance of the chip is ensured.
The working principle of the utility model is as follows: in the application, the storage chips 2 and the control chips 3 are respectively arranged on two sides of the circuit board 1, so that the space of the circuit board 1 can be utilized to the greatest extent, the whole volume of the chips is reduced, meanwhile, the control chips 3 are arranged in a staggered and overlapped mode, and gaps exist among the storage chips 2 which are arranged side by side, heat generated by the storage chips 2 can be dispersed in time, and the influence of heat accumulation on the performance and the service life of the chips is avoided; according to the utility model, the micro heat pipes 6 are arranged around the storage chip 2, the micro heat pipes 6 are circumferentially arranged, and the micro heat pipes 6 are connected with the shell, so that the micro heat pipes 6 can help heat to be transferred to the outside through the shell, and the heat dissipation performance of the chip is further improved; according to the utility model, the storage chips 2 are fixed through the heat dissipation glue, so that the volume occupied by the storage chips 2 can be reduced, and heat can be further transferred through the heat dissipation glue to further help the heat to be dissipated; according to the utility model, the cover body 5 is arranged on one side of the control chip 3 far away from the circuit board 1, the control chip 3 is hermetically packaged by the cover body 5, the heat-conducting fins 7 are connected between the cover body 5 and the control chip 3, and the heat-radiating fins are arranged on the outer side of the cover body 5, so that heat generated by the control chip 3 can be rapidly dispersed through the heat-conducting fins 7 and the heat-radiating fins, and the heat-radiating performance of the chip is ensured.
While one embodiment of the present invention has been described in detail, the description is only a preferred embodiment of the present invention and should not be taken as limiting the scope of the utility model. All equivalent changes and modifications made within the scope of the present invention shall fall within the scope of the present invention.
Claims (7)
1. The utility model provides a multilayer heat dissipation formula memory chip, includes circuit board (1), its characterized in that, one side of circuit board (1) is provided with control chip (3), the opposite side of circuit board (1) is provided with storage chip (2), a plurality of storage chip (2) crisscross stack is arranged, and arranges side by side there is the clearance between storage chip (2), one side that circuit board (1) was kept away from in storage chip (2) is provided with pin fixed plate (4), storage chip (2), control chip (3) and pin fixed plate (4) all with circuit board (1) electric connection.
2. The multilayer heat dissipation memory chip of claim 1, wherein a micro heat pipe (6) is disposed around the memory chip (2).
3. The multi-layer heat-dissipating memory chip as claimed in claim 1, wherein the memory chips (2) are fixed to each other by a heat-dissipating adhesive.
4. The multi-layer heat dissipation memory chip of claim 1, wherein the number of the memory chips (2) is four, two of the memory chips (2) are arranged in parallel in one layer, and two of the memory chips (2) are arranged vertically.
5. The multilayer heat dissipation memory chip of claim 1, wherein a cover (5) is disposed on a side of the control chip (3) away from the circuit board (1), and the cover (5) hermetically encapsulates the control chip (3).
6. The multi-layer heat-dissipating memory chip of claim 5, wherein a heat-conducting plate (7) is connected between the cover (5) and the control chip (3).
7. The multi-layer heat-dissipating memory chip as claimed in claim 5, wherein heat-dissipating fins are disposed on the outer side of the lid (5).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202220291999.XU CN216773232U (en) | 2022-02-14 | 2022-02-14 | Multilayer heat dissipation formula memory chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202220291999.XU CN216773232U (en) | 2022-02-14 | 2022-02-14 | Multilayer heat dissipation formula memory chip |
Publications (1)
Publication Number | Publication Date |
---|---|
CN216773232U true CN216773232U (en) | 2022-06-17 |
Family
ID=81956466
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202220291999.XU Active CN216773232U (en) | 2022-02-14 | 2022-02-14 | Multilayer heat dissipation formula memory chip |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN216773232U (en) |
-
2022
- 2022-02-14 CN CN202220291999.XU patent/CN216773232U/en active Active
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2017520933A (en) | Stacked semiconductor die assembly and associated system having high efficiency thermal path | |
WO2018220846A1 (en) | Semiconductor module | |
CN101504986A (en) | Fire and explosion proof type secondary batteries system having highly efficient cooling function | |
US8587111B2 (en) | Multi-chip package with thermal frame and method of assembling | |
CN217239446U (en) | Heat sink, circuit board, and electronic apparatus | |
CN105099564B (en) | Encapsulating structure and optical module | |
US20130087896A1 (en) | Stacking-type semiconductor package structure | |
CN216773232U (en) | Multilayer heat dissipation formula memory chip | |
JP6190851B2 (en) | Power converter | |
WO2021135239A1 (en) | Heat dissipation device, circuit board assembly, and electronic apparatus | |
WO2023179557A1 (en) | Radiator, circuit boards and electronic device | |
CN217544599U (en) | Integrated circuit packaging structure | |
EP2819163B1 (en) | Chip stack structure | |
CN213988978U (en) | Quick heat radiation structure of cell-phone lithium cell | |
CN210381458U (en) | Microcircuit device | |
CN111696935B (en) | Laminated packaging structure with heat dissipation part | |
CN210351985U (en) | Miniature electronic circuit device | |
CN115332241B (en) | Packaging structure of memory chip capable of enhancing heat dissipation and manufacturing method thereof | |
CN112885794B (en) | PCB (printed Circuit Board), POP (Point of Place) packaging heat dissipation structure and manufacturing method thereof | |
CN219642820U (en) | Power module and vehicle | |
US11201100B2 (en) | Solid-state storage device | |
US20220157781A1 (en) | Electronic device | |
CN217363381U (en) | Ceramic substrate with high electrical insulation and thermal conductivity | |
CN211980603U (en) | Semiconductor product and electronic product with bottom surface heat dissipation plate | |
CN216650098U (en) | Printed circuit board structure and electronic device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |