CN216749887U - Fan-out packaging structure - Google Patents
Fan-out packaging structure Download PDFInfo
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- CN216749887U CN216749887U CN202122808031.8U CN202122808031U CN216749887U CN 216749887 U CN216749887 U CN 216749887U CN 202122808031 U CN202122808031 U CN 202122808031U CN 216749887 U CN216749887 U CN 216749887U
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Abstract
The utility model provides a fan-out packaging structure, which comprises: fix the molybdenum-copper carrier at treating the encapsulation chip back, be used for the parcel to treat the EMC layer of encapsulation chip back and side and set up and treat that the encapsulation chip openly is used for the P I layer of rewiring, wherein, the EMC layer is equipped with the breach that is used for exposing the molybdenum-copper carrier, be equipped with a plurality of rewirings in the P I layer, the chip pad is connected respectively and the ball is planted at the both ends of a plurality of rewirings. According to the fan-out packaging structure, the packaging chip is directly mounted on the molybdenum-copper carrier, the back of the chip is directly close to the molybdenum-copper heat dissipation carrier, and compared with the packaging structure with the EMC material on the back in the prior art, the fan-out packaging structure is higher in heat dissipation capability; the back of the packaged chip is directly grounded, so that the electromagnetic shielding effect is effectively improved; the coefficient of thermal expansion of the molybdenum-copper carrier is closer to that of the chip, the warping degree of a wafer in the packaging process is effectively reduced, the packaging success rate is improved, and the molybdenum-copper carrier can be widely applied to various military and civil microelectronic products.
Description
Technical Field
The utility model belongs to the technical field of wafer level packaging, and particularly relates to a fan-out packaging structure.
Background
Fan-out packaging has received much attention in the scientific research field as the current advanced packaging technology. The most widely used fan-out package is currently a resin fan-out package that utilizes Epoxy (EMC) to reconfigure the wafer. The packaging steps comprise firstly reconstructing a wafer, pasting a chip on a carrier plate with a temporary adhesive film, then wrapping the chip by using an epoxy resin material by using a wafer-level plastic package technology, and then removing the carrier plate to finish wafer reconstruction. Then, the rewiring is completed through semiconductor manufacturing technologies such as physical sputtering, electroplating, photoetching and the like, then, the solder ball salient points electrically interconnected with the outside are manufactured through ball planting and printing technologies, and finally, the single packaging body is formed after cutting and separation.
The back of a packaging body formed finally by the packaging structure is made of an EMC material, because EMC thermal resistance is relatively large and is made of a non-conductive material, great adverse effects are brought to the heat dissipation and grounding effects of a chip, and aiming at the problem, the existing processing mode is 1) a blind hole is etched on one side of the EMC chip-free side, and a heat-conducting copper column is manufactured for heat dissipation; 2) and a heat radiating fin is arranged on the outer side of the non-chip side of the EMC to serve as a heat sink. However, these methods have a general heat dissipation effect and have little effect on electromagnetic shielding.
Therefore, a package structure with good heat dissipation effect and electromagnetic shielding effect is needed.
Disclosure of Invention
The present invention is directed to solve the above technical problems, and to achieve dual improvements of the heat dissipation effect and the electromagnetic shielding effect of the package structure.
An object of the present invention is to provide a fan-out package structure, including: fix the molybdenum copper carrier at treating the encapsulation chip back, be used for the parcel to treat the EMC layer of encapsulation chip back and side and set up and treat the encapsulation chip and openly be used for carrying on the PI layer of rewiring, wherein, the EMC layer is equipped with the breach that is used for exposing the molybdenum copper carrier, be equipped with a plurality of rewirings in the PI layer, the chip pad is connected respectively and the ball is planted at the both ends of a plurality of rewirings.
The fan-out packaging structure provided by the utility model also has the characteristic that the size of the molybdenum-copper carrier is not smaller than that of a chip to be packaged.
The fan-out packaging structure provided by the utility model also has the characteristic that the size of the EMC layer is not less than the fan-out range of the multiple rewires.
The fan-out packaging structure provided by the utility model is also characterized in that the molybdenum-copper carrier is welded on the chip to be packaged in a eutectic welding mode.
The fan-out packaging structure provided by the utility model also has the characteristic that the eutectic soldering uses gold-tin solder for soldering.
The fan-out packaging structure provided by the utility model has the characteristics that the fan-out packaging structure can be used for packaging a plurality of chips to be packaged at the same time, and the distance between the chips to be packaged is 10-100 mu m in the packaging process.
The fan-out packaging structure provided by the utility model has the characteristics that when a plurality of chips are packaged, a plurality of chips to be packaged can be fixed on the same molybdenum-copper carrier for packaging.
The fan-out packaging structure provided by the utility model also has the characteristic that when a plurality of chips are packaged, a molybdenum-copper carrier can be independently fixed on each chip.
The fan-out packaging structure provided by the utility model also has the characteristic that the distance between the implanted balls is 100-1000 mu m.
Compared with the prior art, the utility model has the beneficial effects that:
according to the fan-out packaging structure, the packaging chip is directly mounted on the molybdenum-copper carrier, the molybdenum-copper material is a metal material with good electric conduction and heat conduction performance, the back of the chip of the fan-out packaging structure is directly close to the molybdenum-copper heat dissipation carrier, and compared with a packaging structure with an EMC material on the back in the prior art, the fan-out packaging structure is higher in heat dissipation capability; the back of the packaged chip is directly grounded, so that the electromagnetic shielding effect is effectively improved; the coefficient of thermal expansion of the molybdenum-copper carrier is closer to that of the chip, the warping degree of a wafer in the packaging process is effectively reduced, the packaging success rate is improved, and the molybdenum-copper carrier can be widely applied to various military and civil microelectronic products.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
FIG. 1: the structure schematic diagram of the fan-out packaging structure provided by the embodiment of the utility model;
FIG. 2: the manufacturing steps of the fan-out packaging structure provided by the embodiment of the utility model are schematically shown.
Detailed Description
In order to make the technical means, the creation features, the achievement purposes and the effects of the utility model easy to understand, the following embodiments are specifically described in the fan-out package structure provided by the utility model with reference to the attached drawings.
In the description of the embodiments of the present invention, it should be understood that the terms "central", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only used for convenience in describing and simplifying the description of the present invention, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," "third," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the utility model, the meaning of "a plurality" is two or more unless otherwise specified.
The terms "mounted," "connected," and "coupled" are to be construed broadly and may, for example, be fixedly coupled, detachably coupled, or integrally coupled; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the creation of the present invention can be understood by those of ordinary skill in the art through specific situations.
As shown in fig. 1, there is provided a fan-out package structure, the package structure comprising: fix molybdenum copper carrier 1 at treating the encapsulation chip back, be used for the parcel to treat the EMC layer 4 of encapsulation chip 2 back and side and set up and treat that encapsulation chip 2 openly is used for carrying on PI layer 6 of rewiring, wherein, EMC layer 4 is equipped with the breach that is used for exposing the molybdenum copper carrier, be equipped with a plurality of rewirings 5 in the PI layer 6, the chip pad and plant ball 7 are connected respectively to the both ends of a plurality of rewirings 5.
In some embodiments, the size of the molybdenum-copper carrier 1 is not smaller than that of the chip to be packaged.
In some embodiments, the size of the EMC layer 4 is not smaller than the fan-out range of the plurality of rewires 5.
In some embodiments, the molybdenum-copper carrier 1 is soldered to the chip 2 to be packaged by eutectic soldering.
In some embodiments, the eutectic solder is soldered using a gold-tin solder.
In some embodiments, the fan-out package structure may simultaneously package a plurality of chips 2 to be packaged, and during the packaging process, the distance between the plurality of chips 2 to be packaged is 10-100 μm.
In some embodiments, when packaging a plurality of chips, a plurality of chips 2 to be packaged may be mounted on the same molybdenum-copper carrier 1 for packaging.
In some embodiments, when multiple chips are packaged, the molybdenum-copper carrier 1 can be fixed on each chip individually.
In some embodiments, the distance between the planting balls 7 is 100-1000 μm.
As shown in fig. 2, the packaging steps of the fan-out package structure provided by the above embodiment are as follows:
a) preparing a molybdenum-copper carrier 1, and processing the molybdenum-copper carrier which is slightly larger than a bare chip in size and has proper thickness according to the size of a chip 2 to be packaged, wherein the reason that the carrier is slightly larger than the chip is to ensure the grounding effect around the chip;
b) welding a molybdenum-copper carrier on the back of the bare chip, and selecting gold-tin solder 3 for eutectic welding;
c) and (3) enabling the bonding pad surface of the bare chip, which is welded with the molybdenum-copper carrier, to face the carrier plate 9 pasted with the temporary adhesive film 8, expanding the packaging range according to the requirement of meeting the welding bump pitch, and reconfiguring the bare chip and the carrier plate on the wafer 10. The wafer is used for more convenient packaging with 4;
d) carrying out batch injection molding on the redistributed bare chips, and wrapping the bare chips by using an epoxy resin material 4 to protect the bare chips;
e) after the injection molding is finished, thinning the epoxy resin material on the back of the bare chip until the molybdenum-copper carrier is exposed;
f) after the thinning is finished, processing the temporary adhesive film to lose the viscosity, and taking down the chip from the temporary adhesive film;
g) coating a PI medium layer 6 on the surface of a bonding pad of the chip, and performing RDL rewiring 5;
h) performing BGA ball-planting 7 to complete the electrical connection from the chip bonding pad to the BGA ball on the packaging surface;
i) cutting the whole wafer level package;
j) each individual packaged chip is obtained.
The above description is intended to be illustrative of the preferred embodiment of the present invention and should not be taken as limiting the utility model, but rather, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the utility model. The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (9)
1. A fan-out package structure, the package structure comprising: fix the molybdenum copper carrier at treating the encapsulation chip back, be used for the parcel to treat the EMC layer of encapsulation chip back and side and set up and treat the encapsulation chip and openly be used for carrying on the PI layer of rewiring, wherein, the EMC layer is equipped with the breach that is used for exposing the molybdenum copper carrier, be equipped with a plurality of rewirings in the PI layer, the chip pad is connected respectively and the ball is planted at the both ends of a plurality of rewirings.
2. The fan-out package structure of claim 1, wherein the molybdenum-copper carrier is no smaller in size than a chip to be packaged.
3. The fan-out package structure of claim 1, in which a size of the EMC layer is not less than a fan-out range of the plurality of rewires.
4. The fan-out package structure of claim 1, wherein the molybdenum-copper carrier is soldered to the chip to be packaged by eutectic soldering.
5. The fan-out package structure of claim 4, in which the eutectic solder uses gold-tin solder.
6. The fan-out package structure of claim 1, wherein the fan-out package structure is capable of simultaneously packaging a plurality of chips to be packaged, and a distance between the plurality of chips to be packaged is 10-100 μm during the packaging process.
7. The fan-out package structure of claim 6, wherein when a plurality of chips are packaged, the plurality of chips to be packaged are mounted on the same MoCu carrier for packaging.
8. The fan-out package structure of claim 1, wherein a molybdenum copper carrier is separately attached to each chip when multiple chips are packaged.
9. The fan-out package structure of claim 1, wherein the inter-ball-planting distance is 100-1000 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122808031.8U CN216749887U (en) | 2021-11-16 | 2021-11-16 | Fan-out packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122808031.8U CN216749887U (en) | 2021-11-16 | 2021-11-16 | Fan-out packaging structure |
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| CN216749887U true CN216749887U (en) | 2022-06-14 |
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| CN202122808031.8U Active CN216749887U (en) | 2021-11-16 | 2021-11-16 | Fan-out packaging structure |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115148608A (en) * | 2022-06-28 | 2022-10-04 | 上海交通大学 | Heat dissipation optimization method for silicon-based SU-8 thin film packaging |
| CN115662965A (en) * | 2022-12-15 | 2023-01-31 | 成都华兴大地科技有限公司 | Novel high-power-consumption chip packaging structure and packaging method |
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2021
- 2021-11-16 CN CN202122808031.8U patent/CN216749887U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115148608A (en) * | 2022-06-28 | 2022-10-04 | 上海交通大学 | Heat dissipation optimization method for silicon-based SU-8 thin film packaging |
| CN115662965A (en) * | 2022-12-15 | 2023-01-31 | 成都华兴大地科技有限公司 | Novel high-power-consumption chip packaging structure and packaging method |
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